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Part : LCC2-DIVIDER Supplier : Black Box Manufacturer : Newark element14 Stock : - Best Price : $3.46 Price Each : $5.05
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2/divider

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Abstract: input clock, and its in version (2) 1/2 divider clock output and its inversion (3) One-shot pulse output , noise killer circuit E -S H O T P U L S E p . . . , p OUTPUT r U L o b r G N D 1/2 DIVIDER SYNC , DELAY CLOCK GENERATION CIRCUIT PULSE SYNC CLOCK O UTPUT SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT o CONTINUOUS CLOCK OUTPUT ONE-SHO T PULSE , ), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous -
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M66236FP M66236 16P2N-A CL-15
Abstract: ) CLOCK INPUT CLK IN 1 TEST OUTPUT TEST2 3 ONE-SHOT PULSE OUTPUT PULSE 4 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT FEATURES · 5V single power supply (5V ±5%) · , frequency as input clock, and its inversion (2) 1/2 divider clock output and its inversion (3) One-shot , OUTPUT 10 CKO SYNC CLOCK INVERTED OUTPUT 7 CKO/2 1/2 DIVIDER SYNC CLOCK OUTPUT 6 CKO/2 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT 9 CNTCK CONTINUOUS CLOCK OUTPUT 4 PULSE SYNC Mitsubishi
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M66235FP M66235 Pulse generator wiring diagram
Abstract: ) CLOCK INPUT CLK IN 1 TEST OUTPUT TEST2 3 ONE-SHOT PULSE OUTPUT PULSE 4 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT FEATURES · 5V single power supply (5V ±5%) · , frequency as input clock, and its inversion (2) 1/2 divider clock output and its inversion (3) One-shot , DIVIDER SYNC CLOCK OUTPUT 6 CKO/2 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT 9 CNTCK CONTINUOUS , inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous clock Mitsubishi
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Abstract: frequency as input clock, and its in version (2) 1/2 divider clock output and its inversion (3) One-shot , by built-in noise killer circuit 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT 1 /2 D IV ID E R S Y N C C , OUTPUT SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT , ), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous , output from CKO is output. From 1/2 divider synchro nous clock output (CKO/2), 1/2 divider signal of sync -
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Abstract: its inversion (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4 , 1/2 DIVIDER SYNC CLOCK OUTPUT OLKIN->fT testi ->nr TEST2 , CLOCK OUTPUT SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT 1/2 DIVIDER SYNC CLOCK INVERTED , : synchronous clock output (CKO), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous clock inverted output (CKO/2), one-shot pulse output (PULSE) and -
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ku band signal generator
Abstract: (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4) Continuous clock output , ) open. BLOCK DIAGRAM Vcc Vcc SYNC CLOCK OUTPUT SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT CONTINUOUS CLOCK OUTPUT CLOCK INPUT r|K |N . C L K IN ' ! ' , outputs: synchronous clock output (CKO), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous clock inverted output (CKO/2), one-shot pulse output -
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CKG72
Abstract: its inversion (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4 , OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT clkin^E TESTI ->Q[ TEST2 , SYNC CLOCK INVERTED OUTPUT 1/2 DIVIDER SYNC CLOCK OUTPUT 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT , outputs: synchronous clock output (CKO), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous clock inverted output (CKO/2), one-shot pulse output -
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Abstract: (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4) Continuous clock output , O U S C LO C K O U TPU T \ n DIVIDER SYNC CLOCK i- t INVEfiTCD OUTPUT C K O /2 4 - L £ . 1/2 D , CLOCK O U TPU T 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT C NTCK CLOCK INPUT CLK IN t l DELAY CLOCK , types of outputs: synchronous clock output (CKO), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous clock inverted output (CKO/2), one-shot pulse output -
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Abstract: in­ version (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4 , killer circuit V2 DIVIDER SYNC CLOCK INVERTED OUTOT 1/2 D IV ID E R S Y N C C LO C K OUTPUT vcc , ) CKO/2 1/2 DIVID ER SYNC CLOCK O U TP U T ) CKO/2 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT , output (CKO), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous clock inverted output (CKO/2), one-shot pulse output (PULSE) and continuous -
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Abstract: (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4) Continuous clock , GND 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT 1/2 D IV ID E R S Y N C C LO C K O UTPUT DT CKO/2 , TRIGGER TR INPUT CO C O N TIN U O U S CLOCK O U TPU T ) PULSE o 1/2 DIVIDER SYNC CLOCK , ), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider , CKO is output. From 1/2 divider synchro­ nous clock output (CKO/2), 1/2 divider signal of sync clock -
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Abstract: ): ±3ns · Output types (1) Output of the same frequency as input clock, and its in version (2) 1/2 divider , TEST2 , SYNC CLO CK INVERTED O U TPUT ) CKO/2 ) CKO/2 (C N TC K I PULSE 1/2 DIVIDER SYNC CLO CK OUTPUT 1/2 , ), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous c lo c k in ve rte d outp u t , divider synchro nous clock output (CKO/2), 1/2 divider signal of sync clock output from CKO is output -
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Abstract: in version (2) 1/2 divider clock output and its inversion (3) One-shot pulse output (4) Continuous , INVERTED OUTPUT 1/2 DIVIDER SYNC CLO CK OUTPUT 1/2 DIVIDER SYNC CLOCK INVERTED OUTPUT CO NTINUO US CLO CK , clock output (CKO), synchronous clock inverted output (CKO), 1/2 divider synchronous clock output (CKO/2), 1/2 divider synchronous c lo c k in ve rte d ou tp u t (C K O /2 ), o n e -s h o t p u lse output , signal ol sync clock output from CKO is output. From 1/2 divider synchro nous clock output (CKO/2), 1 -
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Abstract: AZ100LVEL32 PECL/ECL ÷2 Divider DESCRIPTION The AZ100LVEL32 is an integrated ÷2 divider. The , Divider PIN DESCRIPTION AND CONFIGURATION Table 1 - Pin Description for AZ100LVEL32N Pin 1 2 3 4 5 6 , Sample 2 May 2012, Rev 2.0 Arizona Microtek, Inc. AZ100LVEL32 PECL/ECL ÷2 Divider , , Rev 2.0 Arizona Microtek, Inc. AZ100LVEL32 PECL/ECL ÷2 Divider PERFORMANCE DATA Table 3 , /ECL ÷2 Divider LVPECL DC Characteristics (VEE = GND, VCC = +3.3V) Symbol VOH VOL VIH VIL VBB IIH Arizona Microtek
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ECL divider marking C2G MC100EL/LVEL32 AZ100LVEL32NG AZHGLV322 AZM100GLVEL3 AZ100LVEL32TG1 AZ100LVEL32DG1
Abstract: CTS100LVEL32 LVPECL Divide by 2 Divider MLP8, MSOP8, SOIC8 Features Block Diagram 3.0+ GHz , integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the , without notice 1 RevA1013 CTS100LVEL32 LVPECL Divide by 2 Divider MLP8, MSOP8, SOIC8 Figure 2 - , LVPECL Divide by 2 Divider MLP8, MSOP8, SOIC8 ECL DC Characteristics (VEE = -3.0V to -5.5V, VCC = GND , LVPECL Divide by 2 Divider MLP8, MSOP8, SOIC8 PECL DC Characteristics (VEE = GND, VCC = +5.0V) Symbol CTS
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A1013 CTS100LVEL32N CTS100LVEL32T CTS100LVEL32D CTS100LVEL32NG CTS100LVEL32TG
Abstract: (open drain type) â'¢ Handset cord converter â'¢ SSB 1/2 divider â'¢ Amplifier for unlock output , programmable divider â  BLOCK DIAGRAM (AM Transceiver) ià (DP-22) input terminal (pin and the SSB 1/2 , Max. Operating Frequency(l/2 Divider) frmax Input 0.28Vp-p Sine Wave, Voo = 4.5V 6 â'" â'" MHz Pin 19 , divider for use with SSB/lnternally biased/Operable to sine wave 0. 28Vp-p min, f=6MHz ® Q 1/2 divider output Output pin for l/2 divider for use with SSB ® TR Switching between transmission and reception -
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HD42853 SSB TRANSCEIVER 2-12 MHZ 1SV68 HD42855 10.24MHZ active filter inverter circuit diagram 405MH
Abstract: ) PCMCLK(out) AUXCLK(out) PIXCLK(out) Divider 1 or 2 Divider 1 or 2 Divider 1 or 2 Divider 1 or 2 Divider 1 or 2 Divider 1 or 2 AUDCLK CKG_CFG[0] CKG_CFG[1] SDRAMCLK(out) The , + PR /Q Divider (fractional) P0 + PR/Q Divider (fractional) P0 + PR/Q CKG_PLL.REF[2:0] CLK , which is closer to the desired th = tl = 1/2 than the fractional divider which gives a duty cycle of th , fractional divider. Its value is : th = INT(P0/2) / (P0+1). Most of the time this duty cycle is not important STMicroelectronics
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PLL VCO 27MHz AN879 oscillator 81MHz 3520A AN879-01 AN879/0996
Abstract: SY89871U Divider 3.3V & 5V, Divide by 2 Divider SY89312V Divider 3.3V LVPECL Divider + Fanout Buffer SY100E222L MC100LVE222FA Divider 3.3V, Divide by 2, 4, 8 Clock Gen Chip SY100EL34L MC100EL34D Divider 3.3V, Divide by 2, 4, 8 Clock Gen Chip SY10EL34L MC10EL34D Divider 3.3V, Divide by 2, 4, 8 Clock Gen Chip SY10EL34L MC10EL34D Divider 3.3V, Divide by 2, Divide by 4/6 Clock Generation SY100EL38L MC100LVEL38 Divider 3.3V, Divide by 2 Micrel Semiconductor
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8S89832 400MH SY89429A NBC12429AFNG SY89429V 950MH SY89430V
Abstract: Ffb NF Counter F F+2 Divider 1/2 Fvco PD VDD Buffer Mux FOUT , frequency range : 5 ~ 15 MHz Reference divider range : 2 ~ 33 (5-bit programmable divider) Feedback divider range : 2 ~ 257 (8-bit programmable divider) Dual Power supplies 1.8V/3.3V is required. Maximum , . 3V BPNR FIN R PD F Reference Divider R+2 Bandgap Reference M ux , Filter Feedback Divider F+2 Divider 1/2 OEB FOUT M ux BP OD @2003 Hynix Hynix Semiconductor
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H18GPL21M
Abstract: Ffb NF Counter F F+2 Divider 1/2 Fvco PD VDD Buffer Mux FOUT , frequency range : 5 ~ 15 MHz Reference divider range : 2 ~ 33 (5-bit programmable divider) Feedback divider range : 2 ~ 257 (8-bit programmable divider) Dual Power supplies 1.8V/3.3V is required. Maximum , . 3V BPNR FIN R PD F Reference Divider R+2 Bandgap Reference M ux , Filter Feedback Divider F+2 Divider 1/2 OEB FOUT M ux BP OD @2003 Hynix Hynix Semiconductor
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Abstract: M I T S U B I S H I B IP O L A R D I G I T A L IC s M 54812L 1 /4 , 1 /8 , 1 /3 2 DIVIDER/OSCILLATOR DESCRIPTION The M 54812L is an l 2 L semiconductor integrated c irc u it consisting o f a quartz oscillator circu it and 1/32 divider circuit. PIN CONFIGURATION (TOP VIEW) FEATURES « · · · · · B , :'> J -U -l i \ ,> 'a M - M 54812L 1 /4 , 1 /8 , 1 /3 2 DIVIDER/OSCILLATOR TIM IN , EXAMPLES 1. Quartz-crystal oscillator circuit 2. Divider circuit 4k Q ? IN P U T * S IG N A L Vf f 3 -
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M54812L
Abstract: mode logic) 1/2 divider and a CMOS 32/33 dual modulus divider. The prescaler clocks the subsequent , and 4095. Due to the fixed 1/2 divider, the total divide ratio for reference divider would range , frequency for PLL. It includes a fixed 1/2 divider and a 12-bit programmable divider. The 12-bit divider can program the division ratio between 3 and 4095. Due to the fixed 1/2 divider, the total divide , Divider (R Counter) The reference divider provides reference frequency for PFD, it includes a fixed 1/2 MC Devices
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MCD8825B TSSOP-16 MCD2926 GP214D TB31202 TB31202 "pin compatible" 566 VCO 200MH 1300MH
Abstract: oscillation stops. ·1 / 2 divider ·FmCF=0Hz 4.5 to 6.0 (when oscillation stops). ·FsXtal=32.768kHz crystal oscillation. ·System clock : RC oscillation ·1 / 2 divider ·FmCF=0Hz 4.5 to 6.0 (when , RC oscillation stops. ·1 / 2 divider min. Ratings typ. 14 max. 26 6.5 14 4 , ·Internal RC oscillation stops. ·1 / 2 divider ·HALT mode FmCF=0Hz (when oscillation stops). ·FsXtal=32.768kHz crystal oscillation ·System clock : RC oscillation ·1 / 2 divider ·HALT mode FmCF=0Hz (when SANYO Electric
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6805 LC86E5420 LC865500 LC865400 LC865520 LC865516 LC865512
Abstract: for PFD (Phase Frequency Detector). It includes a fixed 1/2 divider and a 10-bit programmable divider. The 10-bit divider can program the division ratio between 3 and 1023. Due to the fixed 1/2 , ) 1/2 divider and a CMOS 16/17 dual modulus divider. The prescaler offers clock to the subsequent , provides reference frequency for PLL. It includes a fixed 1/2 divider and a 10-bit programmable divider. The 10-bit divider can program the division ratio between 3 and 1023. Due to the fixed 1/2 divider MC Devices
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MCD2005RX SSOP-20L MCD2005 8002 AUDIO amplifier bpf 4R7 4116 & FM rx 433 diagram programmable counter ic MCD2005TX/RX 100MH 500MH MCD2005TX 223MH
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