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LTC2364HMS-18#PBF Linear Technology LTC2364-18 - 18-Bit, 250ksps, Pseudo-Differential Unipolar SAR ADC with 97dB SNR; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2367HMS-18#PBF Linear Technology LTC2367-18 - 18-Bit, 500ksps, Pseudo-Differential Unipolar SAR ADC with 97dB SNR; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2368HMS-18#PBF Linear Technology LTC2368-18 - 18-Bit, 1Msps, Pseudo-Differential Unipolar SAR ADC with 97dB SNR; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2756ACG#TRPBF Linear Technology LTC2756 - Serial 18-Bit SoftSpan IOUT DAC; Package: SSOP; Pins: 28; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2758BILX#PBF Linear Technology LTC2758 - Dual Serial 18-Bit SoftSpan IOUT DACs; Package: LQFP; Pins: 48; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC2364IMS-18#TRPBF Linear Technology LTC2364-18 - 18-Bit, 250ksps, Pseudo-Differential Unipolar SAR ADC with 97dB SNR; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy

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18-BIT

Catalog Datasheet MFG & Type PDF Document Tags

pic18f6520-i

Abstract: PIC18F25 2 2 2 2 3 2 0 0 0 0 0 0 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Timers 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 2-16-bit 1-8-bit, 2-16-bit 1-8-bit, 2-16-bit 1-8-bit, 2-16-bit 1-8-bit, 2-16-bit 1-8-bit, 2-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 2-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 3-16-bit 1-8-bit, 2-16-bit 1-8-bit
RS Components
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pic18f6520-i PIC18F25 18-BIT PT 961 PIC18F67J10 pic18f4685-ipt PIC18FXXX PIC18FXXJXX
Abstract: CMOS PARALLEL SyncFlFOâ"¢ (CLOCKED FIFO) 256 x 18-BIT, 512 x 18-BIT, 1024 x 18-BIT 2048 x 18-BIT & 4096 x 18-BIT FEATURES: â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ 256 x 18-bit memory array (72205B) 512 x 18-bit memory array (72215B) 1024 x 18-bit memory array (72225B) 2048 x 18-bit memory array (72235B) 4096 x 18-bit memory array (72245B) 15ns read / write cycle time , . PRELIMINARY IDT72205LB IDT72215LB IDT72225LB IDT72235LB IOT72245LB Both FIFOs have 18-bit input and -
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MIL-STD-883 IDT72205LB/72215LB/72225LB/ 72235LB/72245LB

VCXHR162245

Abstract: VCX125 -state) 16-Bit D-type Flip-Flop (3-state) 9-Bit 4-Port Universal Bus Exchanger 18-Bit Universal Bus Transceiver 18-Bit Universal Bus Transceiver 16-Bit D-type Registered Transceiver (3-state) 18-Bit Universal Bus Transceiver 18-Bit Universal Bus Transceiver 16-Bit Bus Transceiver/Register (3-state) 16 , 20-Bit D-type Flip-Flop 18-Bit D-type Flip-Flop 20-Bit Buffer/Line Driver 1-Bit to 2-Bit Address Register/Driver 1-Bit to 4-Bit Address Register/Driver 18-Bit Universal Buffer/Driver w/Inverted Enable
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VCX08 VCX125 VCX126 VCX16260 VCXHR162245 VCXH162245 TC74VCX16827 VCXH16827 MC74LVX3245 VCX00 VCX04 VCX10 VCX14 VCX32

SigmaTel stac9752

Abstract: chipset DVD Industry's highest level of performance for PC audio codecs with 18-Bit and 20-Bit DACs delivering 103 dB , -Bit 18-Bit 18-Bit 18-Bit 18-Bit 20-Bit 20-Bit 20-Bit 20-Bit 18-Bit 18-Bit 20-Bit 20-Bit 20-Bit 20-Bit 18-Bit 18-Bit 2@24-Bit none 2@24-Bit none 18-Bit 18-Bit 18-Bit 18-Bit 18-Bit 18-Bit 20-Bit 20-Bit 18-Bit 18-Bit 20-Bit 20-Bit 18-Bit 18-Bit 18-Bit 18-Bit Power Supply 3.3
SigmaTel
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SigmaTel stac9752 chipset DVD infrared wireless headphone STAC9700 STAC9460 STAC9708 28-SSOP 48-TQFP STAC9783/84
Abstract: CMOS PARALLEL SyncFlFOTM (CLOCKED FIFO) 256 x 18-BIT, 512 x 18-BIT, 1024 x 18-BIT 2048 X 18-BIT & 4096 X 18-BIT FEATURES: · · · · · · · · · · · · 256 x 18-bit memory array (72205B) 512 x 18-bit memory array (72215B) 1024 x 18-bit memory array (72225B) 2048 x 18-bit memory array (72235B) 4096 x 18-bit , . Both FIFOs have 18-bit input and output ports. The input port is controlled by a free-running clock , /72215LB/72225LB/72235LB/72245LB SyncFIFOTM (CLOCKED FIFO) 256 * 18-BIT, 512 X 18-BIT, 1024 X 18-BIT, 2048 -
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IOT72235LB

ltsk

Abstract: w5s3 CMOS PARALLEL SyncFIFOâ"¢ (CLOCKED FIFO) 256 x 18-BIT, 512 x 18-BIT, 1024 x 18-BIT 2048 x 18-BIT & 4096 x 18-BIT preliminary idt72205lb idt72215lb idt72225lb idt72235lb iot72245lb FEATURES: â'¢ 256 x 18-bit memory array (72205B) â'¢ 512 x 18-bit memory array (72215B) â'¢ 1024 x 18-bit memory array (72225B) â'¢ 2048 x 18-bit memory array (72235B) â'¢ 4096 x 18-bit memory array (72245B) â , interprocessor communication. Both FIFOs have 18-bit input and output ports. The input port is controlled by a
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ltsk w5s3 T72205LB/72215LB/72225LB/72235LB/72245LB

ds90C364

Abstract: rgb 18 bit to lvds LVDS display interface (DS90C387/DS90CF388 chipset) and 18-bit or 24-bit FPD-Link devices. This data mapping must be used, so that the most significant bits (MSB) for an 18-bit application are mapped , three LVDS serialized data lines are required for an 18-bit FPD-Link application while a 24 , 24-bit and 18-bit color are named differently. This confuses the connections needed, so careful , are available for 18-bit (i.e., DS90C365), 24-bit (i.e., DS90C385) and 24/48-bit (i.e., DS90C387
National Semiconductor
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ds90C364 rgb 18 bit to lvds C365 C385 C387 DS90CF384A AN-1127

18-BIT

Abstract: TRANSMITTER . 7-3 DS90C363A/DS90CF363A +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link- 65 MHz, +3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link- 65 M H z . 7-5 DS90CF363 +3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD)Link- 65 M H z . 7-6 DS90C363/DS90CF364 +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link- 65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link- 65 M H z
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TRANSMITTER DS90C383A/DS90CF383A DS90CF383 DS90C383/DS90CF384 DS90CF384A/DS DS90C387A/DS90CF388A DS90CF561

GE-4

Abstract: TxIN10 display interface (DS90C387/DS90CF388 chipset) and 18-bit or 24-bit FPD-Link devices. This data mapping must be used, so that the most significant bits (MSB) for an 18-bit application are mapped exactly the , serialized data lines are required for an 18-bit FPD-Link application while a 24-bit application uses 4 , 18-bit color are named differently. This confuses the connections needed, so careful review of the , 18-bit (i.e., DS90C365), 24-bit (i.e., DS90C385) and 24/48-bit (i.e., DS90C387) appli- cations
National Semiconductor
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GE-4 TxIN10 B10B20 24 PIN TFT DISPLAY DS90C364A VGA 18 BIT R0 R1 R2 R3 R4 R5

HEADER7X2

Abstract: CON19 18-Bit SerDes Evaluation Kit USER MANUAL Part Number: LVDS-18B-EVK January 2007 Rev 0.3 National Semiconductor Corporation Interface Applications Group 18-Bit SerDes Evaluation Board User Manual 18-Bit SerDes Evaluation Kit User Manual TABLE OF CONTENTS 18-Bit SerDes Evaluation Kit , . 8 5.0 18-Bit SerDes Evaluation Board Schematic . 11 5.1 18-Bit SerDes Evaluation Board Schematic (cont
National Semiconductor
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SCAN921821 DS92LV18 67-1098-ND 16F3627 HEADER7X2 CON19 con16 CON8 SMA10 SMA11 SMA12 HEADER40

D10N14

Abstract: IDT72225A , IDT72225A CMOS PARALLEL T-46-35 SyncFIFOâ"¢ (CLOCKED FIFO) 512 « 18-BIT 4 1024 x 18-BIT_MIUTARY AND , "¢ (CLOCKED FIFO) 512 x 18-BIT & 1024 x 18-BIT PRELIMINARY IDT72215A IDT72225A FEATURES: 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write cycle time Easily expandable in depth and width , , low-powerfirst-in,llrst-out(FIFO) memories with clocked read and write controls. The IDT72215A has a 512 x 18-bit memory array, while the IDT72225A has a 1024 x 18-bit memory array. These FIFOs are applicable for a wide
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D10N14 FRl55 ES771 2S771 4A2S771
Abstract: CMOS PARALLEL SyncFlFOTM (CLOCKED FIFO) 512 x 18-BIT & 1024 x 18-BIT Integrated Device Technology, Inc. IDT72215L IDT72225L FEATURES · · · · · · · · · 512 x 18-bit and 1024 x 18-bit memory array , IDT72215L has a 512 x 18-bit memory array, while the IDT72225L has a 1024 x 18-bit memory array. These F , area networks (LANs), and interprocessor communication. Both FIFOs have 18-bit input and output ports , CMOS SYNCHRONOUS FIFO 512 x 18-BIT « m l 1024 X 18-BIT MILITARY AND COMMERCIAL TEMPERATURE RANGES -
OCR Scan
IDT72215L/72225L IDT72215L/72225LS AN-83 72215LB/72225LB

Bus Transceivers

Abstract: Transceivers . 3-71 18-Bit Universal Bus Transceivers With 3-State O u tp u ts. 3-79 18-Bit Universal Bus Transceivers With 3-State O u tp u ts , .3-107 18-Bit Universal Bus Transceivers With 3-State O u tp u 18-Bit Universal Bus Transceivers With 3-State O u tp u ts , -Bit Bus-lnterface Flip-Flops With 3-State O u tp u 18-Bit
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Bus Transceivers Transceivers 54abt16623 BT16240 BT16241 BT16244 SN74ABT16240A SN74ABT16241A SN74ABT16244A
Abstract: 18-Bit SerDes Evaluation Kit USER MANUAL Part Number: LVDS-18B-EVK January 2007 Rev 0.3 National Semiconductor Corporation Interface Applications Group 18-Bit SerDes Evaluation Board User Manual 18-Bit SerDes Evaluation Kit User Manual TABLE OF CONTENTS 18-Bit SerDes Evaluation Kit , . 8 5.0 18-Bit SerDes Evaluation Board Schematic . 11 5.1 18-Bit SerDes Evaluation Board Schematic (cont Texas Instruments
Original

29-FUNCTION

Abstract: PC133 registered reference design Integrated Circuit Systems, Inc. ICS162834 DATA SHEET Advance Information 18-Bit 3.3V Registered Buffer ICS162834 18-Bit 3.3V Registered Buffer Recommended Applications: · PC133 Registered , OE# CLK LE# A1 1D C1 CK Y1 To 17 Other Channels 0774-02/10/03 IDTTM / ICSTM 18-Bit 3.3V , property of their respective owners. ICS162834 ICS162834 ICS162834 ICS162834 18-Bit 3.3V Registered Buffer Advance Information TSD General Description The ICS162834 low voltage 18-bit
Integrated Device Technology
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29-FUNCTION PC133 registered reference design ICSVF2509 ICSVF2510 ICS650-40A ICS252 199707558G

k 2761

Abstract: 2761 l Integrated Device Technology, Inc. CMOS PARALLEL SyncFIFOâ"¢ (CLOCKED FIFO) 512 x 18-BIT & 1024 x 18-BIT IDT72215L IDT72225L FEATURES â'¢ 512 x 18-bit and 1024 x 18-bit memory array structures , with read and write controls. The IDT72215L has a 512 x 18-bit memory array, while the IDT72225L has a 1024 x 18-bit memory array. These F IFOs are applicable for a wide variety of data buff en ng needs , FIFOs have 18-bit input and output ports. The input porl is controlled by a free-running clock (WCLK
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k 2761 2761 l DSC-2050 2761 i 2225L 72215U 72225L 72215L/ IDT72215L772225L
Abstract: CMOS PARALLEL SyncFlFOâ"¢ (CLOCKED FIFO) 512 x 18-BIT & 1024 x 18-BIT FEATURES â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write , . The IDT72215L has a 512 x 18-bit memory array, while the IDT72225L has a 1024 x 18-bit memory array , 18-bit input and output ports. The input port is controlled by a free-running clock (WCLK) and a , -2050/T 1 IDT72215L/7222SL CMOS SYNCHRONOUS FIFO 512 x 18-BIT and 1024 x 18-BIT MILITARY AND -
OCR Scan
72215L7

sm5818ap

Abstract: 78LR Dual 18-Bit Audio DAC AD1868* FUNCTIONAL BLOCK DIAGRAM 18-BIT DAC AD1868 16 VBL ­ + 14 VOL VREF 15 VS 18-BIT SERIAL REGISTER DL 3 CK 4 13 NRL DR 5 LR 6 18-BIT SERIAL REGISTER 12 AGND VREF + 11 NRR DGND 7 18-BIT DAC ­ 10 VOR VS PRODUCT DESCRIPTION VBR 8 9 The AD1868 is a complete dual 18-bit DAC offering excellent performance while , dual 18-bit digital audio DAC which operates with a single +5 volt supply. As shown in the block
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sm5818ap 78LR SM5818A AD1851 ym34 npc SM5813 AD1864 AD1865 20-BIT AD1862 C1478

16 bit Array multiplier code in VERILOG

Abstract: vhdl code for 18x18 SIGNED MULTIPLIER 18-bit X 18-bit two's-complement embedded multipliers. The embedded multipliers offer fast, efficient means to create 18-bit signed by 18-bit signed multiplication products. The multiplier blocks share , Generator, the designer can quickly generate multipliers that make use of the embedded 18-bit x 18-bit , independent dynamic data input ports: 18-bit signed or 17-bit unsigned. The MULT18X18 primitive is illustrated , embedded Virtex-II 18-bit by 18-bit two's complement multipliers can be easily generated using V2.0 of the
Xilinx
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16 bit Array multiplier code in VERILOG vhdl code for 18x18 SIGNED MULTIPLIER vhdl code for 18x18 unSIGNED MULTIPLIER 8 bit Array multiplier code in VERILOG 16 bit array multiplier VERILOG 4 bit multiplier VERILOG UG002 18BIT 18X18
Abstract: i" &;< CMOS PARALLEL SyncFIFOâ"¢ (CLOCKED FIFO) 5 1 2 X 18-BIT & 1024 X 18-BIT FEATURES â'¢ â'¢ â'¢ â'¢ â'¢ 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write , write controls. The IDT72215L has a 512 x 18-bit memory array, while the IDT72225L has a 1024 x 18-bit , . Both FIFOs have 18-bit input and output ports. The input port is controlled by a free-running clock , SYNCHRONOUS FIFO 5t2 x 18-BIT and 1024 x 18-BIT MILITARY ANO COMMERCIAL TEMPERATURE RANGES PIN -
OCR Scan
IOT72225L

PIC18F example code i2c

Abstract: AN 7168 Extension of Word Width With 18-Bit or 36-Bit Input and/or Output Data . . . . . . . . . . . . . . . . . . . , Example of Configuration Registers Programming: 18-Bit Write, 18-Bit Read . . . . . . . . . . . . . . . . . . . . 15 7 Example of Configuration Registers Programming: 9-Bit Write, 18-Bit Read . . . . , of Configuration Registers Programming: 18-Bit Write, 9-Bit Read . . . . . . . . . . . . . . . . . . , memory blocks for Queue 3 Cell size 6 27 10­32 Defines the cell size in 18-bit words
Microchip Technology
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PIC18F example code i2c AN 7168 pic18f1320 pwm ccs refrigerator thermostat datasheet example PIC in ccs pic16f627a i2c DS30493B

ATM machine working circuit diagram

Abstract: ATM machine using microcontroller Industry's highest level of performance for PC audio codecs with 18-Bit and 20-Bit DACs delivering 103 dB , -Bit 18-Bit 18-Bit 18-Bit 18-Bit 20-Bit 20-Bit 20-Bit 20-Bit 18-Bit 18-Bit 20-Bit 20-Bit 20-Bit 20-Bit 18-Bit 18-Bit 2@24-Bit none 2@24-Bit none 18-Bit 18-Bit 18-Bit 18-Bit 18-Bit 18-Bit 20-Bit 20-Bit 18-Bit 18-Bit 20-Bit 20-Bit 18-Bit 18-Bit 18-Bit 18-Bit Power Supply 3.3
Texas Instruments
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SN74ACT53861 SCAA026A ATM machine working circuit diagram ATM machine using microcontroller w54 transistor bit-slice MC68302 SCAA026B SCAD003C SCAA012A

27C256-15 Eprom

Abstract: PIC16F877 psp LVDS display interface (DS90C387/DS90CF388 chipset) and 18-bit or 24-bit FPD-Link devices. This data mapping must be used, so that the most significant bits (MSB) for an 18-bit application are mapped , three LVDS serialized data lines are required for an 18-bit FPD-Link application while a 24 , 24-bit and 18-bit color are named differently. This confuses the connections needed, so careful , are available for 18-bit (i.e., DS90C365), 24-bit (i.e., DS90C385) and 24/48-bit (i.e., DS90C387
Microchip Technology
Original
27C256-15 Eprom PIC16F877 psp program for pic16c54c digital clock microchip pic MPLAB-ICD PIC16F84 usb programmer circuit PIC12CXXX PIC12C508 PIC12C508A PIC12C509 PIC12C509A PIC12CR509A

SLC-96 Mode Defined

Abstract: AN519 CMOS PARALLEL SyncFlFOâ"¢ (CLOCKED FIFO) 512 x 18-BIT & 1024 x 18-BIT FEATURES â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ 512 x 18-bit and 1024 x 18-bit memory array structures 20ns read / write , . The IDT72215L has a 512 x 18-bit memory array, while the IDT72225L has a 1024 x 18-bit memory array , 18-bit input and output ports. The input port is controlled by a free-running clock (WCLK) and a , -2050/T 1 IDT72215L/7222SL CMOS SYNCHRONOUS FIFO 512 x 18-BIT and 1024 x 18-BIT MILITARY AND
TranSwitch
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SLC-96 Mode Defined AN519 TSC 913 R386A MACH220 TR-TSY-000008 AN-519 TXC-03102 96/TR-8 TXC-03102-AN1 R386A-R386I
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