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13ns Datasheet

Part Manufacturer Description PDF Type Ordering
13NS360056 N/A NS Series 240 - 960 Watt Power Supply Unit
ri

5 pages,
368.43 Kb

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13ns

Catalog Datasheet Results Type PDF Document Tags
Abstract: x 124 112 140 13ns ... OCR Scan
datasheet

1 pages,
292.84 Kb

S020G ECIS020M ECIS020L ECIS020J ECICM500 CMA 001 24 CM600 eel -16-2005 datasheet abstract
datasheet frame
Abstract: utilizes exemption 7a. Single-ended (1 delay element) Time delays of 0.1ns to 1.3ns Tolerances as , ~ 1.3nS 0.250 max. (DJ) Schematic: Marking: Product marking will be composed of the , 0.9ns ~ 1.3ns Product Height (inches) 0.250" 0.250" Time delay increments 0.05ns steps , (0.1ns to 1.0ns) 1.0 /ns max. (1.1ns to 1.3ns) DC Resistance Typical Rise Time (20-80% max. , 0.6ns = 80ps 1.3ns = 140ps 0.1ns = 3.5 GHz 0.5ns = 3.5 GHz 0.6ns = 3.5 GHz 1.3ns = 2.4 GHz ... Original
datasheet

2 pages,
76 Kb

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Abstract: Time delay values: 0.1 to 0.8ns: 0.05ns steps 0.9 to 1.3ns: 0.10ns steps Above 1.3ns: in development - call factory Time delay tolerance 0.1 to 0.8ns: �ps 0.9 to 1.3ns: �ps DC Resistance: 0.1 , time: (20-80% max) 0.1ns: 75ps 0.5ns: 80ps 0.6ns: 80ps 1.3ns: 140ps Other values: in , 1.3ns: 2.4 GHz Other values: in development - call factory Rated current: 100mA Temp. coef. of Td ... Original
datasheet

3 pages,
127.17 Kb

datasheet abstract
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Abstract: Non-Inverting 6A 1.5 12ns/13ns into 2500pF 45ns/50ns into 2,500pF 4.5V to 20V EPAD-SOIC-8, MLF-8 , 13ns/15ns into 1000pF 37ns/40ns into 1000pF 4.5V to 20V EPAD-SOIC-8, EPAD-MSOP-8, MLF-8 (3x3mm , ) Low-Side Driver Dual Non-Inverting 1.5A 6 13ns/15ns into 1000pF 37ns/40ns into 1000pF 4.5V to , 1.5A 6 13ns/15ns into 1000pF 37ns/40ns into 1000pF 4.5V to 20V EPAD-SOIC-8, EPAD-MSOP-8 , MIC4129 MIC4129(2) Low-Side Driver Single Inverting 6A 1.5 12ns/13ns into 2500pF 45ns/50ns into 2 ... Original
datasheet

2 pages,
42.65 Kb

high speed mosfet driver hex latch 5962-8850308PA MIC4423 MIC4424 MIC4425 MIC4426 Peak Low-Side MOSFET Driver p-channel mosfet driver MIC4452A MOSFET DRIVER circuits MIC4429 mosfet driver MIC4100 MIC4101 MIC4100 abstract
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Abstract: 6mA Typ. 1.0礎 40/60% (45/55% Available) 80% VDD Min. 20% VDD Max. 1.3nS Typ. 1.3nS Typ. 3mS Typ. 20 nS ... Original
datasheet

1 pages,
691.76 Kb

datasheet abstract
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Abstract: 6mA Typ. 1.0礎 40/60% (45/55% Available) 80% VDD Min. 20% VDD Max. 1.3nS Typ. 1.3nS Typ. 3mS Typ. 20 nS ... Original
datasheet

1 pages,
708.93 Kb

datasheet abstract
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Abstract: ) 80% VDD Max. 20% VDD Min. 1.3nS Max. 1.3nS Max. 3mS Max. 20 nS Max. 45:55 % 75% VDD 25% VDD 260oC 40 ... Original
datasheet

1 pages,
188.55 Kb

datasheet abstract
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Abstract: VDD Max. VDD = +1.8V 3mA Typ. 4mA Typ. 5mA Typ. 6mA Typ. 1.3nS Typ. 1.3nS Typ. 3mS Typ. ... Original
datasheet

1 pages,
736.07 Kb

25PPM datasheet abstract
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Abstract: 50ns 13ns 25ns 13ns 28ns 8ns Ons 8ns Ons 30ns 64ms 64ms Test Condition Vcc=3.6V.Tc=84ns.Ta=25°C , 0.1 0.5 25.1 21.8 Spec. (50ns) 100mA 500uA lOOOuA 90mA 130mA 50ns 13ns 25ns 13ns 30ns 8ns Ons 13ns Ons , 500uA lOOOuA 120mA 140mA 50ns 13ns 25ns 13ns 28ns 8ns Ons 8ns Ons 30ns 64ms 64ms Test Condition ... OCR Scan
datasheet

8 pages,
232.71 Kb

M5M465805ATP L-21011-01 64MDRAM L-21011-01 abstract
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Abstract: time (max) = 13ns Clock LOW time (min) = 10ns Data setup time (min) = 7ns Data hold time (min) = 1ns , flags (max) = 20ns Access time (max) = 13ns Clock LOW time (min) = 10ns Data setup time (min) = 7ns Data ... OCR Scan
datasheet

1 pages,
43.33 Kb

datasheet abstract
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Abstract: Thin Film SIP Delay Lines DS1L5DJ*K Series 1.0 Description Patent Pending The "K" series 3-pin delay line products offer superior high frequency performance in a small footprint package. This series also offers � ps tolerances for time delays up to 0.8 ns. 2.0 Mechanical schematic dimension mm 3.0 Electrical Type Time delay range 0.1 to 0.8 ns 0.05 ns steps 0.9 to 1.3 ns 0.10 ns steps Above 1.3 ns call factory 0.1 to 0.8 ns � ps 0.9 to 1.3 ns � ps 0.1 to 1.0 ns 1. ... Original
datasheet

1 pages,
55.29 Kb

datasheet abstract
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Abstract: MOS MOS Integrated Circuit µPD705100 PD705100 V830TM V830TM 32 PD705100V830NECV800TMV830TM PD705100V830NECV800TMV830TM V830 V830 U10064J U10064J V830U12496J V830U12496J 32 16 16 K K RAM RAM K RAM K 16/32 G 100 MHz 3232 50/33 MHz CMOS3.3 V 16 PD705100GJ-100-8EU PD705100GJ-100-8EU 144LQFP20 144LQFP20 mm U11483JJ3V0DS00 U11483JJ3V0DS00 December 1997 N © NEC Corporation 1995,1996 µPD705100 PD705100 144LQFP20 144LQFP20 mm 108 107 106 105 104 103 10 ... Original
datasheet

60 pages,
382.49 Kb

V830 V800 uPD705100GJ uPD705100 RESET20 n16n PD705100 V830TM PD705100V830NECV800TMV830TM PD705100 abstract
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Abstract: 2010 4 1 NEC http://www.renesas.com 2010 4 1 http://www.renesas.com http://japan.renesas.com/inquiry 1. 2. 3. 4. 5. 6. 7. OA AV 8. 9. 10. RoHS 11. 12. 1. 2. 1 MOS MOS Integrated Circuit µPD705100 PD705100 V830TM V830TM 32 PD705100V830NECV800TMV830 PD705100V830NECV800TMV830 ... Original
datasheet

62 pages,
514.44 Kb

V830 V800 uPD705100GJ uPD705100 n16n U10064J datasheet abstract
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Abstract: Atmel Gate Arrays/Embedded Arrays Device Number ATL50 ATL50 Raw Gates Routable Gates Max Pin Count Max I/O Pins Gate Speed ATL50/4 ATL50/4 4,000 3,000 44 36 200 ps ATL50/15 ATL50/15 ATL50/25 ATL50/25 15,000 25,000 10,000 16,900 68 84 60 76 200 ps 200 ps ATL50/40 ATL50/40 38,000 25,400 100 92 200 ps ATL50/60 ATL50/60 58,000 34,600 120 112 200 ps ATL50/85 ATL50/85 86,000 51,900 144 136 200 ps ATL50/110 ATL50/110 110,000 65,900 160 15 ... Original
datasheet

1 pages,
10.42 Kb

ATL50 ATL50/4 ATL50/15 ATL50/25 ATL50/40 ATL50/60 ATL50/85 ATL50/110 ATL50/150 ATL50/200 ATL50/235 ATL50/300 ATL50/435 ATL50/550 ATL50 abstract
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Abstract: SIP Delay Lines DS1L5DJ* Series 1.0 Description Patent Pending This series of 3-pin delay line products offer superior high frequency performance in a small footprint package. This series also offers � ps tolerances for time delays up to 0.8 ns. 2.0 Mechanical 12.40 max 2.54 010K M 6.35 max 3.20 min schematic 2.25 typ 3.66 max 2.54 �10 0.50 �10 dimension mm 3.0 Electrical Type Time delay range DS1L5DJ* 0.1 to 0.8 ns 0.05 ns steps 0.9 to 1.3 ns 0.10 ns s ... Original
datasheet

1 pages,
54.93 Kb

datasheet abstract
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Abstract: SIP Delay Lines DS1L5DJ*K Series 1.0 Description US Patent 6,828,976 This series of 3-pin delay line products offer superior high frequency performance in a small footprint package. This series also offers � ps tolerances for time delays up to 0.8 ns. 2.0 Mechanical 12.40 max 2.54 Max 010K M H schematic 3.2 min 3.66 max 2.54 �1 0.5 �10 0.25 typ dimension mm 3.0 Electrical Type Time delay range DS1L5DJ* 0.1 to 0.8 ns 0.05 ns steps 0.9 to 1.3 ns 0.10 ns steps Abo ... Original
datasheet

1 pages,
38.26 Kb

datasheet abstract
datasheet frame
Abstract: SIP Delay Lines DS1L5DJ* Series 1.0 Description Patent Pending This series of 3-pin delay line products offer superior high frequency performance in a small footprint package. This series also offers � ps tolerances for time delays up to 0.8 ns. 2.0 Mechanical 12.40 max 2.54 Max 200 M H schematic 3.2 min 3.66 max 2.54 �1 0.5 �10 0.25 typ dimension mm 3.0 Electrical Type Time delay range DS1L5DJ* 0.1 to 0.8 ns 0.05 ns steps 0.9 to 1.3 ns 0.10 ns steps Above ... Original
datasheet

1 pages,
34.78 Kb

datasheet abstract
datasheet frame
Abstract: NEC 13. ELECTRICAL SPECIFICATIONS A BSO LU TE M AXIMUM Parameter Power supply voltage Input voltage Clock input voltage Output voltage Operating ambient temperature Storage temperature uPD705100 uPD705100 RATINGS (T a = 25 C) Symbol V dd Vi Vk Vo Va T s tg Conditions Rating - 0 . 5 to + 4 .5 - 0 . 5 to + 5 .5 Unit V V V V V dd = 3.0 to 3 .6 V V dd = 3.0 to 3 .6 V - 0 . 5 to V dd + 0.3 - 0 . 5 to + 5 .5 - 1 0 to + 85 - 6 5 to + 1 5 0 'C 'C C autions 1. Do not connect an o ... OCR Scan
datasheet

19 pages,
264.14 Kb

datasheet abstract
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Datasheet Content (non pdf)

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Over 1.1 million files (1986-2014): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
glitch-energy performance. The MAX5013 MAX5013 MAX5013 MAX5013 is a TTL-compatible device. It features a fast 13ns settling time Performance over AD9713 AD9713 AD9713 AD9713: Improved Settling Time: 13ns Improved Glitch Energy: 15pV-s Master/Slave
www.datasheetarchive.com/files/maxim/0010/quick180.htm
Maxim 04/04/2001 5.82 Kb HTM quick180.htm
glitch-energy performance. The MAX5012 MAX5012 MAX5012 MAX5012 is an ECL-compatible device. It features a fast 13ns settling time Performance over AD9712 AD9712 AD9712 AD9712: Improved Settling Time: 13ns Improved Glitch Energy: 15pV-s Master/Slave
www.datasheetarchive.com/files/maxim/0010/quick178.htm
Maxim 04/04/2001 5.82 Kb HTM quick178.htm
power consumption (0.12µW) and fast switching speeds (t ON = 13ns, t OFF = 13ns). Cell phones, for 13ns t OFF 13ns ESD HBM Rating >8kV 1.8V Logic Compatible (+3V Supply) Available in 8-Ld
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l712.html
Intersil 07/09/2006 28.71 Kb HTML device_isl43l712.html
= 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality limitations. The +3.6V Low Power Consumption (P D ) 8kV 1.8V Logic Compatible (+3V Supply) Available in 8-Ld thin DFN and 8-Ld
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l120-v1.html
Intersil 13/10/2005 29.74 Kb HTML device_isl43l120-v1.html
= 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality limitations. The +3.6V Low Power Consumption (P D ) 8kV 1.8V Logic Compatible (+3V Supply) Available in 8-Ld thin DFN and 8-Ld
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l122-v1.html
Intersil 13/10/2005 28.84 Kb HTML device_isl43l122-v1.html
speeds (t ON = 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality 8kV 1.8V
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l712-v1.html
Intersil 13/10/2005 28.13 Kb HTML device_isl43l712-v1.html
speeds (t ON = 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality 8kV 1.8V
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l710-v1.html
Intersil 13/10/2005 28.13 Kb HTML device_isl43l710-v1.html
= 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality limitations. The +3.6V Low Power Consumption (P D ) 8kV 1.8V Logic Compatible (+3V Supply) Available in 8-Ld thin DFN and 8-Ld
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l121-v1.html
Intersil 13/10/2005 28.85 Kb HTML device_isl43l121-v1.html
speeds (t ON = 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality 8kV 1.8V
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l711-v1.html
Intersil 13/10/2005 28.13 Kb HTML device_isl43l711-v1.html
ON = 13ns, t OFF = 13ns). Cell phones, for example, often face ASIC functionality limitations. The Power Consumption (P D )
www.datasheetarchive.com/files/intersil/device_pages/device_isl43l122.html
Intersil 07/09/2006 30.67 Kb HTML device_isl43l122.html