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10EAB

Catalog Datasheet MFG & Type PDF Document Tags

1990-TW236

Abstract: c1938 mode is controlled by output-enable (10EAB and 20EAB), clock-enable (1CEAB and 2CEAB), and clock , inputs is stored In the device on a low-to-high transition of 1CLKAB (or 2CLKAB). If 10EAB (or 20EAB) is also low, this stored data appears on the corresponding B outputs; if 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-Impedance state. 10EAB (or 20EAB) does not affect the operation of the , 74ac16952, 74act 16952 . ol package (top view) 10eabc 1 u56 dioeba iclkabc 2 55 11clkba iceabc 3 54
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OCR Scan
54ACT16952 74ACT16952 D3S60 1990-TW236 c1938 54AC16952 74AC16952 16-BIT TJ0238

ti025

Abstract: 12B2 either 9-bit transceiver section, data flow in the A-to-B mode is controlled by output-enable (10EAB or 20EAB) and clock (1CLKAB or 2CLKAB) inputs. When 10EAB (or 20EAB) is low, the corresponding B outputs , , 54ACT16474 . 74AC16474, 74ACT16474 . (TOP VIEW) WD PACKAGE DL PACKAGE 10EAB C 1 U 56 HlOEBA 1 CLKAB C , < m 3 When 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-impedance state. 10EAB (or 20EAB) does not affect the operation of the internal registers. Previously stored data can be
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OCR Scan
54AC16474 ti025 12B2 18-BIT TI0250 AC16474 ACT16474 D3573

54AC16474

Abstract: 54ACT16474 controlled by output-enable (10EAB or 20EAB) and clock (1CLKAB or 2CLKAB) inputs. When 10EAB (or 20EAB) Is , 1CLKAB (or 2CLKAB) is low. When 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-impedance state. 10EAB (or 20EAB) does not affect the operation of the internal registers. Previously stored
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OCR Scan
20EABC L06IC

D3S61

Abstract: 2A8C corresponding A inputs is stored in the device on a low-to-high transition of 1CLKAB (or 2CLKAB). If 10EAB (or 20EAB) is also low, this stored data appears on the corresponding B outputs; if 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-impedance state. 10EAB (or 20EAB) does not affect the , 74AC16953, 74ACT169S3 . (TOP VIEW) WD PACKAGE OL PACKAGE 10EABC 1 Use J 10EBA 1CLKAB E 2 55 H1CLKBA
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OCR Scan
54AC16953 54ACT16953 74ACT16953 D3S61 2A8C TKJ239 D3561 AC16953

54ACT16475

Abstract: 74ACT16475 -bit transceiver section, data flow in the A-to-B mode is controlled by output-enable (10EAB or 20EAB) and clock (1CLKAB or 2CLKAB) inputs. When 10EAB (or 20EA8) is low, the corresponding B outputs are active (high or , state. 10EAB (or 20EAB) does not affect the operation of the internal registers. Previously stored data
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OCR Scan
54ACT16475 74ACT16475 h1b8 54AC16475 74AC16475 TI0251 D3574

54AC16471

Abstract: 54ACT16471 , data flow in the A-to-B mode is controlled by output-enable (10EAB or 20EAB), direction-enable (1DEAB , , 74ACT16471 . DL PACKAGE (TOP VIEW) [9 10EABC iclkabC 1DEAB[ GNDC tAtC 1A2C ^CC 1A3[ 1A4 1A5C GNDC , 10EAB (or 20EAB). A low level on 1CLKAB (or 2CLKAB) inhibits loading of the registers with the current , loaded with the current A-bus data. If 10EAB (or 20EAB) is low, the corresponding B outputs reflect the inverse of the register contents. A high level on 10EAB (or 20EAB) causes the B outputs to be in the
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OCR Scan
54AC16471 54ACT16471 74AC16471 10E8A t523 0247035 T-52-3 AC16471 ACT16471
Abstract: Using 25-mil Centerto-Center Pin Spacings 10EAB rtT c r 56 [ 1CLKAB â¡2 1CEAB [ 3 GND [A , low-to-high transition of 1CLKAB (or 2CLKAB). If 10EAB (or 20EAB) is also low, this stored data appears on the corresponding B outputs; if 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-impedance state. 10EAB (or 20EAB) does not affect the operation of the internal registers. Previously -
OCR Scan
TI0239 ACT16953 20EBA

T10238

Abstract: 54ACT16952 A inputs is stored in the device on a low-to-high transition of 1CLKAB (or 2CLKAB). If 10EAB (or 20EAB) is also low, this stored data appears on the corresponding B outputs; if 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-impedance state. 10EAB (or 20EAB) does not affect the , package 74ac16952, 74act16952 . dl package (top view) 10EAB c 1 u56 1CLKABc 2 SS 1CÃ'Ã'B[ 3 54 GND C
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OCR Scan
T10238 D3560 AC16952 ACT16952 TI0238

54ACT16475

Abstract: 74ACT16475 -bit transceiver section, data flow in the A-tO-B mode is controlled by output-enable (10EAB or 20EAB) and clock (1CLKAB or 2CLKAB) inputs. When 10EAB (or 20EAB) is low, the corresponding B outputs are active (high or , . 54AC16475, 54ACT16475 . WD PACKAGE 74AC16475, 74ACT16475 . OL PACKAGE (TOP VIEW) 10EABC 1CLKABC 1 Al C , I] 2B6 Hvcc ]2B7 Ã2B8 ]gnd 32B9 ] 2CLKBA 120EBA "O 73 O O q â o 3D m < m 3 When 10EAB (or 20EAB) is high, the corresponding B outputs are in the high-Impedance state. 10EAB (or 20EAB) does
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OCR Scan
1250C AC16475 ACT16475 T10251

MB7B

Abstract: 74ACT16474 (10EAB or 20EAB) and clock (1CLKAB or 2CLKAB) inputs. When 10EAB (or 20EAB) is low, the corresponding , 26 31 : 27 30 " 28 29 ]1CLKBA ] 1B1 Ignd ] 1B2 ] 1B3 20EBA When 10EAB (or 20EAB) is high, the corresponding outputs are in the high-impedance state. 10EAB (or 20EAB) does not affect the operation on the , , and OEBA. ♦ Output level before the indicated steady-state Input conditions were established. 10EAB
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OCR Scan
MB7B B55303

1a5c

Abstract: C948 74AC16953, 74ACT16953 . DL PACKAGE (TOP VIEW) 10EABÇ t u56 ]1QEBA iclkabC 2 SS Ã1CLKBA 1CEAB[ S 54 , stored in the device on a low-to-high transition of 1clkab (or 2clkab). If 10eab (or 20eab) Is also low, this stored data appears on the corresponding b outputs; if 10eab (or 20eab) is high, the corresponding b outputs are In the high-impedance state. 10eab (or 20eab) does not affect the operation of the
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OCR Scan
1a5c C948 S4ACT16953 T-52-31

31B8

Abstract: TI0246-D3569 , 74ACT16470 . DL PACKAGE (TOP VIEW) 10EABC 1CLKABC 1DEAB[ GND[* 1A1C» 1A2C VccC 1A3[» 1A4C 1ASC GNDE , register contents and the output buffers are controlled by 1CLKAB (or 2CLKAB) and 10EAB (or 20EAB). A low , , the corresponding B outputs reflect the contents of the registers. A high level on 10EAB (or 20EAB
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OCR Scan
TI0246 AC16470 54AC16470 74AC16470 BS5303 31B8 TI0246-D3569 32B4 D3569 ACT16470 S4ACT16470

54ACT164

Abstract: 03571 20EAB) and latch enable (1LEAB or 2LEAB) inputs. When 10EAB (or 20EAB) is low, the corresponding B outputs are active (high or low logic levels). When 10EAB (or 20EAB) is high, the corresponding B outputs
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OCR Scan
54AC16472 74AC16472 54ACT164 03571 65630 54ACT16472 74ACT16472 TI024S AC16472

WIDE BUS FAMILY

Abstract: 74ACT16864 characterized for operation from â'"40°C to 85°C. DL PACKAGE (TOP VIEW) 10EAB 1B1 1B2 GND 1B3 1B4 Vcc 1B5 , 10EBA 1 s. 10EAB 29 rv 20EBA 20EAB 28 s. 1A1 1A2 1A3 1A4 1A6 1A6 1A7 1A8 1A9 2A1 2A2 2A3 2A4 2A5 , 24 26 27 1B1 1B2 1B3 1B4 IBS IBS 1B7 1B8 1B9 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 2B9 10EAB 1A1 -
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OCR Scan
74ACT16864 WIDE BUS FAMILY

54ACT16863

Abstract: 74ACT16863 -55°C to 125°C. The 74ACT16863 is characterized for operation from -40°C to 85°C. u ]1oeba 10eab 1 , symbol'!' 10EBA 10EAB 56 20EBA 20EAB 1A1 1A2 1A3 1A4 1AE 1A6 1A7 1A8 1A9 2A1 2A2 2A3 2A4 2A6 2AB 2A7 2A8 2A9 29 EN1 EN2 EN3 EN4 logic diagram (positive logic) - 10EBA- 10EAB 56 65 64 62
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OCR Scan
54ACT16863 BSS303 SCAS162 D3723 ACT16863

8EN10

Abstract: SN74LVC16543 . DGG OR DL PACKAGE (TOP VIEW) 10EAB[ 56 ]10EBA 1LEAB [ 2 55 j1LEBA 1CEAB[ 3 54 ]1CEBA GND [ 4 , 56 54 1CEBA 1LEBA 10EAB 55 1CEAB 1LEAB 2Ã"EBÃ' 29 31 2CEBA 30 2LEBA 20EAB 23 2CEAB 26 , 10EAB 55 1CEAB 1LEAB o o o Di 1A1 ° 4 ⺠»O52 1B1 To Seven Other
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OCR Scan
SN74LVC16543 8EN10 SCAS317-

SN74ALVCH16543

Abstract: control in either direction of data flow. DGG OR DL PACKAGE {TOP VIEW) u 1 10EAB[ 56 10EBA 1LEAB , symbolt > a I o m -n O JJ 5 o lOEBA 56 1CEBA 54 1LEBA 10EÃ"B 55 1CEAB 1LÃ'Ã'B 20EBA 29 2Ã , SCES02S-JULY 1995 logic diagram (positive logic) 15IBÃ" -55- 1CEBA 1LEBA 10EAB 54 55 1CEAB 1LEAB 1A1
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OCR Scan
SN74ALVCH16543 SCES025-JULY I20EBA

H TR 1A60

Abstract: TR 1A60 10EAB 1LEBA 1CLKBA 66 67 10EBA ÃÉ 1A1 Â¥ 2LEAB 32 2CLKAB 33 20EAB' 31 2LEBA' 39 , table for normal-mode logic. 10EAB, 10EBA, 20EAB, 20EBA Normal-function output enables. See function , SIGNAL 83 20EAB 71 2A9-I 53 2A9-0 35 2B9-I 17 2B9-0 82 10EAB 70 2A8-I 52 2A8-0 34 2B8-I 16 2B8 0 81 , , 10EAB = 20EAB and 10EBA = 20EBA). Otherwise, the bypass instruction is operated. PSA input masking , 1B1-0 Figure 4.36-Bit PRPG Configuration (10EAB = 20EAB = 0,10EBA = 20EBA = 1) Texas â  3^1723
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OCR Scan
SN54ABT18502 H TR 1A60 TR 1A60 texas instruments 486 SCBS109C SCBS109C-AUGUST

8C12

Abstract: 8EN10 Reliability Handbook. 1997-09-10 1/12 TOSHIBA TC74VCX16543FT PIN ASSIGNMENT SYMBOL 10EAB I 1 1LEAB 1CEAB , 10EAB 1 2EN4 1CEAB 3 G2 fLÃ'Ã'B 2 2C6 20EBA 29 7EN9 2CEBA 31 G7
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OCR Scan
8C12

TC74VCX16652FT

Abstract: 3/14 TOSHIBA TC74VCX16652FT SYSTEM DIAGRAM 10EAB-£>0- 10EBA-â'"- i»- D Q CK , Reliability Handbook. 1997-09-10 1/14 TOSHIBA TC74VCX16652FT PIN ASSIGNMENT IEC LOGIC SYMBOL 10EAB 1
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OCR Scan
10EAB---- 20EAB- 20EBA-

SN74LVC16652

Abstract: SN74LVC16652 is characterized for operation from -40°C to 85°C. 10eab[ u 1 56 10eba 1clkab[ 2 55 1clkba , REVISED MARCH 1994 logic symbolt 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 56 55 54 20EBA 20EAB 2CLKBA , (positive logic) -o 30 O a cz o H "D J3 m m 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 1A1 To Seven
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OCR Scan
SCAS319

chmc

Abstract: LVT16543 control in either direction of data flow. (TOP VIEW) 10EAB[ , u 56 ]1OEBA 1EEÃ"B[ 2 55 ]1Ã , 1CEBA 1LEBÃ" 10EAB 1CEAB 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEAB 2LEAB 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 , 10EAB 1CEAB 1LEAB 1A1 -V- To 7 Other Channels 5 hi 20EBA 2CEBA 2LEBA 20EAB 2CEAB 2LEAB lu er Ã
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OCR Scan
SN74LVT16543 LVT16543 chmc cl2-b1 1UEB Scans-0021704 JESD-17 SW74LVT16543
Abstract: block diagram Boundary-Scan Register 10EAB - - r - ^ - - VC C ;fftN n ?GND EE 1CLKBA , 1CLKAB, 1CLKBA, 2CLKAB, 2CLKBA GND 10EAB, 20EAB 10EBA, 20EBA 1SAB, 1SBA, 2SAB, 2SBA TCK TDI TDO TMS , 38 37 36 - - - - - 20EAB 10EAB 20EBA 10EBA 2CLKAB 1CLKAB 2CLKBA 1CLKBA 2SAB 1SAB 2SBA 1SBA - , of data flow (that is, 10EAB = 2 0 E A B and 10EBA = 20EBA). Otherwise, the bypass instruction is , 2A7-I/0 2A6-I/0 2A5-I/0 2A4-I/0 2A3-I/0 2A2-I/0 2A1-I/0 Figure 6. 36-Bit PRPG Configuration (10EAB -
OCR Scan
SN54LVT18652 SN54LVT182652 SN74LVT18652 SN74LVT182652 SCBS312A- LVT182652

74ABT16652

Abstract: BT16652DGG -State) 74ABT16652 PIN CONFIGURATION LOGIC SYMBOL 10EAB |T 1CPAB [T 1SAB [T GND [T 1 AO [T 1A1 jT VCC [I , [19 2A4 2A5 [21 VCC 2A6 2A7 [24 GND 2SAB 2CPAB [27 20EAB [28 10EAB 1CPBA 1SBA GND 1B0 13 1B1 , 1A5 1A6 1A7 1CPAB 1SAB 10EAB 1SBA 10EBA 1CPBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 52 51 49 48 47 , , 33 1B0-1B7, 2B0 - 2B7 Data inputs/outputs (B side) 1, 56, 28, 29 10EAB, 1ÃEEA, 20EAB, 2DEBS Output
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OCR Scan
BT16652DGG BT16652DL A/-32 74ABT16 SH00022 SSOP56 TSSOP56

SN74LVC16952

Abstract: ) DL PACKAGE (TOP VIEW) 1 U 10EABL 56 ] 10EBA 1CLKAB[ 2 55 ]1CLKBA 1CEAB [ 3 54 ]1CEBA GND [ 4 , 1CLKENBA 1CLKBA 66 54 55 10EAB 1CLKENAB 1CLKAB 20EBA 2CLKENBA 2CLKBA 29 31 30 20EAB 2CLKENAB , REVISED MARCH 1994 logic diagram (positive logic) 1CLKENBA 1CLKBA 10eab 1B1 -V- To Seven Other
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OCR Scan
SN74LVC16952 SCAS320- 7S26S SCAS320
Abstract: 1CLKENBA 1CLKBA 10EAB 1CLKENAB 1CLKAB 29 25EBA 31 2CLKENBA 2CLKBA 30 28 26 2CLKENAB 2CLKAB 1A1 27 56 54 55 , SCAS320 - NOVEMBER 1993 - REVISED MARCH 1994 logic diagram (positive logic) 1CLKENBA 1CLKBA 10EAB -
OCR Scan

SN54ABTH182502A

Abstract: SN54ABTH18502A Normal-function latch enables. See function table for normal-mode logic. 10EAB, 10EBA, 20EAB, 20EBA , NUMBER DEVICE SIGNAL BSR BIT NUMBER DEVICE SIGNAL 47 20EAB 35 2A9-I/0 17 2B9-I/0 46 10EAB 34 2A8-I/0 16 , only when both bytes of the device are operating in one direction of data flow (that is, 10EAB ^ 10EBA and 20EAB ^ 20EBA) and in the same direction of data flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). , -I/0 2B1-I/0 Figure 5. 36-Bit PRPG Configuration (10EAB = 20EAB = 0, 10EBA = 20EBA = 1) ^ Texas
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OCR Scan
SN54ABTH18502A SN54ABTH182502A SN74ABTH18502A SN74ABTH182502A Texas Instruments TTL data book SCBS164D ABTH182502A

74AC16543

Abstract: 8C12 requires DL PACKAGE (TOP VIEW) u 56 10EAB 1 ]10EBA 1LEAB 2 55 J1LEBA 1CEAB 3 54 ]1CEBA GND 4 53 , -BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS logic symbol* 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 20EBA , 56 54 1LEBA 10EAB 55 1CEAB 1LEAB 1A1 O o o ch
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OCR Scan
74AC16543 IR 3109

54ACT16863

Abstract: 74ACT16863 This Material Copyrighted By Its Respective Manufacturer 54ACT16863, 74ACT16863 18-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS162A - JUNE 1990 - REVISED APRIL 1996 logic symbolt 10EBA 10EAB 20EBA 20EAB 1A1 1A2 1 A3 1 A4 1A5 1A6 1A7 1A8 1A9 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9 56 Jn, J\ 29 Jn, 28 EN1 EN2 EN3 EN4 55 54 52 51 49 48 47 45 44 41 40 38 37 36 34 33 31 30 V 1 2 , logic diagram (positive logic) - 10EBA 10EAB 1A1 > 55 S ' r1 r
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OCR Scan

74ACT16620

Abstract: -mA Typical Latch-Up Immunity at 125°C description DLPACKAGE (TOP VIEW) 10eab 1B1 1B2 gnd 1b3 1b4 Vcc , -rev1sed april 1993 logic symbolt 10EBA 10EAB 48 20EBA 20EAB 1A1 1A2 1A3 1A4 1A5 1A6 1A7 IAS 2A1 â  2A2
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OCR Scan
74ACT16620 50XVCC TEXAS75265
Abstract: Thin Shrink Small-Outllne (DGG) Packages DGG OR DL PACKAGE (TOP VIEW) 10EAB L 1 1C L K A B £ 2 1ÔEAB , 10EBA 1CLKENBA 1CLKBA 10EAB 1CLKENAB 1CLKAB 25EBA 2CLKENBA 2CLKBA 20EAB 2CLKENAB 2CLKAB 1A1 30 56 84 -
OCR Scan
SN74ALVC16952 AS277-JAN SCAS277

PASB

Abstract: ec ubt 4.8 t latch enables. See function table for normal-mode logic. 10EAB, 10EBA, 20EAB, 20EBA Normal-function , NUMBER DEVICE SIGNAL BSR BIT NUMBER DEVICE SIGNAL 47 20EAB 35 2A9-I/0 17 2B9-I/0 46 10EAB 34 2A8-I/0 16 , same direction of data flow (i.e., 10EAB = 20EAB and 10EBA = 20EBA). Otherwise, the bypass instruction , -I/0 2A6-I/0 2A5-I/0 2A4-I/0 2A3-I/0 2A2-I/0 2A1-I/0 Figure 5. 36-Bit PRPG Configuration (10EAB = , Configuration (10EAB = 20EAB = 1,10EBA = 20EBA = 0) * Texas â'ž Instruments 01^1723 D11D1B? bll M POST
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OCR Scan
SN54LVTH18502A SN54LVTH182502A SN74LVTH18502A SN74LVTH182502A LVTH182502A LVTH18502A PASB ec ubt 4.8 t SCBS668A-JULY

SN54ABTH182652A

Abstract: SN54ABTH18652A 1993 - REVISED AUGUST 1994 functional block diagram 10EAB 53 - vÇÇiÏGNO ,D - Vcc 55 1CLKBA , normal-mode logic. GND Ground 10EAB, 20EAB Normal-function active-high output enables. See function table , BSR BIT NUMBER DEVICE SIGNAL 47 20EAB 35 2A9-I/0 17 2B9-I/0 46 10EAB 34 2A8-I/0 16 2B8-I/0 45 20EBA , the same direction of data g flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). Otherwise, the bypass , -I/0 1S4-I/0 1B3-I/0 1B2-I/0 1B1-I/0 Figure 6. 36-Bit PRPG Configuration (10EAB = 20EAB = 1,10EBA =
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OCR Scan
SN54ABTH18652A SN54ABTH182652A SN74ABTH18652A SN74ABTH182652A SCBS167A-AUGUST ABTH182652A
Abstract: functional block diagram 10EAB 10EBA 1CLKBA 1CLKAB 1B1 20EAB 20EBA 2C LK B A 2CLKAB 2B1 , 1CLKAB, 1CLKBA, 2CLKAB, 2CLKBA GND 10EAB , 2 0 E A B DESCRIPTION Normal-function A-bus I/O ports. See , both bytes of the device are operating in one direction of data flow (that is, 10EAB = 10EBA and 20EAB = 20EBA) and in the same direction of data flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). , 4 -I/0 2 A 3 -I/0 2 A 2 -I/0 2 A 1 -I/0 Figure 6. 36-Bit PRPG Configuration (10EAB = 20EAB = 1 -
OCR Scan
SN54LVTH18652A SN54LVTH182652A SN74LVTH18652A SN74LVTH182652A LVTH182652A LVTH18652A

ap 4744

Abstract: 42 41 40 39 38 37 36 - - - - DEVICE SIG NAL 20EAB 10EAB 20EBA 10EBA 2CLKAB 1CLKAB 2CLKBA 1CLKBA , BA and 20EAB ^ 20EBA) and in the same direction of dataflow (i.e., 10EAB = 20EAB and 10EBA = 20EBA). , Figure 5. 36-Bit PRPG Configuration (10EAB = 20EAB = 0 , 10EBA = 20EBA = 1) ^ Texas In s t r u m e n t , -I/0 2 B 1 -I/0 Figure 6. 36-Bit PRPG Configuration (10EAB = 20EAB = 1 , 10EBA = 20EBA = 0 , (10EAB = 20EAB = 0 , 10EBA = 20EBA = 1) ^ Texas In s t r u m e n t s POST OFFICE BOX 655303 · DALLAS
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OCR Scan
ap 4744 SN54LVT18512 SN54LVT182512 SN74LVT18512 SN74LVT182512 SCBS711 LVT182512

cczl

Abstract: 74ALVT16652 10EAB Å' â'" i 1ÃEBS 1CPAB [I m 1CPBA 1SAB [I m 1SBA GND E n GND 1A0 Å' E 1B0 1A1 [I Â , 6 8 9 10 12 13 14 numi 1A0 1A1 1A2 1 A3 1 A4 1A5 1A6 1A7 1CPAB 1SAB 10EAB 1SBA 10EBA 1CPBA 1AB , , 28, 29 10EAB, 10EBA, 20EAB, 20EBS Output enable inputs 4,11,18, 25,32, 39,46, 53 QND Ground
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OCR Scan
74ALVT16652 cczl sh0003 74ALVT16 SW00025 MO-118AB 01G74D1
Abstract: determined by the current-sourcing capability of the driver. PIN ASSIGNMENT SYMBOL 10EAB 1LEAB 1CEAB GND , 10EBA 1CËBÂ ilË B Â 56 54 55 1EN3 G1 IC5 2EN4 G2 2C6 55I 54I 53I 10EAB GND 1B1 ÏCËÂB ilË Â B , OEBA 1CEBA -SS- T = 0 R Û 54 55 1LEBA -10EAB _3- 1CËÂB 1LEAB 3= o - J-r ° " J -3 = 0 -
OCR Scan
TC74VCXR162543FT TC74VCXR16254BFT TSSOP56-P-0061

GTLP16T1655

Abstract: GTLP16T1655MTD Connection Diagram Pin Descriptions 10eab- 1 64 -clk 10eba- 2 63 -1leab Vcc- 3 62 -1leba 1a1- 4 61 , 10EAB 20EAB A-to-B Output Enable (Active LOW) Byte 1 and Byte 2 10EBA 20EBA B-to-A Output Enable , enables (xOEAB and xOEBA) and clock (CLK). The output enables (10EAB, 10EBA, and 20EAB and 20EBA) control
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OCR Scan
GTLP16T1655 MTD64 GTLP16T1655MTD MO-153

SN74ALVCH16952

Abstract: 10eab[ 1 56 10eba 1clkab[ 2 55 1clkba 1ceab [ 3 54 1ceba gnd [ 4 53 gnd 1a1 [ 5 52 1b1 1a2 [ 6 51 , TRANSCEIVER WITH 3-STATE OUTPUTS SCES011 - JULY 1995 logic symbolt 10EBA 1CEBA 1CLKBA 10EAB 1CEAB
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OCR Scan
SN74ALVCH16952

SN74LVCH16952A

Abstract: CEBA) output-enable dgg or dl package (top view) U 1 10eab[ 56 10eba 1clkab [ 2 55 1clkba , REVISED JANUARY 1997 logic symbolt 10eba 1ceba 1clkba 10eab 1ceab 1clkab 20eba 2ceba 2clkba 56 54
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OCR Scan
SN74LVCH16952A SCAS320C

74ABT16652

Abstract: 74ABTH16652 LOGIC SYMBOL (IEEE/IEC) 10EAB |T 1CPAB [T 1SAB [T GND [T 1 AO [T 1A1 [T VCC [I 1A2 [T 1 A3 [T 1 A4 [10 , GND 2B3 2B4 2B5 vcc 2B6 2B7 GND 33 2SBA 2CPBA 2ÃEBA 10EBA 56 r-v EN1 [BA] 10EAB 1 EN2 [AB , inputs/outputs (B side) 1, 56, 28, 29 10EAB, 10EBA, 20EAB, 20EBA Output enable inputs 4, 11, 18, 25, 32
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OCR Scan
74ABTH16652
Abstract: e driver. PIN A SSIG N M EN T 10EAB 1 1 SYM BO L se l 10EBA 1LEAB 1 2 , 1B6 1A8 114 G7 V3 1A6 I 12 I 13 IC5 10EAB 2B1 I 15 42 P 2B2 I 16 , o - 10EAB J - â'" g ^ ~ y 1CEAB - i - != 0 - 1LEAB LE â  52 D ' 1B1 To -
OCR Scan
TSSOP56-P-0061-0

MM 5455 real time clock

Abstract: ez3k CONFIGURATION LOGIC SYMBOL 10EAB [T 1CPAB [2 1SAB [3 GND (T 1A0 [5 1A1 [T VCC [I 1A2 ¡T 1A3 [g 1A4 Qà ,   31 â  30 â  5 6 8 9 10 12 13 14 numi 1A0 1A1 1A2 1A31A4 1A5 1A6 1A7 1CPAB 1SAB 10EAB 1SBA , , 38, 37, 36, 34, 33 1B0-1B7, 2B0 - 2B7 Data inputs/outputs (B side) 1,56, 28,29 10EAB, 1ÃEHA, 20EAB
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OCR Scan
74LVT16652A MM 5455 real time clock ez3k VT16652ADL 74LVT16 MSA406

ground nut seed

Abstract: 1CLKAB, 1CLKBA, 2CLKAB, 2CLKBA GND 1LEAB, 1LEBA, 2LEAB, 2LEBA 10EAB, 10EBA, 20EAB, 20EBA TCK TDI TDO TMS , DEVICE SIGNAL 20EAB 10EAB 20EBA 10EBA 2CLKAB 1CLKAB 2CLKBA 1CLKBA 2LEAB 1LEAB 2LEBA 1LEBA - - - - - , both bytes of the device are operating in one direction of data flow (that is, 10EAB * 10EBA and 20EAB * 20EBA) and in the same direction of data flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). Otherwise, the , -I/0 2A1-VO Figure 5. 36-Bit PRPG Configuration (10EAB = 20EAB = 0 ,10EBA = 20EBA = 1) & Texa s
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OCR Scan
ground nut seed SCBS164C

74ABT161543

Abstract: 8C12 40 38 37 36 34 33 SH00060 10EAB Å' 56] 10EBA 1IESB [I 55] 1LEBA 1EAB [I B 1EBA WRab E ra , , 43 42, 41, 40,38, 37, 36, 34, 33 1B0-1B7, 2B0 - 2B7 Data inputs/outputs 1,56 28, 29 10EAB, 10Ã , 10EAB 3- 1 2 -C 1LEAB 10EBA 3- 56 55 -C 1LEBA MRba 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 3- 25 26 -C 2EAB
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OCR Scan
74ABT161543 BT161543DGG BT161543DL mrab 74ABT1 SA00018
Abstract: current-sourcing capability o f th e driver. PIN A SSIG N M EN T 10EAB 1 1 SYM BO L sel 10EBA , 1EN3 G1 1CEBA GND 56 10E B A â  54 1CEBA 55 IC5 10EAB 1A2 1 6 5,1 1B2 , o - 10EAB J - .â'" g Q y 1CEAB - i - != 0 - 1LEAB LE â  52 D ' 1B1 To -
OCR Scan
Abstract: current-sourcing capability of the driver. PIN ASSIGNMENT SYMBOL 56 54 55 10EAB 1LEAB 1CEAB GND 1A1 1 1 1 1 , G2 2C6 55I 54I 53I 10EAB GND 1B1 ÏCËÂB ilË Â B 20EBA 2CEBA 2LE BA 20EAB 2CEAB 2LEAB 30 28 26 27 , OEBA 1CEBA -SS- T = 0 R Û 54 55 1LEBA -10EAB _3- 1CËÂB 1LEAB 3= o - J-r ° " J -3 = 0 -
OCR Scan

SN74ALVCH16543

Abstract: control in either direction of data flow. DGG OR DL PACKAGE (TOP VIEW) u 1 10EAB[ 56 ]1OEBA 1LEAB , 'BÃ' 1LEBA 10EAB 1CÃ'Ã'B 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEAB 56 54 55 29 31 30 28 26 2LEAB 1A1 , 1995 - REVISED JULY 1996 logic diagram (positive logic) 10EBA 1CEBA 56 54 1LEBA 10EAB 1CEAB 55
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OCR Scan
SCES025A-JULY MIL-STD-883C

ABTH182502A

Abstract: ABTH182502 logic. 10EAB, 10EBA, 20EAB, 20EBA Normal-function output enables. See function table for normal-mode , 2B9-I/0 46 10EAB 34 2A8-I/0 16 2B8-I/0 45 20EBA 33 2A7-I/0 15 2B7-I/0 44 10EBA 32 2A6-I/0 14 2B6 , * 20EBA) and in the same direction of data flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). Otherwise, the , 2A7-I/0 2A6-I/0 2A5-I/0 2A4-I/0 2A3-I/0 2A2-I/0 2A1-I/0 Figure 5. 36-Bit PRPG Configuration (10EAB = , 1A5-I/0 1A4-I/0 1A3-I/0 1A2-I/0 1A1-I/0 Figure 6. 36-Bit PRPG Configuration (10EAB = 20EAB = 1,10EBA
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OCR Scan
ABTH182502 SCBS164A-AUGUST 1993-REVISED

74LVT16543A

Abstract: 8C12 (3-State) 74LVT16543A PIN CONFIGURATION LOGIC SYMBOL 10EAB |T 1LÃ'Ã'B [T 1Ã'Ã'B [T GND [T 1 AO [T 1A1 , 13 14 i i i i m i IAO IAI 1A2 1 A3 1 A4 1A5 1A6 1A7 3 -c 1EAB 54 -C 1EBA 10EAB 3- 1 2 -C 1LEAB , , 36, 34, 33 1 B0 - 1B7, 2B0 - 2B7 B Data inputs/outputs 1, 56 28, 29 10EAB, 10EBA, 20EAB, 20EBA A to B
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OCR Scan
MO-153EE

TC74LCX16652AFT

Abstract: time. 3 2001-05-17 TOSHIBA TC74LCX16652AFT SYSTEM DIAGRAM Jâ'"O-O- â o- 10EAB- 10EBA- 1A1 , 2001-05-17 TOSHIBA TC74LCX16652AFT PIN ASSIGNMENT IEC LOGIC SYMBOL 10EAB 1 1CAB 21 1SAB 31 GND 4| 1A1 5
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OCR Scan

272a1

Abstract: 8EN10 SCAS317E - NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 20EBA , logic diagram (positive logic) 10EBA 1CEBA 56 54 1LEBA 10EAB 1CEAB 55 1LEAB 1A1 O o o ^Dn
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OCR Scan
SN74LVCH16543A 272a1 MIL-STD-883
Abstract: -STATE OUTPUTS SCAS317E - NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB , 1998 logic diagram (positive logic) 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 1A1 - -
OCR Scan
Abstract: inputs will support 5V signals. Figure 1. Functional Block Diagram 1CEBÃ" 1CLKBA 10EÃ"B 2CLKBA , 10EAB 1CLKAB 1CEAB GND 1A1 1A2 v cc 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 2A4 -
OCR Scan
QS74FCT163952 FCT163952 AN-01 QS74FCT MDSL-00241-01 0GG35D

31-B4

Abstract: 54AC16473 Instruments Incorporated. 10EABÇ heabC 1A1C gndC 1A2 C 1A3C VccC 1A4 C 1A5 1A6C GND 1A7C 1A8 1A9 , (1SEAB or 20EAB) and latch enable (1LEAB or 2LEAB) inputs. When 10EAB (or 20EAB) Is low, the
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OCR Scan
54AC16473 54ACT16473 74AC16473 74ACT16473 31-B4 TI0249 D3572
Abstract: . Figure 1. Functional Block Diagram 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 1An 1Bn 20EBA 2CEBA 2LEBA 20EAB , Inputs or B to A 3-State Outputs B to A Data Inputs or A to B 3-State Outputs SSOP, TSSOP 10EAB 1LEAB -
OCR Scan
QS74FCT16543T QS74FCT162543T FCT16543T FCT162543T FCT16543 162543T

SN74ALVCH16863

Abstract: SCES060A - DECEMBER 1995 - REVISED SEPTEMBER 1997 logic symbolt 56 10EBA 10EAB 20EBA 20EAB 1A1 1A2 1A3 , logic) â'" 10EBA- 10EAB 1A1 IX / 55 N ' r1 1 r «Fi 20EBA- 29 10 12 13 16 17 19
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OCR Scan
SN74ALVCH16863

74ABT16952

Abstract: 74ABT16952DL 1cpab iceab 10eba 1cpba 10eab 1ceba 1bo 1b1 1b2 1b3 1b4 1bs 1b6 1b7 TTTTTTTT 52 51 49 48 47 45 44 , (B side) 4, 11, 18, 25, 32,39,45,53 10EAB/ 1ÃEBÃ" 2ÃEEB/2ÃEBÃ" Output enable inputs 4, 17, 30,43
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OCR Scan
74ABT16952 74ABT16952DL

SF 9001A

Abstract: 1A61 , 2LEAB, 2 LEBA 10EAB, 10EBA, 20EAB, 20EBA TCK TDI TDO TMS vcc DESCRIPTION NormaMunction A-bus I/O ports , 20EAB 10EAB 20EBA 10EBA 2CLKAB 1CLKAB 2CLKBA 1CLKBA 2LEAB 1LEAB 2LEBA 1LEBA - - - - - - BSR BIT , only when both bytes of the device are operating in one direction of data flow (that is, 10EAB * 10EBA and 20EAB * 20EBA) and in the same direction of data flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). , -Bit PRPG Configuration (10EAB = 20EAB = 0 ,10EBA = 20EBA = 1) Tex a s In s tr u m en ts 16 POST OFFICE
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OCR Scan
SF 9001A 1A61 SN54ABTH18250ZA

005348

Abstract: SN54LVT16652 SN74LVT16652 . DGG OR DL PACKAGE crop view) 10eab [ u 1 56 ]10eba 1clkab [ 2 55 ]1clkba 1sab [ 3 54 , logic symbolt -o 30 O O o H "0 J3 m < m £ 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 56 20EBA 20EAB
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OCR Scan
SN54LVT16652 005348 LVT16652 SCBS150A-

74ACT16544

Abstract: D3649 74ACT16544 is characterized for operation from -40°C to 85°C. FUNCTION TABLEt US6 10EAB 1 ]10EBA , REVISED APRIL 1993 logic symbolt 1C1BÃ' 1CI1Ã' 1LEBA 10EAB 1CEAB 1LEAB 25É1S 2SÃ'BÃ' 2LEBÃ' 20EAB
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OCR Scan
D3649 2C87 lebao SCAS161 300-MII SCAS161-D3649

diode h5e

Abstract: UV 471 10EAB E & 10EAB 1CPAB H m 1CPBA 1SAB E Ml 1SBA GND E 11 GND 1A0 E m 1B0 1A1 E E 1B1 Vcc E m , 3 - 1SAB 10EAB 54- 1SBA 10EBA 55- 1CPBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 27 - 2CPAB 26 - 2SAB
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OCR Scan
diode h5e UV 471 20EB 74ABT16652DL S3T24

74ALVT16543

Abstract: 8C12 CONFIGURATION LOGIC SYMBOL 10EAB [I m 10EBA 1CESB H m 1EEBR 1ESB E ^ 1EBS GND 5 Û GND 1 AO [I n , 1A6 1A7 10EAB 10EBA 160 1B1 1B2 1B3 1B4 1B5 1B6 1B7 26 -C 2 E AB 31 -C 2 ESA 27 -C 2LEAB 30 -C 2 , , 36, 34, 33 1B0-1B7, 2B0 - 2B7 B Data inputs/outputs 1,56 28, 29 10EAB, 10EBA, 2ÃEM, 2ÃEBA A to B
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OCR Scan
74ALVT16543 AV16543DL SW00187 ALVT16543

diode 9D Bp

Abstract: 74ALVT16652 74ALVT16652 PIN CONFIGURATION 10EAB E a 1Å'BS 1CPAB H 1CPBA 1SAB fi E 1SBA GND E E GND 1A0 [I , 5 6 10 12 13 14 2 -3 -5455- minti 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1CPAB 1SAB 1SBA 1CPBA 10EAB , ,29 10EAB, 10EBA, 20EAB, 20EBS Output enable inputs 4,11,18, 25,32,39, 46,53 GND Ground (0V) 7, 22
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OCR Scan
diode 9D Bp HHHRHHHRHRHRFIRHRRRHRHHRRRHR23
Abstract: (3-State) 74LVT16652A PIN CONFIGURATION 10EAB LOGIC SYMBOL 55] 55] 54] 53] 5§ 51] 50] 49 , 1CPBA 1AB 1B1 1B2 1B3 1B4 1B5 1B6 1B7 10EAB 10EBA D - 56 vcc IZ 1A2 1A3 [T [T 1A4 [ÏD , 1SAB, 1SBA, 2SAB, 2SBA 1A0 - 1A7, 2 A 0 -2 A 7 1 B 0 -1 B 7 , 2 B 0 -2 B 7 10EAB , 1ÜFBA, 2 0E A B -
OCR Scan

906003

Abstract: only when both bytes of the device are operating in one direction of data flow (that is, 10EAB = 10EBA and 20EAB = 20EBA) and in the same direction of data flow (that is, 10EAB = 20EAB and 10EBA = 20EBA). , 3 -I/0 2 A 2 -I/0 2 A 1 -I/0 Figure 6. 36-Bit PRPG Configuration (10EAB = 20EAB = 1 ,10EBA = , Configuration (10EAB = 20EAB = 0 , 10EBA = 20EBA = 0) ^ T exas In s t r u m e n t s 18 POST OFFICE BOX , A 4 -I/0 2A3-VO 2A2-VO 2A1-J/0 Figure 8. 36-Bit PSA Configuration (10EAB = 20EAB = 1 ,10EBA =
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OCR Scan
906003 SN74ABTH18652 BS167C A022396

VQ25

Abstract: abt16952 DL PACKAGE (TOP VIEW) 10eab[ 56 ] 1ôeba 1clkab[ 2 55 j1clkba 1clkenab[ 3 54 j1clkenba gnd , ) 1CLKENBA 1 CLKBA 10EAB 1B1 To Seven Other Channels 2CLKENBA 2CLKBA 20EAB 2B1 To Seven Other Channels
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OCR Scan
SN54ABT16952 SN74ABT16952 VQ25 abt16952 EN10 ABT16952 SCBS082B

EN10

Abstract: SN74LVCH16952A . Taking the or OEBA) input low or CEBA) output-enable DGG OR DL PACKAGE (TOP VIEW) u56 10EAB [ 1 , REVISED JUNE 1997 logic symbolt 10EBA 1CEBA 1CLKBA 10EAB 1CEAB 1CLKAB 56 54 55 20EBA 2CEBA 2CLKBA
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OCR Scan
SCAS320D

2A216

Abstract: v1 5d flip-flops at any time. 1997-05-13 3/12 TOSHIBA TC74LCX16652AFT SYSTEM DIAGRAM 10EAB-[>0- 1Ã , SYMBOL 10EAB 1 1CAB 21 1SAB 31 GND 4| 1A1 5| 1A2 6| VCC 71 1 A3 8| 1 A4 9| 1A5101 GND11 I 1A612I 1A7131
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OCR Scan
2A216 v1 5d GND18 961001EBA2 TSSOP56-P-OQ61
Abstract: 1A2 1A3 1A4 1A5 1A6 1A7 1A2 [7 IOEBA 10EAB 1A3 [~2 1A4 [ 3 GND [7 1A5 rs 1A6 [ j i 1A7 , /1CËBA 2CESB/2CEBÄ 1A 0-1A 7 2A 0-2A 7 1B 0-1B 7 2B 0-2B 7 10EAB/ 10EBA 20ÈAB/ 2OÉ0A GND Vcc NAME AND -
OCR Scan
MB2052 SB00010

d3717

Abstract: 74ACT16952 °C. FUNCTION TABLEt U56 10EAB[ 1 ]1Ã"EBA 1CLKAB[ 2 55 ]1CLKBA 1CEAB[ 3 54 J1Ã"EBA gnd[ 4 53 ¡GND 1A1 , revised april 1993 logic symbolt 10EBA 1CEBA 1CLXBA 10EAB 1CEAB 1CLXAB 20EBA 2CEBA 2CLKBA 31 30
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OCR Scan
d3717 SCAS159B D3717 74ACT16

LVT16952

Abstract: SN74LVT16952 logic state. (TOP VIEW) 10EAB[ i U 56 ]10EBA 1CLKAB[ 2 55 ]1CLKBA 1CEAB[ 3 54 ]1CEBA GND[ 4 53 , "O 3D O D C o H "O 3J < m 10EBA 1CEBA 1CLKBA 10EAB 1CEAB 1CLKAB 20EBA 2CEBA 2CLKBA 2OTÃ"B 2CEAB
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OCR Scan
SN74LVT16952 LVT16952 209m SN74LVT169S2 65S303
Abstract: Vrr is removed. Figure 1. Functional Block Diagram 1CÃ'BÃ' 1CLKBA 10EAB 1CÃ'BÃ' 1CLKAB 10EBA H> H , QS74LCX162H952 Figure 2. Pin Configuration (All Pins Top View) SSOP, TSSOP Table 1. Pin Description 10EAB C -
OCR Scan
LCX162H952 MDSL-00209-01 QS74LCX 162H952
Abstract: . . . DGG OR DL PACKAGE (TOP VIEW) 10EAB[ i u 1LEA B [ 2 1C EAB[ 3 g n d 56 ] 1 0 E B A 55 j 1 , 1998 logic symbolt 56 10EBA 1CEBA 1LEBA 10EAB 1CEÀB 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEÀB 2LEAB 1A1 , (positive logic) 10EBA 1CEBA 1 LEBA 10EAB 1CEAB 1LEAB 1A1 - v -To -
OCR Scan
SN54LVTH16543 SN74LVTH16543 1997-R

74ABT161543

Abstract: 74ABT16543 , 56 28, 29 10EAB, 10EBA, 2ÃEÃ"E, 20Ã'BA A to B / B to A Output Enable inputs (active-Low) 3, 54 26 , 2B2 -22- 2B3 2B4 -2â_ 2B5 -34- 2B6 -22- 2B7 SH00036 10EAB Å' m 1ÃEBÃ" 1ÃEÃ"E [I m , 1A7 10EAB 10EBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 TTTTTTTT 52 51 49 48 47 45 44 43 15 16 17 19 20
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OCR Scan
74ABT16543 74ABTH16543 BT16543DL 00T7124
Abstract: PACKAGE (TOP VIEW) 10EAB[ 1CLKAB [ 1C LKEN AB[ GND [ 1A1 [ 1A2 [ VCC 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 , JULY 1997 - REVISED MARCH 1998 logic symbolt 10EBA 1CLKENBA 1CLKBA 10EAB 1CLKENAB 1CLKAB 29 20EBA , MARCH 1998 logic diagram (positive logic) 1CLKENAB 1CLKAB 10EBA 56 54 1CLKENBA 1CLKBA 10EAB -
OCR Scan
SN54LVTH16952 SN74LVTH16952 BS697D JESD17 SN74LVTH16

sh0005

Abstract: 6652 74ABTH16652 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) 10EAB CEj 9 1ÃEBÃ" 1CPAB [I H 1CPBA 1SAB E E , 2A2 -Ã-2A3 2A5 -21â'" 2A6 -22- 1ÛEBA 56 rv. EN1 IBA] 10EAB 1 EN2 [AB] 1CPBA 55 > C3 , , 2B0 - 2B7 Data inputs/outputs (B side) 1, 56, 28, 29 10EAB, 10EBA, 20EAB, 20EBA Output enable inputs
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OCR Scan
sh0005 6652 TH16652 RHRHRRRRRRRRRHRRRRRRRRHFIHRR29 0QT71

74LVT16652A

Abstract: VT16652ADL specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A PIN CONFIGURATION LOGIC SYMBOL 10EAB |T , 1SAB 10EAB 1SBA 10EBA 1CPBA 1 AB 1B1 1B2 1B3 1B4 1B5 1B6 1B7 27 â  26 â  31 â  30 â  TTTTTTTT 52 51 , /outputs (B side) 1, 56, 28, 29 10EAB, 1ÃEBA, 20EAB, 20EBA Output enable inputs 4, 11, 18, 25, 32, 39, 46
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OCR Scan

SN54LVT16543

Abstract: SN74LVT16543 . DGG OR DL PACKAGE (TOP VIEW) 10EAB [ 56 ]10EBA 1LEAB [ 2 55 j1LEBA 1CEAB [ 3 54 ]1CEBA GND , from -40°C to 85°C. logic symbolt 10EBA 56 1CEBA 1LÃ'BÃ' 10EAB 1CEAB 54 55 1LEAB 20EBA 29
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OCR Scan
SN54LVT16543 SCBS148A- 1992-REVISED D1GD317

EN10

Abstract: SN74LVCH16952A . Taking or OEBA) input or CEBA) output-enable (OEAB accesses the data on either port. the low 10eab , NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 1CEBA 1CLKBA 10EAB 1CEAB 1CLKAB 56 54 55
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OCR Scan
SCAS320E
Abstract: Thin Shrink Small-Outline Packages DGG OR DL PACKAGE (TOP VIEW) 10EAB 1CLKAB 1SAB GND 1A1 1 2 , -STATE OUTPUTS JANUARY 1993 logic symbol* 10E BA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 20E BA 20E AB 2CLKBA 2SBA -
OCR Scan
SN74ALVC16652

8EN10

Abstract: SN74LVCH16543A -STATE OUTPUTS SCAS317D - NOVEMBER 1993 - REVISED JULY 1997 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB , ) 10EBA 1CEBA 56 54 1LEBA 10EAB 1CEAB 55 1LEAB 1A1 O o o ^Dn C1 1D C1 1D -V- To
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OCR Scan
Abstract: . Figure 1. Functional Block Diagram 1CEBA 1CLKBA 10EAB 1CEBA 1CLKAB 10EBA H> H> H> 1 An M-WV- 25Ã , Respective Manufacturer QS74LCX162952 Figure 2. Pin Configi (All Pins Top View) SSOP, TSSOF 10EAB -
OCR Scan
LCX162952 MDSL-00174-02

54AC16543

Abstract: 74AC16543 10EAB [ 56 ]10EBA 1 LEAB [ 2 55 ]1LEBA 1CEAB 3 54 ]1CEBA GND [ 4 53 ] GND 1A1 [ 5 52 ] 1B1 1A2 [ 6 , APRIL 1996 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEAB 2LEAB
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OCR Scan
54AC16543 SCAS125B- AC16543

SN74ALVCH16952

Abstract: is provided to hold unused or The SN74ALVCH16952 is characterized for operation 10eab 1clkab , 1CLKENBA 1CLKBA 10EAB 1CLKENAB 1CLKAB 56 54 55 29 20EBA 2CLKENBA 2CLKBA 31 30 20EAB 2CLKENAB
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OCR Scan
SCES011A

LVT16652

Abstract: ) Using 25-mll Center-to-Center Spaclngs 10EAB 1CLKAB 1SAB GND 1A1 1A2 Vcc 1A3 1 A4 1A5 GND 1A6 1A7 1A8 , -STATE OUTPUTS APRIL 1992 logic symbolt g > Iii DC GL H O a o oc CL 10EBA 10EAB 1CLKBA 1SBA 1CLKAB
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OCR Scan
12CLKBA 7526S

SAB 3210

Abstract: SAB 3209 (TOP VIEW) 10EAB 1 u 56 ]1Ã"EBA 1CLKAB 2 55 ]1CLKBA 1SAB 3 54 j 1SBA GND 4 53 ]GND 1A1 5 52 ] 1B1 , SCAS128B-D3464. MARCH 199Q-REV1SED APRIL1993 logic symbol'!' 10EBA 10EAB 1CLKBA 1SBA 1CUCAB 1SAB 54 20EBA 2Å
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OCR Scan
74ACT16652 SAB 3210 SAB 3209 D346 TL1723 SCAS128B D3464

ABT16543

Abstract: SN54ABT16543 (top view) se 10EAB t 1 ]10EBA 1LEAB[ 2 55 ] 1 LEBA 1CEAB t 3 54 ]1CEBA gnd[ 4 53 Jgnd 1A1 , - FEBRUARY 1991 -REVISED JULY 1994 logic diagram (positive logic) 10eba 56 1CEBA 54 1leba 10eab 55
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OCR Scan
SN54ABT16543 SN74ABT16543 ABT16543 SCBS087B SCBS087B-FEBRUARY
Abstract: 4 -I/0 2 A 3 -I/0 2 A 2 -I/0 2 A 1 -I/0 Figure 5. 36-Bit PRPG Configuration (10EAB = 20EAB = 0 , -I/0 2 B 1 -I/0 Figure 6. 36-Bit PRPG Configuration (10EAB = 20EAB = 1 , 10EBA = 20EBA = 0) ^ , -Bit PSA Configuration (10EAB = 20EAB = 0 , 10EBA = 20EBA = 1) ^ Texas In s t r u m e n t s 18 POST , Configuration (10EAB = 20EAB = 1 , 10EBA = 20EBA = 0) ^ Texas In s t r u m e n t s POST OFFICE BOX 655303 · , (10EAB = 20EAB = 0 , 10EBA = 20EBA = 1) ^ Texas In s t r u m e n t s 20 POST OFFICE BOX 655303 · -
OCR Scan
1993-R

mhab

Abstract: mrab ic A 7 1 B 0 -1 B 7 , 2 B 0 -2 B 7 10EAB , 10E B A , 2 0E A B , 2 0 E B A 1EÄE, 1EBÄ, 2EAB, 2EBA 1EEÄE , -C 1EAB 54 -C 1EBA 2 -C 1LEAB 55 -c 1LEBA MRab D - 4 10EAB 3-1 10EBA 3
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OCR Scan
mhab mrab ic 74ABTH161543
Abstract: any time. * 1998 09-02 - 3/14 TOSHIBA TC74VCX16652FT SYSTEM DIAGRAM 10EAB- J , 09-02 - 1/14 TOSHIBA TC74VCX16652FT PIN ASSIGNMENT 10EAB 1C A B 1SAB GND 1A1 1A2 V CC 1A , 30 2 C B A 29 2 0 E B A 28 30 31 27 26 55 54 o 56 EN1 (B A -
OCR Scan

it4140

Abstract: VEM BER 1993 - R EVISED JULY 1995 DQQ OR DL PACKAGE (TOP VIEW) 10EAB 1CLKAB 1SAB GND 1A1 , 2 , 15ESS 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 25E1X 20EAB 2CLKBA 2SBA 2CLKAB 2SAB 29 28 30 31 27 28 88 58 84
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OCR Scan
it4140 SCAS31 74LVC16652

SN74LVCH16652A

Abstract: -bit transceivers or one 16-bit transceiver. DGG OR DL PACKAGE (TOP VIEW) 10EAB[ 1 u 56 ]10EBA 1CLKAB [ 2 55 , -STATE OUTPUTS SCAS319F - NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 10EAB 1CLKBA 1SBA 1CLKAB
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OCR Scan
SN74LVCH16652A
Abstract: _ SCAS319F - NOVEMBER 1993 - REVISED JANUARY 1998 SN74LVCH16652A 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS DGG OR DL PACKAGE (TOP VIEW) 10EAB [ 1 1CLKAB 2 1SAB 3 GND 4 1A1 [ 5 1A2 6 VCC [ 7 1A3 [ 8 1A4 c 9 1A5 [ 10 GND 11 1A6 12 1A7 13 1A8 [ 14 2A1 15 2A2 [ 16 2A3 [ 17 GND 18 2A4 [ 19 2A5 [ 20 2A6 [ 21 VCC [ 22 2A7 [ 23 2A8 24 GND 25 2SAB [ 26 2CLKAB [ 27 20EAB 28 , symbolt 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 20EBA 20EAB 2CLKBA 2SBA 2CLKAB 2SAB 29 28 30 31 27 IN 56 -
OCR Scan

74ABT161543

Abstract: 74ABT16543 , 44, 43 42, 41, 40,38, 37, 36, 34, 33 1 B0 - 1B7, 2B0 - 2B7 Data inputs/outputs 1, 56 28, 29 10EAB , CONFIGURATION 10EBA 1EBÃ" 56 1EN3 G1 54 1LÃ'BÃ' 55 1C5 10EAB 1 2EN4 1Ã'Ã'B 1LÃ'Ã'B 3 G2 2C6
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OCR Scan
74ABT/H16 ABTH16543
Abstract: specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A PIN CONFIGURATION 10EAB [T , 1B5 1B6 1B7 10EAB 10EBA 3- 56 47] 1B4 4§ § g 42) 44) 1B6 i i m m 52 51 49 48 47 45 -
OCR Scan
Abstract: 7 10EAB, 10EBA, 20EAB, 20EBA 1EÄB, 1EBÄ, 2ÏÏÏÏÏÏ, 2ÏÏBÂ 1EEÄH, 1EFBÄ, 2EEÄE, 2EFBÄ GND V CC NAME , 2 -C 1LEAB 55 -c 1LEBA 1BO 1B1 1B2 1B3 1B4 1B5 1B6 1B7 10EAB 3-1 10EBA 3- 56 A -
OCR Scan

SN54ALVTH16543

Abstract: SN74ALVTH16543 , DGV, OR DL PACKAGE (TOP VIEW) u 10EAB [ 1 56 ]10EBA 1LEAB [ 2 55 j1LEBA 1CEAB [ 3 54 ]1CEBA , 1CEAB 1LEAB 1A1 54 1LEBA 10EAB 55 -O O O o o
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OCR Scan
SN54ALVTH16543 SN74ALVTH16543 SCES073A-JUNE ALVTH16543
Abstract: TOSHIBA TC74VCX16652FT SYSTEM DIAGRAM 10EAB- J- 56 0 °- o - 10EBA - D CK Q Hr , TC74VCX16652FT PIN ASSIGNMENT 10EAB 1CAB 1SAB GND lEC LOGIC SYMBOL 56 1 0 E BA 10EBA55 1CBA 54 1SBA 53 , , 26 29 28 30 1 21 31 4| o 56 EN1 (BA ) EN2 (A B) 55 54 »C3 G4 »C5 G6 EN7 -
OCR Scan
Abstract: . PIN ASSIGNMENT SYMBOL 56 54 55 56l 55 10EBA 1LEBA 10EBA 1CËBÂ ilË B Â 10EAB ÏCËÂB ilË Â B , conditions were established. SYSTEM DIAGRAM 10EBA 56 f 55 O 1LEBA = o 10EAB _ L 1CEAB -
OCR Scan
Abstract: 10EAB 1CAB 1SAB GN D 1A1 1A2 V CC 1A3 1A 4 1 2 3 4 5 6 7 8 9 o 56 1 0 E B A 10EBA55 1CBA 54 , any time. * 2000 05-31 - 3/13 TO SH IBA TC74VCXR162652FT SYSTEM DIAGRAM 10EAB -
OCR Scan
Abstract: SCBS699A - JULY 1997 - REVISED DECEMBER 1997 logic symbolt 10EBA 1CEBÀ 1LEBA 10EAB 1CEAB 1LEAB 20EBA , -STATE OUTPUTS logic diagram (positive logic) 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 1A1 To Seven Other -
OCR Scan

LVTH16543

Abstract: SN54LVTH16543 -STATE OUTPUTS SCBS699A - JULY 1997 - REVISED DECEMBER 1997 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB , (positive logic) 10EBA 1CEBA 56 54 1LEBA 10EAB 1CEAB 55 1LEAB 1A1 O o o ^Dn C1 1D C1 1D
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OCR Scan
LVTH16543 H-03V
Abstract: 20EBA2CEBA- 1L E B A 10EAB 1C E A B 1L E A B ¡O D 3 2LEBA20EAB 2CEAB Ì= T > 1 2 L E A B -?Z_ , PIN CONFIGURATIONS 10EAB Z 1L E A B Z 1C E A B 1 2 3 4 5 6 56 55 54 53 52 51 50 49 48 47 46 45 S 0 5 -
OCR Scan
IDT74LVCH16543A PLH11

diode h5e

Abstract: MB2652 50 51 1 2 3 5 6 7 M 1 1 î î t 1 1A0 1A1 1A2 1 A3 1A4 1A5 1A6 1A7 1CPAB 1SAB 10EAB 1SBA 10EBA , , 35,34, 33,32,31,29, 28,27, 25, 24 1B0-1B7, 2B0-2B7 Data inputs/outputs (B side) 47, 46, 20, 21 10EAB
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OCR Scan
MB2652 MB2652BB 53TE4
Abstract: . 1L E B A â  2 LE B A - 10EAB 20EAB 1C E A B â  2C EAB â  1L E A B 2LEAB -o , N A B S O L U T E M A X IM U M R A T IN G S (1) Symbol 10EAB d 1 56 1 L E A B I -
OCR Scan
IDT74LVC16543A LVC16543A16- LVC16543A S056-2 S056-3 2975S

TC74VCX16543FT

Abstract: ASSIGNMENT SYMBOL 10EAB I I 1 56l 1LEAB I 1 2 55p 1CEAB I 1 3 54I GND I I 4 53 p 1A1 I 1 5 52 p 1A2 I , 10eab 1 2en4 1ceab 3 g2 Tleäb 2 2c6 20eba 29 7en9 2ceba 31 g7
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OCR Scan

74LVT16652A

Abstract: 74LVT16652ADGG 13 14 LLLLLLLL 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2 - 1CPAB 3 â'" 1SAB 10EAB 54- 1SBA 10EBA 55 , 10EAB, 10EBA, 20EAB, 20EBA Output enable inputs 4, 11, 18, 25, 32,39, 46, 53 GND Ground (0V) 7,22, 35
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OCR Scan
LVT16652A 74LVT16652ADGG 74LVT16652ADL 7ST43 210MH

TC74VCX

Abstract: TC74VCXR162543FT capability of the driver. PIN ASSIGNMENT SYMBOL 10EAB I I 1 56l 1LEAB I 1 2 55p 1CEAB I 1 3 54I GND I I , 1ceba 54 g1 Tlebä 55 ic5 10eab 1 2en4 1ceab 3 g2 Tleäb 2 2c6
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OCR Scan
TC74VCX R162543FT

004II

Abstract: 1A2 1A3 1A4 1A5 1A6 1A7 2 - 1CPAB 3 -C 1CEAB 10EBA 55 - 1CPBA 10EAB 54 -C 1CEBA 180 1 B 1 182 , / 2CPBA 1CËAB/ 1CEBA 2CËAB/ 2CEBA 1A 0-1A 7 2A 0 -2 A 7 1B 0-1B 7 2B 0 -2 B 7 10EAB/10EH R 20E AB / 20EBA
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OCR Scan
004II 74ALVT16953
Abstract: any time. * 1999 10-15 - 3/13 TOSHIBA TC74VCXR162652FT SYSTEM DIAGRAM 10EAB- J , 1999 10-15 - 1/13 TOSHIBA TC74VCXR162652FT PIN ASSIGNMENT IEC LOGIC SYMBOL 10EAB -
OCR Scan

SN74LVCH16652A

Abstract: as two 8-bit transceivers or one 16-bit transceiver. DGG OR DL PACKAGE (TOP VIEW) 10EAB[ 1 u 56 , 1993 - REVISED JULY 1997 logic symbolt 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 56 55 54 20EBA 20EAB
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OCR Scan
SCAS319E

EN10

Abstract: SN74ALVCH16952 SN74ALVCH16952 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCES011C - JULY 1 995 - REVISED OCTOBER 1997 DGG, DGV, OR DL PACKAGE (TOP VIEW) u 1 56 10EAB[ ]10EBA 1CLKAB[ 2 55 ]1CLKBA 1CLKENAB [ 3 54 ]1CLKENBA GND [ 4 53 ] GND 1A1 [ 5 52 ] 1B1 1A2 [ 6 51 ] 1B2 vcc[ 1 A3 [ 7 50 8 49 ]vcc ] 1B3 1 A4 [ 9 48 ] 1B4 1A5 [ 10 47 ] 1B5 GND [ 11 46 ] GND 1A6 [ 12 45 ] 1B6 1A7 , -STATE OUTPUTS SCES011C - JULY 1 995 - REVISED OCTOBER 1997 logic symbolt 10EBA 1CLKENBA 1CLKBA 10EAB
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OCR Scan
Abstract: ) Product Description Product Pin Configuration 1C LKAB t 10EAB[ 1 2 iS A B [ 3 GND [ 4 1Ai [ 5 1A 2 , II I II II I II I I I I I M I I II I I II I I I I I I Logic Block Diagrams 10EBA 10EAB -
OCR Scan
PI74ALVCH16652 PI74ALVCH16373 PI74ALVCH PS8135A
Abstract: 10EAB 1CLKBA 1LEBA 10EBA 1CLKAB 1LEAB C 1A 1 - C D D ^ 2 C - D 1 C D C - D 1 , GND GND Vcc GND 2CLKBA GN D 3 1 LEAB 10EAB GND Vcc GND GND Vcc -
OCR Scan
IDT74ALVCH32501 36-BIT ALVCH32501
Abstract: transceiver; 3-state 10EAB d O H I 10EBA 1CPAB d 50 1CPBA 1CEAB d GND d M] 1A0 d X -
OCR Scan
74ALVC16952 74ALV

BH161

Abstract: 74ABT161543 master reset (3-State) 74ABT161543 74ABTH161543 LOGIC SYMBOL (IEEE/IEC) PIN CONFIGURATION WRab 10EAB , 41 40 36 37 36 34 33 1B1 1B2 1B3 1B4 1B5 1B6 1B7 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 SH00060 10EAB
-
OCR Scan
BH161 1995S MSA40B RRRRHRRRRRRRR29

TC74VCX16652FT

Abstract: 2001-05-17 TOSHIBA TC74VCX16652FT SYSTEM DIAGRAM â M>-O- 10EAB- 10EBA- 56 â 4> 1A1 1A8- 1CAB â , TOSHIBA TC74VCX16652FT PIN ASSIGNMENT IEC LOGIC SYMBOL 10EAB 1 1CAB 21 1SAB 31 GND 4| 1A1 5| 1A2
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OCR Scan
Abstract: C5 10EAB - 55 54 1 1CPAB- 2 1SAB 3 29 28 30 31 27 26 G12 1B0 3D V 1 7 1 2V 1 , B 7 10EAB , 10 F B A , 2 0E A B , 2 0 F B A GND VCC NAME AND FUNCTION Clock input A to B / Clock -
OCR Scan
Abstract: DIAGRAM 10EAB 20EAB - != 2- 1CLKBA 2CLKBA 1LEBA 2LE B A ^j 10EBA 2ÃEBÃ" - ^ < j , 1CLKBA GND GND GND Vcc GND GND Vcc GND 2C L K B A GND 10EAB GND -
OCR Scan
32-BIT 11PLH2

74AC16623

Abstract: 74ACT16623 ) - 10EBA 10EAB 1A1 48 47 _ 43 41 40 38 37 36 35 33 32 30 29 27 26 V 3 47 11 12
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OCR Scan
74ACT16623 74AC16623 8c80 SCAS172 D3680 6SS303 SCAS172-D368Q

SN74ALVC16952

Abstract: TRANSCEIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 logic symbol^ 10EBA 1CEBÄ 1CLKBA 10EAB 1CEAB 1CLKAB 29
-
OCR Scan
Abstract: > 2C8 rs EN9 1CEBA 1CLKBA 10EAB r T X 3 1CEAB 1CLKAB 25EBA 2 29 31 30 28 26 27 5 t A-to-B -
OCR Scan
SCAS320A 15EBE 74LVC16952 SCAS320A-
Abstract: any time. * 1998 09-02 - 3/14 TOSHIBA TC74VCXR162652FT SYSTEM DIAGRAM 10EAB- J , 09-02 - 1/14 TOSHIBA TC74VCXR162652FT PIN ASSIGNMENT 10EAB 1C A B 1SAB GND 1A1 1A2 V CC , 30 2 C B A 29 2 0 E B A 28 30 31 27 26 55 54 o 56 EN1 (B A -
OCR Scan

8EN10

Abstract: SN74ALVCH16543 10EAB 1CEAB 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEAB 2LEAB 1A1 56 54 55 29 31 30 28 26 27 1A2 , (positive logic) 10EBA 1CEBA 56 54 1 LEBA 10EAB 1CEAB 55 1LEAB 1A1 < ⺠O o o =CH C1 1D
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OCR Scan
SCES025C

LVT16543A

Abstract: diode esk vm 3.3V ABT 16-bit registered transceiver (3-State) 74LVT16543A PIN CONFIGURATION LOGIC SYMBOL 10EAB , VCC 3 -C 1EAB 1A2 |T 4| 1B2 54 -c 1EBA 10EAB D- 1 1A3 (T 48] 1B3 2 -C 1LEAB 10EBA 3- 56 1A4
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OCR Scan
LVT16543A diode esk vm Sen 2A6 74LVT16543ADGG 74LVT16543ADL 0075T23 510MH DD75T24

74ALVT16952

Abstract: AV16952DL 1CPBA 10EAB 1CEBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 mTTTTT 52 51 49 48 47 45 44 43 15 16 17 , ) 4,11,18,25,32,39,45,53 10EAB/10EBA 20ESB / 20EBA Output enable inputs 4, 17,30,43 GND Ground (0V
-
OCR Scan
74ALVT16952 AV16952DL
Abstract: , 1SBA, 2SAB, 2SBA 1AO - 1A7, 2A0 - 2A7 1 B 0 - 1B7, 2 BO - 2B7 10EAB.1ÜEBÂ, 20EAB, 20EBÀ GND v cc NAME , -State) 7 . AI wT1R#;co / 4ALV i ooo/i PIN CONFIGURATION 10EAB [ T 1CPAB ( T 1SAB [ T GND J T 1A0 [ T , SYMBOL 5 6 8 9 10 12 13 14 t . m 2 m i 10EAB 10EBA 3- 56 1A0 -
OCR Scan
3V16-
Abstract: 54 55 1 3 2 29 31 30 28 26 27 5 1EN3 l \ G1 l \ 1C5 rx 2EN4 N. G2 f \ 2C6 rx 7EN9 1CEBÄ 10EAB -
OCR Scan
SN74ALVC16543

opo 7 cp

Abstract: V722 transceiver; 3-state 74ALVCH16952 10eab E O m ioeba 1cpab E m 1cpba iceab E m iceba gnd E IM] gnd
-
OCR Scan
opo 7 cp V722 1A7 BL 74ALVCH16952DGG 91a3 D1QQA73
Abstract: ASSIGNMENT 10EBA 1LEBA SYMBOL 10EBA 1CËBÂ ilË B Â 10EAB ÏCËÂB ilË Â B 20EBA 2CEBA 29 31 30 28 26 27 56 , ere established. SYSTEM DIAGRAM 10EBA 56 f 55 O 1LEBA = o 10EAB _ L 1CEAB != -
OCR Scan
TC74VCX1
Abstract: 10EBA 1CEBA 1LEBA 10EÁB 1CEÁB 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEAB 2LEAB 3 56 54 55 1EN3 G1 1C5 , ) 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 1A1 - V-To Seven Other Channels -
OCR Scan
SCBS699C SN54LVTH16
Abstract: . . WD PACKAGE SN74LVTH16 9 5 2 . DGG OR DL PACKAGE (TOP VIEW) 10EABC 1CLKAB [ 1CLKENAB [ GND , 1CLKENBA 1CLKBA 10EAB 1CLKENAB 1CLKAB 29 20EBA 2CLKENBA 2CLKBA 20EAB 2CLKENAB 2CLKAB 1A1 31 30 28 26 27 56 , 10EBA 56 One of Eight Channels 1A1 > & < 54 O 1CLKENBA 1CLKBA 10EAB 55 C1 -
OCR Scan

TC74VCXR162652FT

Abstract: SYSTEM DIAGRAM â M>-O- 10EAB- 10EBA- 56 â 4> 1A1 1A8- 1CAB â  1SAB â  D Q CK Q D , TC74VCXR162652FT PIN ASSIGNMENT IEC LOGIC SYMBOL 10EAB 1 1CAB 21 1SAB 31 GND 4| 1A1 5| 1A2 6| VCC 71 1 A3
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OCR Scan
Abstract: (3-State) 7 4 A d T H 16652 J* o t Z ! ?! PIN CONFIGURATION 10EAB 1C PAB 1S AB GND 1A 0 , B 0 -2 B 7 10EAB, 10EBS, 20EAB, 20EBS GND Vcc NAME AND FUNCTION Clock input A to B / Clock input B -
OCR Scan
SH000ZS

SN54ABT16652

Abstract: SN74ABT16652 -bit transceiver. sn54abt16652. wd package sn74abt16652. dl package (top view) 10EAB[ 1 u 56 ]10EBA 1CLKAB , 10eba 10eab 1clkba 1SBA 1clkab 1sab 56 20eba 20eab 2clkba 2sba 2clkab 2sab 1a1 1a2 1a3 1a4 ias 1a6
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OCR Scan
SN54ABT16652 SN74ABT16652 SCBS215A- ABT16652 P08T0FF

74AC16620

Abstract: -BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS D360Q. JULY 1990- REVISED APRIL1993 logic symbolt 10EBA 10EAB
-
OCR Scan
74AC16620 AC16620 D3600 1990-REVISED G55303

74ALVC16952DL

Abstract: 8C12 -state 74ALVC16952 10EAB LL O ä] 10EBA 1CPAB Å' 1] 1CPBA 1CEAB IH IO 1CEBA GND CZ S] GND 1A0 E 1B0 1A1
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OCR Scan
74ALVC16952DL

25CC

Abstract: AM2952 inputs 1B0-1B7, 2 BO - 2B7 42, 41,39,38, 37,36,35,34, 33,32,31,29, 28. 27.25, 24 Data output* 10EAB
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OCR Scan
AM2952 MB2052B 25CC
Abstract: il puts Ground Power Product Pin Configuration 10EAB 1CLKAB 1CEAB GND 1Ao 1A1 VCC 1A2 1A3 1A4 GND -
OCR Scan
PI74LCX16952 PI74LCX PS2096A

PS8312

Abstract: Transition Product Pin Configuration 10EAB 1B1 1B2 GND 1B3 1B4 1B5 1B6 1B7 GND 1B8 1B9 GND GND 2B1 2B2
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OCR Scan
PS8312 PI74ALVCH16863 PI74ALV CH16863 SN74ALCH16863

MB2861

Abstract: MB2861BB 35 34 ! : : : : i MIL 1A0 1A1 1A2 1 A3 1 A4 1A5 1A6 1A7 1A8 1A9 46â'"< 47-C 10EBA 10EAB
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OCR Scan
MB2861 MB2861BB

74ALVCH16623

Abstract: 74ALVCH16623DGG -1 74ALVCH16623DGG 48 TSSOP48 plastic SOT362-1 PINNING PIN NO. SYMBOL NAME AND FUNCTION 1 10Eab '1' output enable
-
OCR Scan
VCH16623 74ALVCH16623 74ALVCH16623DL SSOP48

ALVC16653DL

Abstract: 10EBA Y 1 10EAB 54 1SBA 2 1CPA8 55 1CPBA 15 2A0 16 2A1 17 2A2 19 2A3 20 2A4 21 2A5 23 2A6 24
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OCR Scan
ALVC16653DL 74ALVC16652
Abstract: NUMBER § >0 ! o SYMBOL 10ËAB, 20EAB 1A0-1A9, 2A02nA9 FUNCTION A side to B side output enable -
OCR Scan
Abstract: SN54ALVTH16652 . . . WD PACKAGE SN74ALVTH16652 . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 10EAB[ 1 1CLKAB [ 2 1SA B , bolt 56 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 20EBA 20EAB 2CLKBA 2SBA 2CLKAB 2SAB EN1 [BA] EN2 [AB -
OCR Scan
SCES192
Abstract: ia g ra m 10EBA 1CEBA_5±20EBA 2CEBA. 2L EB A- 1L E B A 10EAB 1CEAB 1LEAB 2O E A B 2CE , TRANSCEIVER W/3-STATEOUTPUTS EXTENDED COMMERCIALTEMPERATURE RANGE P IN C O N F IG U R A T IO N 10EAB d -
OCR Scan
IDT74L VCH162543A LVCH162543A16- LVCH162543A 10-3M-20T0 46B5771

74ACT16475

Abstract: SCAS198 - 03998, OCTOBER 1990 - REVISED APRIL 1993 logic symbol* 1CLKAB 2 > C1 10EAB 1 EN2
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OCR Scan
D3998
Abstract: 4 -5 5-1SBA 1CPBA 1AB 1B1 1B2 1B3 1B4 1B5 1B6 1B7 10EAB 10EBA D - 56 n n ii n 52 15 , B 7 10EAB , 1 Ü F M , 2 0E A B , 2 Ü F M GND o o > 3 NAME AND FUNCTION Clock input A to B / Clock -
OCR Scan

GTL1655

Abstract: SN54GTL1655 sn74gtl1655 . . . dgg package (top view) u 10EAB[ 1 64 ] CLK 10EBA[ 2 63 ]1LEAB vcc[ 3 62 ]1LEBA 1A1 , CLK 1LEAB 1LEBA 10EBA 10EAB Ã"Ã' 1A1 64 63 62 1 -C 33 -c 1D C1 CLK CLK
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OCR Scan
SN54GTL1655 SN74GTL1655 GTL1655 SCBS696C

SN74LVC16652

Abstract: 9 3 - REVISED MARCH 1994 logic sym b o lt 10EBA 10EAB 1CLKBA 1SBA 1CLKAB 1SAB 20EBA 20EAB 2CLKBA
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OCR Scan
Abstract: logic sym b o lt 10EBA 10EAB 1CLKBA 56 1 55 54 2 3 29 28 30 31 27 26 N EN1 [BA] EN2 [AB] > C3 G4 > C5 -
OCR Scan
SCAS266
Abstract: . Taking or OEBA) input or CEBA) output-enable (OEAB accesses the data on either port. the low 10eab , NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 1CEBA 1CLKBA 10EAB 1CEAB 1CLKAB 56 54 55 -
OCR Scan
QS74LVCH16952A LVCH16952A MDSL-00325-00 QS74LVC
Abstract: -bit transceivers or one 16-bit transceiver. DGG OR DL PACKAGE (TOP VIEW) 10EAB[ 1 u 56 ]10EBA 1CLKAB [ 2 55 , -STATE OUTPUTS SCAS319F - NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 10EAB 1CLKBA 1SBA 1CLKAB -
OCR Scan
IDT74FCT163952A/B/C FCT163952A/B/C IDT74FCT163952/A/C S056-1
Abstract: -STATE OUTPUTS SCAS317E - NOVEMBER 1993 - REVISED JANUARY 1998 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB , 1998 logic diagram (positive logic) 10EBA 1CEBA 1LEBA 10EAB 1CEAB 1LEAB 1A1 - -
OCR Scan
SN54LVTH16652 SN74LVTH16652
Abstract: ASSIGNMENT SYMBOL 10EAB I I 1 56l 1LEAB I 1 2 55p 1CEAB I 1 3 54I GND I I 4 53 p 1A1 I 1 5 52 p 1A2 I , 10eab 1 2en4 1ceab 3 g2 Tleäb 2 2c6 20eba 29 7en9 2ceba 31 g7 -
OCR Scan
PI74FCT16543T PI74FCT162543T PI74FCT162H543T PI74FC PI74FCT 162H543T

54-WBGA

Abstract: 711Mbps -STATE OUTPUTS SCBS699A - JULY 1997 - REVISED DECEMBER 1997 logic symbolt 10EBA 1CEBA 1LEBA 10EAB 1CEAB , (positive logic) 10EBA 1CEBA 56 54 1LEBA 10EAB 1CEAB 55 1LEAB 1A1 O o o ^Dn C1 1D C1 1D
Samsung Electronics
Original
54-WBGA 711Mbps 16K/32 32K/32 300MH 356MH 400MH
Abstract: 10EAB 1CEAB 1LEAB 20EBA 2CEBA 2LEBA 20EAB 2CEAB 2LEAB 1A1 56 54 55 29 31 30 28 26 27 1A2 , (positive logic) 10EBA 1CEBA 56 54 1 LEBA 10EAB 1CEAB 55 1LEAB 1A1 < ⺠O o o =CH C1 1D -
OCR Scan
QS74FCT16952T QS74FCT162952T FCT16952T FCT162952T FCT16952 MO-153ED

56 pF CH

Abstract: 1CPBA 10EAB 1CEBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 mTTTTT 52 51 49 48 47 45 44 43 15 16 17 , ) 4,11,18,25,32,39,45,53 10EAB/10EBA 20ESB / 20EBA Output enable inputs 4, 17,30,43 GND Ground (0V
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OCR Scan
56 pF CH SN54ABT16470 SN74ABT16470 SCBS085E SCBS08SE
Abstract: . DGG OR DL PACKAGE (TOP VIEW) 10EAB [ 56 ]10EBA 1LEAB [ 2 55 j1LEBA 1CEAB [ 3 54 ]1CEBA GND , from -40°C to 85°C. logic symbolt 10EBA 56 1CEBA 1LÃ'BÃ' 10EAB 1CEAB 54 55 1LEAB 20EBA 29 -
OCR Scan
Abstract: is provided to hold unused or The SN74ALVCH16952 is characterized for operation 10eab 1clkab , 1CLKENBA 1CLKBA 10EAB 1CLKENAB 1CLKAB 56 54 55 29 20EBA 2CLKENBA 2CLKBA 31 30 20EAB 2CLKENAB -
OCR Scan
Abstract: 1999 10-15 - 1/13 TOSHIBA TC74VCXR162652FT PIN ASSIGNMENT IEC LOGIC SYMBOL 10EAB , any time. * 1999 10-15 - 3/13 TOSHIBA TC74VCXR162652FT SYSTEM DIAGRAM 10EAB- J -
OCR Scan
IDT54/74FCT16952AT/BT/CT/ET IDT54/74FCT162952AT/BT/CT/ET IDT54/74FCT162 H952AT/BT/CT/ET IL-STD-883 T16952AT/BT/C
Abstract: °C Temperature capability â  Available in TSSOP Pin Descriptions Pin Names Description 10EAB , ). The output enables (10EAB, 10EBA, and 20EAB and 20EBA) control Bytel and Byte2 data for the A to -
OCR Scan
IDT54/74FCT16543T/AT/CT/ET IDT54/74FCT162543T/AT/CT/ET FCT16543T/AT/CT/ET T162543T/AT/CT/ET FCT162543T/AT/CT/ET 162543T/AT/CT/ET
Abstract: 05-31 - 1/13 TO SH IBA TC74VCX16652FT PIN ASSIGNMENT 10EAB 1CAB 1SAB GN D 1A1 1A2 V CC , 05-31 - 3/13 TO SH IBA TC74VCX16652FT SYSTEM DIAGRAM 10EAB - - 0 ° - 10EBA - -
OCR Scan
Showing first 150 results.