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1/10LSB

Catalog Datasheet MFG & Type PDF Document Tags

AC 1506

Abstract: ac1506 of clear and stable resolution of 1/10LSB in the region of zero and full scale. The adjustment , adjust the offset potentiometer until an output of 0V ±1/10LSB is obtained. For bipolar units apply a , shown in Table 3 is obtained within ±1/10LSB. Once the appropriate offset adjustment has been made , output shown in Table 2 or Table 3 is obtained within ±1/10LSB. POWER SUPPLY AND GROUNDING CONNECTIONS , input held at either Logic "0" or Logic "1", the input data may be changed without affecting either the
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DAC1132 AD562 AC 1506 ac1506 op power amplifier AC1506

Model 184l

Abstract: DAC-12QM PROCEDURE A voltmeter capable of 1/10LSB resolution and accuracy (e.g., 15/iV for a 16 bit DAC) at both , until an output of 0V ±1/10LSB is obtained. OUTLINE DIMENSIONS AND PIN DESIGNATIONS Dimensions shown , PROCEDURE A voltmeter capable of 1/10LSB resolution and accuracy (e.g., 15/j.V for a 0 to +10V, 16 bit DAC , 's output is within ±1/10LSB of zero. For bipolar units, strobe in the code that should give minus full , scale minus 1LSB within ±1/10LSB. CINCH CONNECTOR 251 22 30 160 (SUPPLIED! PIN FUNCTION PIN FUNCTION
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DAC-14QM DAC-16QM Model 184l DAC-12QM CINCH CONNECTOR 251 22 binary pulse dac bcd to analog converter DAC-14/16QM 1/10LSB

DAC1009

Abstract: bcd to analog converter code of 000. .00 applied, adjust the zero pot until the analog output is zero ±1/10LSB for unipolar units or +Vps ±1/10LSB for bipolar units. With a full scale digital code of 111. . .11 (binary) or 1001 1001 1001 (BCD) applied, adjust the gain pot until the analog output is within ±1/10LSB of Full Scale , preferred by many system designers (i.e., 111. .1 digital input results in the maximum absolute value analog output). The logic levels of: +2.0V < Logic "1" < +15V 0V < Logic "0" < +0.8V are compatible with
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DAC1009

SOURCE CODE FOR DIGITAL WEIGHT SCALE

Abstract: ad550 value listed is obtained with ±1/10LSB. For Unipolar codes apply 00 . 0 and adjust for OV out , within ±1/10LSB. OUTPUT CONNECTIONS OUTPUT RANGE PINS JUMPERED TOGETHER Bipolar Offset Feedback , at either Logic "0" or Logic "1", the input data may be changed without affecting either the contents , module terminals. MSB 1 BIT 2 BIT 3 BIT 4 BIT 5 9 BIT 6 10 BIT 7 11 BIT 8 12 BIT 9 16 BIT 10 17 BIT , 0.8V +2V < Logic "1'
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DAC1118 SOURCE CODE FOR DIGITAL WEIGHT SCALE ad550 digital scale block diagram for grams 00048V AD550 MIL-G-45204 AC4494

AD563

Abstract: DAC with BCD input max 1/4LSB max 1/10LSB max DIFFERENTIAL NONLINEARITY ±1/2LSB max SETTLING TIME TO 1/2LSB All Bits , -55°C to +125°C + 1/10LSB max 5ppm max D-24A AD563J D/BIN Binary 0 to +70°C ±1/2LSB max 50ppm max , temperature range, -55°C to +125°C. PRODUCT HIGHLIGHTS 1. The AD562 multiplies in two quadrants when a , DAC OUT , [ 10 20V SPAN R |""lT GND [iT "ilj BIT 1 (MSB) IN "23] BIT 2 IN BIT 3 IN 7T| BIT 4 IN 2o] BIT 5 IN
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AD563 DAC with BCD input 747 op amp binary to bcd ic ttl binary bcd conversion AD562/AD563 MIL-STD-883-C ADS62 AD562KD/BIN 11/2LSB

AD562kd

Abstract: DAC with BCD input max 1/4LSB max 1/10LSB max DIFFERENTIAL NONLINEARITY ±1/2LSB max SETTLING TIME TO 1/2LSB All Bits , Coded Decimal -55°C to +125°C + 1/10LSB max 5ppm max D-24A AD563J D/BIN Binary 0 to +70°C ±1/2LSB , temperature range, -55°C to +125°C. PRODUCT HIGHLIGHTS 1. The AD562 multiplies in two quadrants when a , DAC OUT , R[ 10 20V SPAN R (77 GND [77 77] BIT 1 (MSB) IN 77] BIT 2 IN BIT 3 IN 7T] BIT 4 IN 2o] BIT 5 IN
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AD562kd ad563-specifications SiCr thin film TI Thin Film Resistors SiCr analog AD563KD AD562KD/BCD AD562AD/BIN AD562SD/BIN AD562SD/BCD AD563JD/BCD AD563KD/BIN

AD562

Abstract: DAC with BCD input max ±1/2LSB max 1/4LSB max 1/10LSB max DIFFERENTIAL NONLINEARITY ±1/2LSB max SETTLING TIME TO 1/2LSB , -24A AD562SD/BCD Binary Coded Decimal -55°C to +125°C + 1/10LSB max 5ppm max D-24A AD563J D/BIN Binary 0 to , , -55°C to +125°C. PRODUCT HIGHLIGHTS 1. The AD562 multiplies in two quadrants when a varying reference , OUT DAC OUT , .) [ 10V SPAN R[ 20V SPAN R £ GND f "jTj BIT 1 (MSB) IN "23] BIT 2 IN BIT 3 IN 7T| BIT 4 IN 2CT] BIT 5 IN
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AD563JD M1L-STD-883 AD563S AD563JDB1N ADS63 AD562SD/B1N AD563KD/BCD AD563SD/BIN AD563SD/BCD 11/4LSB AD563TD/B1N

12-Bit DAC counter

Abstract: 000251 bits on indicates a linearity error. With the superposition error less than 1/10LSB, the error , . The reference DAC and the x 10 error amplifier must have combined settling times to ±1/10LSB of less , digital code where that error occurs, with a very simple test.(1) ment of that code. The linearity , . If the error becomes large enough, a DAC may fail to meet a 1/2LSB linearity error or relative , , if we assume that the offset and gain errors have been removed: b1 (1/2 + 1 ) + b 2 ( 1/4 + 2
Burr-Brown
Original
12-Bit DAC counter 000251 55928 74191 datasheet application notes 74121 application of 7408

74191 datasheet

Abstract: AB-065 bits on indicates a linearity error. With the superposition error less than 1/10LSB, the error , . The reference DAC and the x 10 error amplifier must have combined settling times to ±1/10LSB of less , digital code where that error occurs, with a very simple test.(1) ment of that code. The linearity , . If the error becomes large enough, a DAC may fail to meet a 1/2LSB linearity error or relative , , if we assume that the offset and gain errors have been removed: b1 (1/2 + 1 ) + b 2 ( 1/4 + 2
Burr-Brown
Original
AB-065 OPA111 15VDC CAS-25

ad550

Abstract: DAC with BCD input the zero pot until the proper value is obtained with ±1/10LSB. For unipolar codes apply 00 . . 0 and , -bits -10QM lObits 1>QS 10-bits 12QM 12 bits 1!QS 12-bi,ts DIGITAL INPUTS "0" E , "0" to "1" Change. Width at Least 50ns, "0 -1" Transition at Least 100ns After Data Change. No Strobe INPUT CODES Binary, 2's Complement Compi. Binary BCD 8; Compi. BCD OUTPUT RANGES 0 to 5V 1 ±2.5V,  , (5.1) -2.01 MAX (Ii1.1l-V- 1 1 X _ 37 i
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digital to bcd converter binary bcd conversion logic diagram binary to bcd 12 bits BCD to Binary conversion circuit for the input data DAC-QM DAC with BCD input analog devices

ADC-12QZ

Abstract: AC1548 capable of being set to within 1/10LSB at both ends of its range. The ADC-12QZ's zero and gain , data into a receiving shift register. TIMING As shown in Figure 1, the leading edge ("0" to "1" transition) of the convert command pulse sets the STATUS and MSB outputs to the "1" state, and the outputs of , the starting of the internal clock. The bit decisions are made on successive "1" to "0" clock pulse , transmission of serial data. Serial data bits are valid on successive leading edges ("0" 1:0 "1" transitions
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AC1548 61T4 SN74164

AD562KD

Abstract: DAC with BCD input ±1/10LSB max * * * -55°C to +125°C lp p m o f F.S./°C Guaranteed Over Full Operating Tem , /2LSB max ±l/2LSB im ax ±1/2LSB max ±1/4LSB max ±1/10LSB max ±1/2LSB max + 1/2LSB max ±1 /4LSB max ±1 , -883-Compliant Versions Available B IT 1 (M SB) IN r ~T Li. B IT 2 IN ~22~1 B IT 3 IN R EF. V L O IN rr" I , B IT 7 IN ~V7~1 B IT 8 IN B IT 9 IN "rT [ B IT 10 IN J ^ B I T 11 IN ~T3~| B IT 12 (LSB) IN V EE -1 5 V IN (20mA) B IP O L A R O F F S E T R IN B IP O L A R O F F S E T R O U T D A C O U T (-2m A
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AD562AD/BCD 563JD/BIN AD563TD/BIN AD563TD/BCD

DAS1128

Abstract: AFULL12 be capable of being set to within ±1/10LSB of the desired value at any point within its range , { ZOT 4 21T 2 ' Figure 1. Functional Block Diagram BINARY SCALE REF ADJ MUX ADDRESS OUT COMPUTER , Inputs (8, 4, 2, 1; Pins 19B through 22B) MUX ENABLE HI (Pin 18T) MUX ENABLE LO (Pin 17B) STROBE (Pin , ) (includes 5/is for MUX and SHA settling time plus 1 5/lis for ADC) >80dB down @ 1kHz 70dB to lkH;-. 4.5/is max 10ns 7()dB down (a. 1kHz Standard DTI./TTL logic levels, 1 unit load/line Positive true
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DAS1128 AFULL12 ad56212 Delai Holdings

SOURCE CODE FOR DIGITAL WEIGHT SCALE

Abstract: 69K1 code of 000. . .00 applied, adjust the zero pot until the analog output is zero :!:1/10LSB for unipolar , maximum absolute value analog output). The logic levels of: +2.0V « Logic "1" « +15V OV « Logic "0" « , patent or patent rights of Analog Devices. Route 1 Industrial Park; P.O. Box 280; Norwood, Mass. 02062 , (1.Sl1s maxI 41.'2 Current Output OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 2.01 , for Voltage Output Mode. I Open input equivalent to Logic "1". 2 To :to.Ol % accuracy for a full scale
Analog Devices
Original
69K1 open SOURCE CODE FOR DIGITAL WEIGHT SCALE DACI009

ADC10Z

Abstract: AC1504 within ±1/10LSB at both ends of its range. The zero adjustment pot has a range of approximately  , As shown in the timing diagram below, the leading edge ("0" to "1" transition) of the convert command pulse sets the STATUS and MSB outputs to the "1" state, and the outputs of bits 2-10 to "0". The , clock. The bit decisions are made on successive "1" to "0" clock pulse transitions, with the MSB , because the serial data bits are valid on successive "1" to "0" strobe pulse transitions. At the
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SN7496 ADC10Z AC1504 ADC-10Z

SHA-2A

Abstract: ADC1103-003 of being set to within 1/10LSB of the desired value at both ends of its range. The gain and offset , correlators. TIMING As shown in Figure 1, the Status output is set to a Logic "1" on the leading edge of the , "1", the remaining bit outputs are set to "0", and the conversion commences. The output data is valid 4ns prior to the "1" to "0" transition of the STATUS output (or "0" to "1" transition of the STATUS , available, MSB first, on successive "0" to "1" DATA STROBE transitions. J~L _n_ !â'¢ STROBE w SERIAL
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ADC1103 SHA-2A ADC1103-003 SN7493N sha2a et 1103 ADC1103-00 ADC1103-002

S1152

Abstract: capable of being set to within ± 1/10LSB of the desired value at any point within its range. O F F S E , supply bypass capacitors (as shown in Figure 1). Four analog input voltage ranges are selectable via , 1 D ro o p R ate D ielectric A b s o r p t i o n Error QölbflGQ G G 3 1 3 b 2 5 â  T , m iT S tism a x 50 n s In s -9 6 d B * O.OSilV / lis (0 .1 m / h s m ax) .V ± 0.005 , /D ) ± 0 .0 0 3 % F S R 1 m ax Guaranteed 75jxV rmsv SO fiV n n s S T A B IL IT Y D
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S1152 DAS1152/DAS1153 DAS1153 DAS1152 1152/DAS DASU53 DAS1152/DASU53

MAX514

Abstract: MAX514ACNG than 1/10LSB. The output-amplifier input bias current (Ib) can also limit performance since Ib x Rfb , 19-4516; Rev 1; 2/97 CMOS Quad, 12-Bit, Serial-Input Multiplying DAC _General Description , ) MAX514ACNG 0°C to +70°C 24 Narrow Plastic DIP ±1/2 MAX514BCNG 0°C to +70°C 24 Narrow Plastic DIP ±1 MAX514ACWI 0°C to +70°C 28 Wide SO ±1/2 MAX514BCWI 0°C to +70°C 28 Wide SO ±1 MAX514AENG -40°C to +85°C 24 Narrow Plastic DIP ±1/2 MAX514BENG -40°C to +85°C 24 Narrow Plastic DIP ±1 MAX514AEWI
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MAX514 MAX514BEWI 12-BIT

AD563JD

Abstract: DAC with BCD input ACCURACY @ +25°C ±1/2LSB max ±1/2LSB max ±l/2L SB nnax ±1/2LSB max ±1/4LSB max ±1/10LSB max ±1/2LSB max ±1 , -Bit D/A Converters AD562/AD563* PIN CONFIGURATIONS rr · LL rr L i. Q" V / ~24*| B IT 1 (M SB) I 23 , ] AD562 TO P VIEW (N ot to Scale) B IT 4 IN ~20~| B IT 5 IN [~19~] B IT 6 IN ~ 18~ 1 B IT 7 IN , the extended tem perature range, -55°C to +125°C. PRODUCT HIGHLIGHTS 1. The AD562 multiplies in two , G IC T H R ES H O LD fT" rr · z T ] B IT 1 (MSB) 2 3 ] B IT 2 IN Li. R E F E R E N C
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MIL-STD-883 AD562AD/B1N AD563JD/B1N

AD563

Abstract: D562A ACCURACY @ +25°C ±1/2LSB m ax ±1/2LSB max ±l/2LSBm nax ±1/2LSB m ax ±1/4LSB max ±1/10LSB m ax ±1/2LSB max , ANALOG D EV IC ES A D 562, AD563 v cc «-5V/+15V IN r r I !5 m A I L _ 1 C 12-Bit D/A , packaged in a 24-pin, herm etically sealed, ceramic, dual-in-line package. PRODUCT HIGHLIGHTS 1. The AD562 , L Y IN ~24~| B IT 1 1 7 ] B IT 2 ~2z\ B IT 3 ~21~| B IT 4 ~2o] B IT 5 R E F E R E N C E O U T , ) T T L , V c c = + 5 V , P in 2 O p e n C irc u it B it O N L o g ic " 1 " B i t O F F L o g ic " 0*'
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D562A 562/A 562KD/BCD 562SD 563JD D563K 563SD
Abstract: PROCEDURE A voltmeter capable of 1/10LSB resolution and accuracy (e.g., 15/iV for a 16 bit DAC) at both , until an output of 0V ±1/10LSB is obtained. OUTLINE DIMENSIONS AND PIN DESIGNATIONS Dimensions shown , PROCEDURE A voltmeter capable of 1/10LSB resolution and accuracy (e.g., 15/j.V for a 0 to +10V, 16 bit DAC , 's output is within ±1/10LSB of zero. For bipolar units, strobe in the code that should give minus full , scale minus 1LSB within ±1/10LSB. CINCH CONNECTOR 251 22 30 160 (SUPPLIED! PIN FUNCTION PIN FUNCTION National Semiconductor
Original
SNIS131D

LM40s

Abstract: max 1/4LSB max 1/10LSB max DIFFERENTIAL NONLINEARITY ±1/2LSB max SETTLING TIME TO 1/2LSB All Bits , Coded Decimal -55°C to +125°C + 1/10LSB max 5ppm max D-24A AD563J D/BIN Binary 0 to +70°C ±1/2LSB
National Semiconductor
Original
LM40s SNIS130D

256KDRAM

Abstract: DS1237 of clear and stable resolution of 1/10LSB in the region of zero and full scale. The adjustment , adjust the offset potentiometer until an output of 0V ±1/10LSB is obtained. For bipolar units apply a , shown in Table 3 is obtained within ±1/10LSB. Once the appropriate offset adjustment has been made , output shown in Table 2 or Table 3 is obtained within ±1/10LSB. POWER SUPPLY AND GROUNDING CONNECTIONS
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DS1237 256KDRAM DS1237S

LM32A

Abstract: 100cjd bits on indicates a linearity error. With the superposition error less than 1/10LSB, the error , . The reference DAC and the x 10 error amplifier must have combined settling times to ±1/10LSB of less
National Semiconductor
Original
SNIS132D LM32A 100cjd 0549H
Abstract: ±1/10LSB max * * * -55°C to +125°C lp p m o f F.S./°C Guaranteed Over Full Operating Tem , /2LSB max ±l/2LSB im ax ±1/2LSB max ±1/4LSB max ±1/10LSB max ±1/2LSB max + 1/2LSB max ±1 /4LSB max ±1 -
OCR Scan
16-PIN S1237
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