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Abstract: ); T0L = (STARTCOUNT & 0x00FF); T0RH = (RELOAD >> 8); T0RL = (RELOAD & 0x00FF); #ifdef , , prescale = 4 T0H = (STARTCOUNT >> 8); // Set starting count value = 0001h T0L = (STARTCOUNT & 0x00FF); T0RH = (RELOAD >> 8); // Set reload value = 1201h (1msec) T0RL = (RELOAD & 0x00FF); #ifdef , (STARTCOUNT & 0x00FF); T0RH = (COUNTER >> 8); T0RL = (COUNTER & 0x00FF); #ifdef TIMER0_ISR_ENABLE , 0x00FF); T0RH = (COUNTER >> 8); // Set reload value = 0005h T0RL = (COUNTER & 0x00FF); AN029102 ZiLOG
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F1680 la1034 la1034 intronix F0823 Z8F642 LA103 Z8F0822 AN029102-0810 AN0291-SC02
Abstract:  16â'bit Unicode   Address: Address of character data    if(UNICODE >= 0x0080 && UNICODE ,   if(UNICODE >= 0x0080 && UNICODE , 0x0080 && UNICODE ,  16â'bit Unicode   Address: Address of character data    if(UNICODE >= 0x0080 && UNICODE , : Address of character data    if(UNICODE >= 0x0080 && UNICODE Newhaven Display
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ISO8859
Abstract: */ FWPROGRAM->FMBAC1 = 0x00FF; /* active */ FWPROGRAM->FMBAC2 = 0x7F00 | FLASHWS; /* wait states , */ FWPROGRAM->FMMAC2 = 0xFFFC; /* bank4 */ FWPROGRAM->FMBAC1 = 0x00FF; /* active */ FWPROGRAM , */ FWPROGRAM->FMBAC1 = 0x00FF; /* active */ FWPROGRAM->FMBAC2 = 0x7F00 | FLASHWS; /* wait states */ FWPROGRAM->FMMAC2 = 0xFFFE; /* bank6 */ FWPROGRAM->FMBAC1 = 0x00FF; /* active */ FWPROGRAM , */ FWPROGRAM->FMBAC1 = 0x00FF; /* active */ FWPROGRAM->FMBAC2 = 0x7F00 | FLASHWS; /* wait states Texas Instruments
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TMS470 F05 interrupt programming in TMS470 tms470 Interrupt 0X0072 Bootloader, tms470 0xfffffe10 SPNA066 TMS470R1 SE470R1VB8AD
Abstract: _LEDShowAny_8_16 (2, 0xa55a, &_pd, 0x0f, 0x00ff) MCU PB 0x5a PC PD (COM ) 2 ( pd.2) 0 (pd0,pd1,pd3 , _LEDShowAny_16_16(2, 0xa55a, 0x00ff, 0x00ff) MCU PB 0x5a PC PD (COM ) 2 ( pd.2) 0 1PE 7 - -
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HT46R94 IDE3000 16x16 LED comport led 16X16 uint16 0xa55a HA0167T
Abstract: 0x00ff_ffff 0x0021_2000 Large 0x0000_0000 0x0080_0000 0xffff_ffff (8MB) 0x0100_0000 , 0x00ff_ffff) far .ftext.vftext tiny small data 64 .sdata.sbss ( 1) near 24 .data.bss (0x0000_0000 0x00ff_ffff) far .fdata.fbss based .based tiny data.s .srodata near 24 .rodata (0x0000_0000 0x00ff_ffff) far .frodata malloc , near code.m _near 24 (0x0000_0000 0x00ff_ffff) near VLIW code.m _vliw Toshiba
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MEPUM03025-J34 TULINK-Error-235 pragma section TULINK-Warning-511 TULINK-Error-211 Error-701 MEP toshiba
Abstract: 1T without MDU 12T without MDU 0x0000FFFF / 0x00FF 4.560 33.88 280.0 0xFFFFFFFF / 0xFFFF 4.601 36.40 302.0 0xFFFF / 0x00FF 2.320 8.404 64.30 0xFFFF / 0xFFFF 2.320 9.200 76.84 0x00FF x 0xFFFF 6.599 7.922 62.01 0xFFFF x 0xFFFF 6.639 , _002= 0x00FF; P3_0 =0; ul_data_001 = ul_data_002/ui_data_002; //4.560us @25MHz 1T with MDU //33.88us , ; ui_data_003= 0x00FF; P3_2 =0; //trig ui_data_001 = ui_data_002/ui_data_003; //2.32us @25MHz SyncMOS Technologies
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SM59R04A2 17 mdu 002 SM59R04 0x00080001 mdu application note mdu DATASHEET SM59R03A2/SM59R02A2 SM59R 0000FFFF 800FFFFF ISSFA-0154
Abstract: ~0x00FF are reserved and user can not use it. The IDE tool will avoid this area, it place tables and data from 0x0100 to 0x7FFF. Voice memory Reserved (256 bytes) 0x0000 0x00FF Available for user -
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EM61002 ap-em61 AP-EM61-0002E-V1
Abstract: Control 0x00FF_FDE0 0x00FF_FDE2 Serial-Flash Password Enabled Disabled Flash !0x55AA , 0x00FFFC00 0x00FFFDE0 0x00FFFDD8 0x00FFFDDC 0xFEEDFACE 0xCAFEBEEF 0xA1A11111 0xC3C33333 0x800FFFFF , Censorship Information The censorship information is located in the shadow block at address 0x00FF_FDE0 on , Password Address: 0x00FF_FDD8 Value: 0xFEED MSB 0 1 2 3 4 5 6 7 8 9 , 1 0 1 1 0 1 Hex value F E E D Address: 0x00FF_FDDA Value: 0xFACE Freescale Semiconductor
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H7F Driver SSD reset boot vector mpc55xx MPC563x MPC55XX JTAG NEXUS FLASH ERASE 0x55aa55aa AN3787 MPC55 MPC563
Abstract: usbserial_recv(&inrec.sum, 1); chk ^= 0xffff; chk &= 0x00ff; if (chk != inrec.sum) { ret = -1; goto end , outrec[3]; sum ^= 0xffff; sum &= 0x00ff; outrec[4] = (UINT8)sum; usbf78k0r_send_buf(outrec, 5 , inrec.data[3]; for (i=6;i>0;i-) { sum += outrec[i]; } sum ^= 0xffff; sum &= 0x00ff; outrec[7] = , ]; sum = outrec[1] + outrec[2] + outrec[3]; sum ^= 0xffff; sum &= 0x00ff; outrec[4] = (UINT8)sum , ; sum &= 0x00ff; outrec[4] = (UINT8)sum; usbf78k0r_send_buf(outrec, 5); } U20291JJ1V0AN00 47 NEC
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U19193J CC78K0R RA78K0R fe20h xxx void 78K0R 78K0RUSB M8E0909J 78K0R/KC3-L 78K0R/KE3-L U17792J
Abstract: ; RMS45R = 0x0808; RMS67R = 0x0808; MTYPER = 0x00FF; /* Set MR(MT) to `1' */ MR = MR | 0x0020 , // wait until Sn_SSR is changed to SOCK_INIT while(S1_SSR & 0x00FF) != SOCK_INIT); © Copyright 2008 , SOCK_CLOSED while(S1_SSR & 0x00FF) != SOCK_CLOSED); /* Clear the `MT' bit of MR */ MR = MR & 0xFFDF , Offset of MTYPER // 0x0030 IDM_DR = 0x00FF; /* Set MR(MT) to `1' */ MR = MR | 0x0020; /* SOCKET , changed to SOCK_INIT IDM_AR = Address Offset of S1_SSR; while(IDM_DR & 0x00FF) != SOCK_INIT); /* Test WIZnet
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W5300 s1cr wiznet W5300 128KB
Abstract: . Table 1. Boot Modes Censorship Serial Boot Control Control 0x00FF_FDE0 0x00FF_FDE2 Internal , LOW_ADDR_SR_UNLOCK 0x00FFFC00 0x00FFFDE0 0x00FFFDD8 0x00FFFDDC 0xFEEDFACE 0xCAFEBEEF 0xA1A11111 0xC3C33333 , 0x00FF_FDE0 on the MPC55xx. Careful steps must be taken to preserve these values while modifying the , . Serial Boot Flash Password Address: 0x00FF_FDD8 Value: 0xFEED MSB 0 1 2 3 4 5 , 1 0 1 1 1 0 1 1 0 1 Hex value F E E D Address: 0x00FF_FDDA Freescale Semiconductor
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MPC5533 MPC5534 MPC5553 MPC5554 MPC5565 MPC5566 Nexus S JTAG pins NEXUS MPC5567 MPC551
Abstract: (unsigned short) (Result & 0x00FF); // store Z LSByte TX_BUFFER = 0; while (!(IRQ_REG & RX_IFG); Result , (unsigned short) (Result & 0x00FF); // store Y LSByte TX_BUFFER = 0; while (!(IRQ_REG & RX_IFG , 0x00FF); // store X LSByte wait_us(SPICSBDELAY); PORT_CSB_OUT |= PIN_CSB; // Delay to satisfy 1 , Result = RX_BUFFER; *Zrate |= (unsigned short) (Result & 0x00FF); // Fill receive data buffer with , Result = RX_BUFFER; *Yrate |= (unsigned short) (Result & 0x00FF); // Fill receive data buffer with VTI Technologies
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CMR3000-D01 MSP430 CMR3000-D0X CMR3000D01 digital gyro SPI eZ430 CMR3000 Z430-RF2500 VTI29631 FI-01621
Abstract: ), "g" (value) ) /* A0 = 0 */ /* nCS = 0 */ /* nWR = 0 */ INPLACE_OR(GPIO0_DIR_REG, 0x00FF , 0 */ /* nWR = 0 */ INPLACE_OR(GPIO0_DIR_REG, 0x00FF); WRITE_REGISTER(GPIO0_OUT_DATA_REG, data , (GPIO0_DIR_REG, 0xFF00); /*Write Address*/ data = (READ_REGISTER(GPIO0_IN_DATA_REG) & 0x00FF); INPLACE_OR , */ INPLACE_OR(GPIO0_OUT_DATA_REG, 0x00FF); INPLACE_OR(GPIO1_OUT_DATA_REG, 0x00E8); INPLACE_OR(GPIO0_DIR_REG, 0x00FF); INPLACE_OR(GPIO1_DIR_REG, 0x00FF); /* Data Port */ /* A0 = nCS = nRD = nWR = 1 */ 4 ZiLOG
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AN031201-0211 Z16FMC AN0312-SC01
Abstract: ), "g" (value) ) /* A0 = 0 */ /* nCS = 0 */ /* nWR = 0 */ INPLACE_OR(GPIO0_DIR_REG, 0x00FF , 0 */ /* nWR = 0 */ INPLACE_OR(GPIO0_DIR_REG, 0x00FF); WRITE_REGISTER(GPIO0_OUT_DATA_REG, data , (GPIO0_DIR_REG, 0xFF00); /*Write Address*/ data = (READ_REGISTER(GPIO0_IN_DATA_REG) & 0x00FF); INPLACE_OR , */ INPLACE_OR(GPIO0_OUT_DATA_REG, 0x00FF); INPLACE_OR(GPIO1_OUT_DATA_REG, 0x00E8); INPLACE_OR(GPIO0_DIR_REG, 0x00FF); INPLACE_OR(GPIO1_DIR_REG, 0x00FF); /* Data Port */ /* A0 = nCS = nRD = nWR = 1 */ 4 [+ Cypress Semiconductor
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CY3663 AN048 BIOS example source code cy16-elf-objdump
Abstract: XFER_REG? 0x00FF? Prior Addr Prior Data Addr n Data n XFER_REG 0x00FF Figure 21. Detection of Error in , write data into the appropriate address. Set this register to 0x00FF to perform a XFER_REG command , XFER_REG command (a write of 0x00FF to XFER_REG[0x01]) to load the transferred data into the register , Prior Addr Data n Prior Data XFER_REG Addr n 0x00FF Data n SDO Figure 18. Protected SPI , 9 24 SDI Addr n Data n XFER_REG 0x00FF NOP 0xXXXX SDO Prior Addr Prior Cypress Semiconductor
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cy16-elf-gdb cy16-elf-ld cy16-elf-objcopy
Abstract: 0x00FF 1 2 8 NOP 9 24 0xXXXX Error reported to MCU XFER_REG? 0x00FF? Prior , into the appropriate address. Set this register to 0x00FF to perform a XFER_REG command. Table 2 , require a subsequent XFER_REG command (a write of 0x00FF to XFER_REG[0x01]) to load the transferred data , 0x00FF Addr n Data n Figure 18. Protected SPI writes SPI Write Error Correction To minimize , SDI Addr n Data n XFER_REG 0x00FF NOP 0xXXXX SDO Prior Addr Prior Data Texas Instruments
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2N3904 npn bjt transistor DAC161S997 SNAS621 WQFN-16 ISO/TS16949
Abstract: 4 (char)(states addr0(i 2) 0x00FF) data i01 4 (char)(states addr0(i 2) ll8) 0x00FF) * write , (char)(states 252 0x00FF) data 1 4 (char)(states 252 ll8) 0x00FF) wr ihex data rec(outfile 252*2 2 , (outfile `Tn %2 2X%4 4X00` recsize addr) csum 4 recsize 0 (char)addr 0x00FF) 0 (char)(addrll8) 0x00FF , * checksum field * csum 4 0x00FF csum *4 11 fprintf(outfile `%2 2X` csum) 20 unsigned Texas Instruments
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Abstract: ); SpiSendData(addr+idx) & 0x00FF); // Address byte 1 // Address byte 2 0x00 // Address : 16bits // Data length , & 0x7F00) >> 8); // Data length bottom 8bits SpiSendData(data_len& 0x00FF); // Read data:On data_len> 1 , ) >> 8); SpiSendData(addr+idx) & 0x00FF); // Address byte 1 // Address byte 2 // Data write , length bottom 8bits SpiSendData(data_len& 0x00FF); // Write data: On data_len> 1, Burst Write National Semiconductor
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10 band graphic equalizer LM835 lm835 FSA2619 FSA2619P LMC35 National Semiconductor AN-140 D-82256
Abstract: ; ///////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////// . // Set I2SCLKF0.DENOM[7:0] I2SCLKF0 = (unsigned char)(i2sDenom & 0x00FF); // Set I2SCLKF2.DENOM , )(i2sNum >> 8) & 0x00FF); // Set I2SCLKF1.NUM[7:0] I2SCLKF1 = (unsigned char)(i2sNum & 0x00FF , , to I2SDATL/H I2SDATL = i2sLeftWord & 0x00FF; I2SDATH = (i2sLeftWord >> 8) & 0x00FF; } // Else , to I2SDATL/H if (!(I2SSTAT & 0x20) { I2SDATL = i2sLeftWord&0x00FF; I2SDATH = (i2sLeftWord >> 8) & 0x00FF; // Else, I2S right channel ready, write right word to I2SDATL/H } else { I2SDATL = WIZnet
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W5200 MAGJACK application pcb wiz820io spi 4.2 master code WIZ820
Abstract: ); } else{ temp = (0x0+link) , 0x3100|( (read_reg( 0x0321 + group- 0x4) & 0x00FF); write_reg( 0x0321 + group - 0x4, temp); } for ( i = , _2 & not used + 0x001a, temp); Application Note // start ICP cell transfer temp = 0x00FF & ~(1 , ); write_reg( 0x00C0 +link, temp); } else{ temp = 0x0000 | ( (read_reg( 0x00C0+link-0x8) & 0x00FF); write_reg , 0xFF00); write_reg( 0x00C0 +link, temp); } else{ temp = 0x4000 | ( (read_reg( 0x00C0 +link-0x8) & 0x00FF Texas Instruments
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CC1110 CC1111 CC2510 CC2511 TLV320AIC26 i2s specification i2s full duplex CC2510FX CC251xFx DN109 CC111 CC251
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