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"Logic Gate"
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digital clock using logic gatesAbstract: specifications of and logic gates logic array and embedded array gates are calculated. APEX 20K gates are compared to gate array gates, using LSI Logic's LCA300K family of standard "seaofgates" gate arrays as a reference. Gate Count , . Logic Array The logic array performs the same function as the seaofgates in a gate array; it is , implements productterm logic. 2 Altera Corporation AN 110: Gate Counting Methodology for APEX 20K , embedded array are used for both memory and logic functions. Maximum System Gate Count Maximum 
Altera Original 

EP20K100E EP20K100 EP20K160E EP20K200E EP20K200 EP20K300E digital clock using logic gates specifications of and logic gates digital clock using gates datasheets of the basic logic gates or gates 8 bit XOR Gates EP20K60E 
cmos nand gate open collectorAbstract: ttl nand gate Logic Products by Function Gate Products Logic Product Family Product Description , DM7400 BipolarTTL Quad 2Input NAND Gate DIP SOIC 5 www.fairchildsemi.com Logic Products by Function Gate (Continued) Products Logic Product Family Product Description , www.fairchildsemi.com Logic Products by Function Gate (Continued) Products Logic Product Family Product , Gate (Continued) Products Logic Product Family Product Description Package Voltage Node 
Fairchild Semiconductor Original 

74LVQ00 cmos nand gate open collector ttl nand gate TTL NOR Gate 74F00 series logic family nand gate 74AC00 74ACT00 74ACTQ00 74ALVC00 74F00 74LCX00 
application of programmable array logicAbstract: verilog code for implementation of eeprom Logic for Gate Array Designs Timetomarket advantagePLD designs offer quick and easy , hidden costs are considered. See the Gate Array vs. Programmable Logic Cost Analysis White Paper for a , Altera Gate ArraytoProgrammable Logic Conversion Kit, engineers can convert architecturespecific , Programmable Logic for Gate Array Designs Altera's MAX+PLUS II development software greatly simplifies the , Altera Corporation AN 51: Using Programmable Logic for Gate Array Designs Design Flow The 
Altera Original 

application of programmable array logic verilog code for implementation of eeprom altera application note 
full adder circuit using nor gatesAbstract: full adder circuit using xor and nand gates both gate counts and bits of memory, as shown in Table 1 and Table 2: "Maximum Logic Gates," "Maximum , counts for a sampling of logic functions; these gate counts are taken directly from a typical , 33K 42K 51K 62K 74K Typical Gate Range (Logic and Memory) 2K  5K 3K  9K 4K  12K 6K  , Table 3: Gate Counts for Some Common Logic Functions Function Combinatorial functions: 2input NAND , systemlevel designs, 2 Max. Logic Gates 3K 6K 10K 16K 23K Typical Gate Range 2K  3K 4K  6K 
Xilinx Original 

XC4000 XC5000 full adder circuit using nor gates full adder circuit using xor and nand gates XC4005E/XL figure of full adder circuit using nor gates XC4025E 
FDP2532Abstract: mosfet ignition coil Number Gate Drive FDSS2407 Logic Level BVDSS Min. (V) Config 62 Dual RDS(ON) Max (W) @ VGS= 10V 5V 0.110 , Logic Level Logic Level Logic Level Logic Level Logic Level Standard Gate Standard Gate Standard Gate , Standard Gate FDP050AN06A0 Standard Gate FDB5800 Logic Level 60 60 60 60 60 60 60 60 60 60 60 60 60 , FDP14AN06LA0 Logic Level Logic Level Logic Level FDB13AN06A0 Standard Gate FDP13AN06A0 Standard Gate FDD13AN06A0 Standard Gate HUFA76437P3 HUFA76437S3S HUFA76432P3 HUFA76432S3S FDP24AN06LA0 Logic Level 
Fairchild Semiconductor Original 

FDP2532 mosfet ignition coil FDH047AN piezo injector SCHEMATIC IGNITION WITH IGBTS FHP3392 18FA 247TM 
piezo injector driverAbstract: common rail piezo injector driver Level Logic Level FDD13AN06A0 Standard Gate 60 Single 0.0135 22 50 115 , Single 0.0200 0.0270 34 35 88 TO252 (DPAK) FDB20AN06A0 Standard Gate Logic , /Solenoid Driver Part Number Gate Drive FDSS2407 BVDSS Min. (V) Config Logic Level 62 , ignition High Voltage (HVIC) Gate Drivers. 12 designs. Our leadingedge IGBTs and MOSFETs are , ISense High Voltage (HVIC) Gate Drivers Max. VBS VCC (V) Reset Input Recharge Part 
Fairchild Semiconductor Original 

piezo injector driver common rail piezo injector driver FDDS10H04 diesel piezo injector Common rail injector driver common rail injector test 
5 inputs OR gate truth tableAbstract: 6 inputs OR gate truth table gates provide basic boolean operations. The output of a logic gate is a boolean combinatorial function , . When to Use a Logic Gate Use logic gates when you want to perform basic logical operations. You can , the description of that I/O. Input 1 Every logic gate has at least one digital input Input 2 , Output All logic gates have one output. Component Parameters Drag a logic gate onto your design and , array width of the input and output terminals (default is 1). You can create an array of the logic gate 
Cypress Semiconductor Original 

5 inputs OR gate truth table 6 inputs OR gate truth table truth table for 7 inputs OR gate 4 inputs OR gate truth table Logic Gates truth table for 4 inputs OR gate 
full adder circuit using xor and nand gatesAbstract: sla9000 : Maximum Logic Gates, Maximum Memory Bits, and Typical Gate Range. The methodology used to determine these , ." "Gate counting" involves measuring logic capacity in terms of the number of 2input NAND gates that , Gate Range." These tables also list the actual number of Configurable Logic Blocks (CLBs) or logic , carry logic. Using Table 3 as a guide, the potential gate count for a single CLB can be derived. (Table 3 lists the gate counts for a sampling of logic functions; these gate counts are taken directly 
Xilinx Original 

sla9000 X4956 Product Selection Guide xilinx XC4003E XC4005E XC4006E 
SC70Abstract: NC7WZ125 Configurable 2Input Logic Gates MicroPakTM SC70 1.8 2.5 3.3 5 NC7SZ58 Gate TinyLogicTM UHS , Logic Products by Family TinyLogicTM UHS Series Products Logic Product Function Product Description NC7SZ00 Gate TinyLogicTM UHS 2Input NAND Gate NC7WZ00 Gate TinyLogicTM UHS Dual 2Input NAND Gate NC7SZ02 Gate TinyLogicTM UHS 2Input NOR Gate NC7WZ02 Gate , 3.3 5 MicroPakTM SC70 SOT23 1.8 2.5 3.3 5 TinyLogicTM UHS Dual 2Input NOR Gate US8 
Fairchild Semiconductor Original 

NC7NZ04 NC7NZU04 NC7SZ04 NC7SZU04 NC7WZ04 NC7WZU04 SC70 NC7WZ125 
68HC24Abstract: 14049UB easily interfaced to most logic families. Design of the MOSFETs gate drive is dependent on the MOSFET , device will drive the Logic Level Power MOSFETs gate to within 50 mV of Vqd However, if the Vqd supply , guarantee the logic device s output low voltage, Vol. of 0.5 volts. During turn on, gate drive current is , dissipates most the gate drive power losses, instead of the logic device, reducing stress on the logic output , . Limiting the current with a large gate resistor and carefully decoupling the logic device will reduce the 
 OCR Scan 

68HC24 14049UB mc14000 series 74LS04 Hex Inverter Gate function table 74LS24074HC240 74LS04 NOT gate AN1102/D AN1102 25178T 
Abstract: transducer drivers. The MD1715 is a two channel logic controller circuit with 12 low impedance MOSFET gate , Maximum Ratings Parameter GND and AGND, Ground VLL logic input pin AVDD, VDD1, positive gate drive supply , Supply Voltages Sym VLL AVDD AVSS, VSS Parameter Logic supply Positive analog supply Negative gate drive , OP1 GP1 DP1 VDD2 ON1 GN1 VNN1 SN1 High Speed Gate Buffers SP2 VDD1 OP2 SEL POS NEG Control Logic and , channel B. See logic truth table for details. Positive supply voltage of the gate drivers for the output 
Supertex Original 

TC8020 MO220 DSPD40QFNK66X6P050 C041009 DSFPMD1715 B011612 
HP 2211 optocouplerAbstract: HP 2300 optocoupler Easier interface in low power applications 5 MBd Logic Gate Optocoupler Single Channel High CMR , reversed 5 MBd Logic Gate Optocoupler Single Channel SO8 Part Number Package 300 mil SO 8 DIP , 3 3) PIN 6 not connected 5 MBd Logic Gate Optocoupler Single Channel Wide Body Part Number , ) PIN 6 not connected 5 MBd Logic Gate Optocoupler Single Channel Low Current Part Number HCPL , ) 630 V peak VDE 0884 with option 060 5 MBd Logic Gate Optocoupler Dual Channel High CMR Part 
HewlettPackard Original 

HCPL2211 HCPL2212 HCPL0211 HCNW2211 HCPL0201 HCPL2300 HP 2211 optocoupler HP 2300 optocoupler optocoupler 630 optocoupler A 2232 hp 2211 2232 OPTOCOUPLER 
AND GateAbstract: dual schmitttrigger inverters /CMOS Logic Level Shifter Single 2Input NAND Gate with Open Drain Output Single 2Input NOR Gate Single 2Input NOR Gate/CMOS Logic Level Shifter Single 2Input NOR Gate with Open Drain Output Single 2Input AND Gate Single 2Input AND Gate/CMOS Logic Level Shifter Device MC74VHC1G00 MC74VHC1GT00 MC74VHC1G01 , Single 2Input OR Gate/CMOS Logic Level Shifter Single 2Input Exclusive OR Gate Single 2Input Exclusive OR Gate/CMOS Logic Level Shifter Single 2Input NAND SchmittTrigger Single 2Input NAND 
ON Semiconductor Original 

AND Gate dual schmitttrigger inverters TTL 3 input or gate MC74VHC1G04 MC74VHC1GT04 MC74VHC1GU04 MC74VHC1G05 MC74VHC1G07 MC74VHC1G14 
Abstract: can use multiple cells s Digital Features: Gate delays to 160ps Differential logic giving , inverters is that overall system speed can be increased for a given gate delay. Fig. 4 DX series logic , options for DX series logic matrix 4 Fig. 5 DX series 3input AND gate ULA DX Series Fig. 6 DX , equivalent gate delays. Differential logic is based on steering current through a logic tree by means of , to a gate delay of 500ps and, moreover,the differential logic element consumes only one third the 
GEC Plessey Semiconductors Original 

DS3746 600MH 
TC8020Abstract: logic gate diagram of ic transducer drivers. The MD1716 is a three channel logic controller circuit with 12 low impedance MOSFET gate drivers. There are three sets of control logic inputs, one each for channels A, B and C. Each channel , Ratings Parameter GND and AGND, Ground VLL logic input pin AVDD1, VDD1, positive gate drive supply VDD2 , VPP SP1 VLL/EN High Speed Gate Buffers VDD POSA NEGA AGND Control Logic and Level , channels 1.8 to 3.3V CMOS logic interface Smart logic threshold Low inductance package General 
Supertex Original 

logic gate diagram of ic logic level n channel MOSFET DN1 marking A09011 DSFPMD1716 A090111 
ultrasound flaw circuit driverAbstract: 4 inputs OR gate truth table transducer drivers. The MD1716 is a three channel logic controller circuit with 12 low impedance MOSFET gate drivers. There are three sets of control logic inputs, one each for channels A, B and C. Each channel , Ratings Parameter GND and AGND, Ground VLL logic input pin AVDD1, VDD1, positive gate drive supply VDD2 , VPP SP1 VLL/EN High Speed Gate Buffers VDD POSA NEGA AGND Control Logic and Level , channels 1.8 to 3.3V CMOS logic interface Smart logic threshold Low inductance package General 
Supertex Original 

ultrasound flaw circuit driver 
74F579Abstract: jk flip flop Logic Products by Family FAST Products Logic Product Function Product Description , Gate Quad 2Input NAND Gate DIP SOIC SOP 5 74F02 Gate Quad 2Input NOR Gate DIP SOIC SOP 5 74F04 Inverter Hex Inverter DIP SOIC SOP 5 74F08 Gate Quad 2Input AND Gate DIP SOIC SOP 5 74F10 Gate Triple 3Input NAND Gate DIP SOIC SOP 5 74F11 Gate Triple 3Input AND Gate DIP SOIC SOP 5 74F14 Inverter Hex Inverter 
Fairchild Semiconductor Original 

74F20 74F27 74F30 74F32 74F579 jk flip flop JK Shift Register 16 to 4 encoder dip d flip flop 74F37 74F38 
DV46 1Abstract: Differential logic giving unprecedented speed/ power performance Selective speedingup option Excellent gate , increases the effective gate count. 2, All DV core cells are for multilevel (3) differential logic macro , , PNOR and WNOR. The basic low power NOR gate uses current mode logic (CML) and is used whenever , Average gate ICC at 1ns = 48ÂµA at high speed DT (3level differential logic matrix) DVA option DVB , Fig. 6 DT matrix cell layout Fig. 5 DT logic gate schematic Fig. 7 DV series 3input AND gate 
GEC Plessey Semiconductors Original 

DV46 1 DS2468 200MH 
halfadder by using D flipflopAbstract: ME 9926 of any logic function through the exclusive use of gate elements. Individual gate elements may be , RULES TYPICAL APPLICATIONS Vcc SIX INPUT GATE POSITIVE LOGIC: A+B+C+D+E+F=ABCDEF NEGATIVE LOGIC , halfadder, an exclusive OR gate, or any other similar logic construction. Output No. 7 is a noninverting , select one of two data streams under Control of a single gate signal. H = HIGH L = LOW POSITIVE LOGIC: H , INPUT GATE POSITIVE LOGIC: A+B+C+D+E+F+G+H=ABCDEFGH NEGATIVE LOGIC: ABCDEFGH=A+B + C + D + E+ F + G + H 
 OCR Scan 

halfadder by using D flipflop ME 9926 L9915 fairchild micrologic rs FLIPFLOP SCHEMATIC rtl micrologic 900 SL218 
OP1AAbstract: MD1716 transducer drivers. The MD1716 is a three channel logic controller circuit with 12 low impedance MOSFET gate , Ratings Parameter GND and AGND, Ground VLL logic input pin AVDD1, VDD1, positive gate drive supply VDD2 , Supply Voltages Sym VLL AVDD VDD Parameter Logic supply Positive analog supply Positive gate drive , Gate Buffers VDD POSA NEGA AGND Control Logic and Level Translation OP2A Circuit Pin , channels 1.8 to 3.3V CMOS logic interface Smart logic threshold Low inductance package General 
Supertex Original 

OP1A A083111 
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