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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTM9003CV-AA#PBF Linear Technology LTM9003 - 12-Bit Digital Pre-Distortion Receiver Subsystem; Package: LGA; Pins: 108; Temperature Range: 0°C to 70°C
LTM9003CV-AB#PBF Linear Technology LTM9003 - 12-Bit Digital Pre-Distortion Receiver Subsystem; Package: LGA; Pins: 108; Temperature Range: 0°C to 70°C
LTM9003IV-AB#PBF Linear Technology LTM9003 - 12-Bit Digital Pre-Distortion Receiver Subsystem; Package: LGA; Pins: 108; Temperature Range: -40°C to 85°C
LTM9003IV-AA#PBF Linear Technology LTM9003 - 12-Bit Digital Pre-Distortion Receiver Subsystem; Package: LGA; Pins: 108; Temperature Range: -40°C to 85°C
LTC6601IUF-2#TRPBF Linear Technology LTC6601-2 - Low Power, Low Distortion, Low Power, Low Distortion, 5MHz to 27MHz, Pin Configurable Filter/ADC Driver; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C
LTC6601IUF-2#PBF Linear Technology LTC6601-2 - Low Power, Low Distortion, Low Power, Low Distortion, 5MHz to 27MHz, Pin Configurable Filter/ADC Driver; Package: QFN; Pins: 20; Temperature Range: -40°C to 85°C

xilinx digital Pre-distortion Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2010 - xilinx digital Pre-distortion

Abstract:
Text: × 2.32mm LGA Xilinx Digital Predistortion LogiCORE IP Core The Xilinx digital predistortion , Digital Predistortion Solutions TRANSMIT PATH DSP DAC DPD PA ADC FEEDBACK PATH , and is a significant factor in the operating expense for the service provider. Since complex digital , is most efficient. To improve PA efficiency, designers use digital techniques to reduce the crest factor and improve PA linearity, allowing it to run closer to saturation. Digital predistortion (DPD) has


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PDF com/9003 1-800-4-LINEAR xilinx digital Pre-distortion adaptive algorithm dpd digital Pre-distortion Digital filter design for SPARTAN 6 FPGA BRAM18 DAC DPD DSP48 LTM9003 LTM9003-AA LTM9003-AB
2012 - R_10024

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Text: Avateq, NXP and Xilinx join to meet design challenge digital broadcast repeater Rev. 2 — 11 , Semiconductors Avateq, NXP and Xilinx join to meet design challenge NXP Semiconductors digital broadcast repeater 1. Introduction Conversion to digital broadcast technologies requires transmission stations to , 5 Avateq, NXP and Xilinx join to meet design challenge NXP Semiconductors digital broadcast , amplifiers has become an important issue in digital broadcast equipment design. In response to these new


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2002 - Xilinx DLC5 JTAG Parallel Cable III

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Text: provides digital outputs which are accessible through standard logic analyzer headers and differential , the CPLD is input/output signal conditioning to provide for digital 2 output from the ISL5239 , . Install the parallel port JTAG programming cable XILINX Model Number DLC5, Parallel Cable III from the , user's needs via the a JTAG programming interface J9. U2 is a Xilinx XC95288XL6PQ208C CPLD, and is required for basic board functions. U3 is a Xilinx XC18V01VQ44C SPROM which supports optional FPGA


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PDF ISL5239EVAL1 AN1024 ISL5239EVAL1 ISL5239 ISL5239 Xilinx DLC5 JTAG Parallel Cable III dlc5 xilinx digital Pre-distortion fpga JTAG Programmer Schematics dlc5 parallel cable III XC95288XL evaluation board mpi cable pin details usb 2.0 implementation using verilog J920 usb programmer xilinx free
2008 - GMSK simulink

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Text: the Xilinx ® Cascaded Integrator Comb (CIC) Compiler [Ref 2], Direct Digital Synthesizer (DDS , Application Note: Virtex-5 Family Designing Efficient Digital Up and Down Converters for , Kostarnov Digital Up Converters (DUC) and Digital Down Converters (DDC) are key components of RF systems , implementations can be created by leveraging Xilinx ® DSP tools and IP portfolio for increased productivity and , functions onto building blocks and IP cores for Xilinx ® FPGAs in System Generator software, and how to


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PDF XAPP1113 GMSK simulink xilinx digital Pre-distortion GMSK modulation demodulation simulink block diagram GSM 900 simulink matlab gmsk modulation matlab gsm call flow simulink RPR vhdl code Multichannel Digital Downconverter receiver for an mri scan using matlab simulink gmsk demodulation matlab verilog code for dpd
2006 - Xilinx lcd display controller design

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Text: Xilinx floating point unit (FPU) coprocessor. An FPU connected to the PowerPC auxiliary processor unit , reference design provided includes a completed design created using the Xilinx Embedded Development Kit , are frequently required for embedded systems and DSP applications such as image processing, digital , ) controller and fully supported by the Xilinx GNU compiler to ensure hardware abstraction and ease of use , included reference design is built using the Xilinx EDK. A step-by-step tutorial for building the design


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PDF XAPP547 DS302: UG243 Xilinx lcd display controller design Xilinx lcd display controller FIR FILTER implementation xilinx xilinx digital Pre-distortion DSP48 fpu coprocessor ML403 RAMB16 RAMB16s DSP48 floating point
2009 - Spartan-6 LX45

Abstract:
Text: mitigate risk in rapidly changing and fickle markets. Accelerate Innovation Xilinx ® Targeted Design , innovation. They comprise advanced FPGA silicon and design tools, Xilinx and third-party IP cores and , , differentiating value. The Foundation for Targeted Design Platforms Xilinx Virtex®-6 and Spartan®-6 FPGA , forces are driving the adoption of field programmable gate arrays (FPGAs) in the heart of digital , reduction (CFR) and digital pre-distortion (DPD) algorithms to increase power amplifier efficiency by up


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PDF FPGA4-0311 Spartan-6 LX45 Spartan-6 FPGA LX9 LX550T Xilinx Spartan-6 LX9 SPARTAN-6 image processing spartan 6 LX150 LX150T xilinx digital Pre-distortion virtex 6 fpga based image processing spartan 6 LX150t
2005 - matlab codes for wcdma rake receiver

Abstract:
Text: Interface Low Noise Amp ADC Analog RF TX Analog RF TX ADC ADC Digital Down Conversion Digital Filtering & Antenna Diversity Symbol Encoding Modulation & Spreading , E1, T1 Frame Relay or IP Network (Gigabit Ethernet etc.) Main Processor Digital Up Conversion Pre-Distortion & Digital Filtering Chip-Rate Demodulation & Despreading Central , efforts as a baseline to eventually merge the development efforts into © 2005 Xilinx , Inc. All rights


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PDF XAPP726 pp1064-1070. matlab codes for wcdma rake receiver 3G HSDPA circuits diagram HSDPA matlab wcdma simulink turbo encoder circuit, VHDL code mimo model simulink hsdpa matlab codes 3g hsdpa signal antenna Diagram umts turbo encoder circuit 3G HSDPA cell capacity planning
2009 - adaptive algorithm dpd

Abstract:
Text: development tool support that enables Xilinx customers to meet the demands of markets with evolving standards , integration Targeted Design Platforms · Targeted Design Platforms from Xilinx and its network of third , using third-generation Xilinx ASMBLTM architecture, the Virtex-6 FPGA family is supported by a new , requirements ASIC/ Xilinx FPGA (Traffic Manager or Backplane) · Simplify interfacing to DDR3, RLDRAM , interface standards. · Integrate crest factor reduction (CFR) and digital pre-distortion (DPD) algorithms


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simulation for prbs generator in matlab

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Text: Xilinx ISE User Constrains File VHDL Test Bench and Test Vectors Instantiation Templates VHDL , external microcontroller interface Table 1: Example Implementation Statistics for Xilinx ® FPGAs Fmax , February 5th , 2008 © 2007 Xilinx , Inc. All rights reserved. XILINX , the Xilinx Logo, and other designated brands included herein are trademarks of Xilinx , Inc. MW_ATSC Transport data receiver , The MW_ATSC Modulator Core performs the digital baseband functions required for the transmission side


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2010 - AD-MSDPDA900-EVB

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Text: Mixed Signal Digital Predistortion Evaluation Platform AD-MSDPD-EVB High performance RF and , interface with intuitive user interface Interfaces for both the Altera HSMC and the Xilinx FMC mezzanine , coupled with a suitable digital predistortion algorithm. A full observation path is also included that , Tx output connector Auxiliary Rx IF output Auxiliary clock reference input Xilinx FMC connector or , complex IF output of ~184.32 MHz. ESD CAUTION Rev. 0 | Page 10 of 12 Package Option Xilinx FMC


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PDF 16-bit EB09055-0-11/10 AD-MSDPDA900-EVB LTE baseband ADF4350 GSM 900 modulation matlab AD8375 xilinx digital Pre-distortion AD-MSDPDX2150-EVB ADL5375 AD9122 AD9516
vhdl code for ofdm

Abstract:
Text: Xilinx ISE User Constrains File VHDL Test Bench and Test Vectors Instantiation Templates VHDL , Table 1: Example Implementation Statistics for Xilinx ® FPGAs Fmax Family Example Device (MHz , and clocks are routed off-chip February 5, 2008 © 2007 Xilinx , Inc. All rights reserved. XILINX , the Xilinx Logo, and other designated brands included herein are trademarks of Xilinx , Inc. DVB-T , General Description The MW_DVB-T/H_P Modulator Core performs the digital baseband functions required for


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2014 - HMCAD1512

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Text: Data Converter Solutions Analog, Digital & Mixed-Signal ICs, Modules, Subsystems & Instrumentation , ) Receivers • Macro BTS & Small Cells • • Test & Instrumentation Digital Oscilloscopes Magnetic , Connected to Xilinx Standard FMC Board • EasyStack™: Firmware Code Stack Available for Xilinx  , , such as: Digital Down Conversion, Image Rejection F & Oscilloscope Triggers 2 hittite.com , CLOCK DIVIDE 1 - 8X SPI 75 IP0 IN0 ADC Digital Gain LVDS DP0 (13:0) DN0 (13:0


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PDF ADC-0713 HMCAD1512
2007 - LM2596 schematic constant current

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Text: National Semiconductor's Solutions for Xilinx ® Field Programmable Gate Arrays (FPGAs) Design , 's Power Supply Kit Page 9 Xilinx Family Selection Tables & Reference Designs Spartan-3, 3E, 3L Page , 18 Virtex-II Pro Page 20 Virtex, Virtex-E Page 22 Voltage References & Supervisors Xilinx , that supports Xilinx Field Programmable Gate Arrays (FPGAs). National provides analog signal , sensor Receiver path Analog signal processing ADC Interface Digital PCI processing


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PDF O-220 O-263 FBGA-49L TQFP-64 AEM-NSCGUIDE/01 LM2596 schematic constant current XILINX/SPARTAN 3E STARTER BOARD new-era voltage regulator interfacing rj45 with spartan-3 fpga schematic usb to rj45 cable extender SPARTAN 3E STARTER BOARD LM358 RF receiver module receiver Vari-L VCO 116 Application Note FPGA XILINX spartan3 pwm generator pj 1229 diode
2010 - xilinx XAPP1123

Abstract:
Text: The Xilinx ® LogiCORETM IP DUC/DDC Compiler implements high-performance, optimized Digital Upand , Frequency Max. Freq.(5) 368.64 368.64 368.64 Features · Generates Digital Up-Converter modules for a range of output sample rates between 30.76 and 245.76 MHz Generates Digital Down-Converter modules for a , ) features: resource and latency estimation, frequency and phase raster reporting For use with Xilinx CORE , Support Provided by Xilinx @ www.xilinx.com/support 1. 2. 3. 4. 5. 6. 7. · · · For a complete


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PDF DS766 ZynqTM-7000 4A2Cx20 xilinx XAPP1123 LTE DUC XAPP1123 amplitude demodulation using xilinx system generator DFE digital front end DPD DSP48E1s r1a1 complex Q3A2 LTE DUC DDC fir filter spartan 3
2002 - 80C31 instruction set

Abstract:
Text: Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx Digital Digital Digital Digital Digital Digital Digital Xilinx Xilinx Xilinx Xilinx IP Type LogiCORE AllianceCORE , XILINX IP SELECTION GUIDE Virtex-II Pro Spartan-IIE Spartan-II Virtex-II Virtex-E Function , /100 Mbps Ethernet MAC Vendor Name Xilinx Xilinx Xilinx sysonchip Xilinx Xilinx Amphion Amphion Amphion Amphion Amphion Xilinx Xilinx NewLogic Paxonet Paxonet TILAB Xilinx Paxonet Paxonet MemecCore


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PDF 8b/10b DO-DI-ADPCM32) DO-DI-ADPCM64) CC-201) CC-200) CRC10 CC-130) CRC32 CC-131) 80C31 instruction set XC2S200 pq208 xilinx fifo generator 6.2 design BCD adder pal application of 8259 microcontroller MC68000 opcodes AX1610 adder xilinx dvb-RCS modem hitachi pbx
2000 - Reed-Solomon Decoder

Abstract:
Text: o Digital Satellite Communication and Broadcast o RAID Controllers with Fault-Tolerance Xilinx , ® The Reed-Solomon Solution Customer Tutorial Xilinx at Work in Hot New Technologies , Spartan-II IP Solutions for Reed-Solomon o Summary Xilinx at Work in High Volume Applications 2 , Xilinx at Work in High Volume Applications 3 ® Reed-Solomon Concept, Terminology, Architecture and Features Xilinx at Work in High Volume Applications 4 ® Noise Happens o Data


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2001 - 80C31 instruction set

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Text: Xilinx Xilinx Xilinx Xilinx Digital Digital Digital Digital Digital Digital Digital Xilinx Xilinx Xilinx , Digital Digital Digital Digital Digital Digital einfochips einfochips Eureka Dolphin Dolphin Xilinx VAutomation Derivation Derivation Digital Virtual Virtual Virtual Virtual Virtual Xilinx Xilinx Xilinx Xilinx , XILINX IP SELECTION GUIDE Implementation Example Function Communication & Networking BUFE-based , Encoder Reed-Solomon Decoder Vendor Name Xilinx Xilinx Xilinx Xilinx sysonchip Xilinx Xilinx Amphion


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PDF 8b/10b DO-DI-ADPCM32) DO-DI-ADPCM64) CC-201) CC-200) CRC10 CC-130) CRC32 CC-131) 80C31 instruction set xc2s200 pq208 xilinx code for 8-bit serial adder dvb-RCS transmitter XC2S50 driver PIC Microcontroller GSM Modem POS-PHY ATM format dvb-RCS modulator uart 16450 128-bit key generation matlab code for image enc
2002 - Turbo decoder Xilinx

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Text: Digital Synthesizer Xilinx LogiCORE 16 bit complex data, 2's comp, forward and inverse transform 16 bit , Converter DFPADD Floating Point Adder Xilinx Xilinx Digital LogiCORE LogiCORE AllianceCORE 1-256s bit wide , any current, and the battery can be removed or exchanged. Platform Generator Xilinx Platform , www.xilinx.com/virtex2pro/. CORE Generator System Introduction This section on the Xilinx CORE GeneratorTM System and the Xilinx Intellectual Property (IP) Core offerings is provided as an overview of products


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PDF UG012 Turbo decoder Xilinx verilog code for floating point adder 80C31 instruction set dvb-RCS chip AX1610 verilog code for FFT 32 point 65-bit G.727 matlab vhdl code of 32bit floating point adder vhdl code direct digital synthesizer
2008 - verilog code for 2-d discrete wavelet transform

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Text: systems. 4 XtremeDSP Selection Guide DSP for Digital Communications Xilinx FPGAs are widely used , demonstrates some of these applications. The Xilinx XtremeDSP IP portfolio for digital communications , for Digital Communications The Xilinx CORE GeneratorTM system generates parameterizable algorithms , as System Generator models or netlists. Digital Communication Reference Designs Xilinx , designed around the TI TMS320DM6446 digital media processor DSP and Xilinx Virtex-4 SX35 FPGA as a


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2008 - vhdl code for DES algorithm

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Text: Communications Xilinx FPGAs are widely used for performing signal processing tasks in digital communication , 's advanced digital communication systems. For such systems, Xilinx FPGAs allow the integration of multiple , System Solutions Xilinx DSP Benefits for Digital Communications · olutions capable of handling , Table 4 Transform FFT up to 64K point DSP Algorithms for Digital Communications The Xilinx , Generator models or netlists. 4 Digital Communication Reference Designs Xilinx Alliance Partners


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2001 - xilinx vhdl code for floating point square root

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Text: R Using the CORE Generator System Introduction This section on the Xilinx CORE Generator SystemTM and the Xilinx Intellectual Property (IP) Core offerings is provided as an overview of products , CORE Generator Guide, which can be accessed online in the Xilinx software installation, as well as at , . The CORE Generator System The Xilinx CORE Generator System is the cataloging, customization, and delivery vehicle for IP cores targeted to Xilinx FPGAs. This tool is included with all Xilinx ISE BaseX


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PDF XC2V1000-4 UG002 xilinx vhdl code for floating point square root multiplier accumulator MAC code verilog multi channel UART controller using VHDL 80C31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 vhdl code for 3-8 decoder using multiplexer vhdl code 32bit LFSR xilinx vhdl code for floating point square root o
2007 - spartan camera link

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Text: featured by Xilinx and National Semiconductor combines the best of the digital and analog worlds into one , Broadcast Video Connectivity Solution (3G) with Low-cost FPGAs By: Bob Feng ( Xilinx ) and Mark Sauerwald (National Semiconductor) Using Xilinx SpartanTM-3E and Spartan-3A FPGAs, a National Semiconductor PHY, and a Xilinx video processing stack provides a very cost-effective and flexible approach to the challenges of multi-rate broadcast. © 2007 Xilinx , Inc. All rights reserved. XILINX , the Xilinx logo, and


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PDF WP324 spartan camera link oddr2 HD-SDI deserializer 16 bit parallel hd-SDI deserializer LVDS XAPP514 HD-SDI serializer 16 bit parallel spartan3 fpga development boards 3G-SDI SPARTAN3E design book
2005 - viterbi IESS-308/309

Abstract:
Text: , atan and atanh, square root Digital receivers Direct Digital Synthesizer (DDS) Xilinx , Xilinx LogiCORE Complete solution for ETSI EN 302 307 v1.1.1 2005-03 Satellite Digital Video , XAPP474 (v1.1) June 19, 2005 Summary This document provides an overview of the Xilinx CORE GeneratorTM System and the Xilinx Intellectual Property (IP) offerings that facilitate the SpartanTM , available at , and the Xilinx IP Center available at


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PDF XAPP474 27MHz viterbi IESS-308/309 xilinx logicore core dds Automatic Railway Gate Control system, xilinx logicore core dds square wave CORDIC system generator xilinx CORDIC to generate sine wave fpga spartan3 fpga development boards XAPP474 dvb-s encoder design with fpga IESS-308/309
1999 - "network interface cards"

Abstract:
Text: Editorial contact: Mike Seither Xilinx , Inc. (408) 879-6557 mike.seither@xilinx.com Kathy , XILINX SET TO PENETRATE NEW MARKETS WITH BIGGEST PRODUCT LAUNCH IN HISTORY OF PLD INDUSTRY SAN JOSE , portfolio, Xilinx , Inc., (NASDAQ: XLNX), today announced it will begin shipment of three new lines of , performance products. The Xilinx products are expected to drive the use of PLDs into the consumer, PC-related and automotive markets. In the consumer market, new applications include digital cameras, digital


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2001 - toshiba satellite laptop battery pinout

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Text: White Paper: Spartan-II R WP129 (v1.0) March 21, 2001 Summary Introducing Xilinx and Programmable Logic Solutions for Home Networking Author: Amit Dhir Xilinx has been successful in the , seeing a recent flux of digital convergence. The coming of broadband access, the Internet, multiple PCs , the homes of the consumer. Xilinx SpartanTM-II FPGAs, with their high-densities, performance features, and low cost, help reduce the customer's time needed to build products. With the Xilinx Online


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PDF WP129 toshiba satellite laptop battery pinout samsung plasma tv schematic diagram toshiba laptop schematic diagram powerline ethernet adapter schematic diagram XILINX vhdl code download REED SOLOMON temperature controlled fan project using 8051 circuit diagram bluetooth based home automation TUTORIALS xilinx FFT samsung laptop battery pinout NEC plasma tv schematic diagram
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