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LT1017MJ8/883 Linear Technology LT1017 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military
LT1018MJ8/883 Linear Technology LT1018 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military
LM108AJ8 Linear Technology LM108A - Operational Amplifiers; Package: CERDIP; Pins: 8; Temperature: Military
LT1175CDWF#MILDWF Linear Technology LT1175 - 500mA Negative Low Dropout Micropower Regulator; Pins: 5
LTC1041MJ8/883 Linear Technology LTC1041 - BANG-BANG Controller; Package: CERDIP; Pins: 8; Temperature: Military
LTC2905HDDB#TRMPBF Linear Technology LTC2905 - Precision Dual Supply Monitor with Pin-Selectable Thresholds; Package: DFN; Pins: 8; Temperature Range: -40°C to 125°C

ttl 7474 14 PIN Datasheets Context Search

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74573

Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
Text: Semiconductor Logic Device Cross-Reference Here is a comprehensive cross-reference of TTL and , UK ). Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together. The following tables are available . TTL Device Summary CMOS Device , device is suitable for your purposes. 1 of 12 E&OE. TTL Device Summary Please click on a , 7404 7405 7406 7407 7408 7410 7411 7414 7420 7421 7427 7430 7432 7447 7448 7473 7474


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TTL 7474

Abstract: 7474 pin out diagram 7474 D flip-flop circuit diagram 7474 D flip-flop 7474 pin diagram of 7474 74LS74A pin out configuration 7474 j-k flip flop 7474 pin configuration pin configuration of d flip flip 7474
Text: reliable operation. 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification TYPE TYPICAL f„AX TYPICAL SUPPLY CURRENT (TOTAL) 7474 25MHz 17mA 74LS74A 33MHz 4mA 74S74 100MHz 30mA NOTE: For , 74LS unit load (LSul) is 20jja l,H and -0.4mA l,L PIN CONFIGURATION LOGIC SYMBOL s», m jH'cc d , Products Product Specification Flip-Flops 7474 , LS74A, S74 LOGIC DIAGRAM MODE SELECT — FUNCTION , Signetics Logic Products Product Specification Flip-Flops 7474 , LS74A, S74 DC ELECTRICAL CHARACTERISTICS


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PDF LS74A, 1N916, 1N3064, 500ns TTL 7474 7474 pin out diagram 7474 D flip-flop circuit diagram 7474 D flip-flop 7474 pin diagram of 7474 74LS74A pin out configuration 7474 j-k flip flop 7474 pin configuration pin configuration of d flip flip 7474
7474 pin out diagram

Abstract: TTL 7474 7474 D flip-flop circuit diagram 74LS74A pin out configuration specifications 7474 7474 7474 ttl Flip-Flops 7474 7474 pin configuration 7474 D flip-flop
Text: Signetics 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification Logic , . TYPE 7474 74LS74A 74S74 NOTE: TYPICAL fMAX 25MHz 33MHz 100MHz TYPICAL SUPPLY CURRENT (TOTAL , .4 m A In. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) *o i OE D iH cM J *oi , 7474 , LS74A, S74 LOGIC DIAGRAM MODE SELECT - FUNCTION TABLE INPUTS OPERATING MODE §D , Product Specification Flip-Flops 7474 , LS74A, S74 DC ELECTRICAL CHARACTERISTICS PARAMETER


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PDF LS74A, 500ns 500ns 1N916, 1N3064, 7474 pin out diagram TTL 7474 7474 D flip-flop circuit diagram 74LS74A pin out configuration specifications 7474 7474 7474 ttl Flip-Flops 7474 7474 pin configuration 7474 D flip-flop
7474 truth table

Abstract: 7474 D flip-flop circuit diagram 7474 ttl 7474 7474 D flip-flop Flip-Flop 7470 of 7474 of d 9N74 7474 ttl d 7474
Text: FAIRCHILD TTL /SSI • 9N74/5474, 7474 DUAL D TYPE EDGE TRIGGERED FLIP-FLOP / DESCRIPTION — The 9N74/5474, 7474 are edge triggered dual D type flip-flops with direct clear and preset inputs and both , out and information present will not be transferred to the output. The 9N74/5474, 7474 have the same , VIEW) 5D] Q1 3] GND 02 Û2 5D2 14 13 12 11 10 9 8 1 2 3 4 5 6 7 CPI di rdi vcc R02 02 CP2 Positive , pulse. tn+<] = bit time after clock pulse. LOGIC DIAGRAM (EACH FLIP-FLOP) 5-112 FAIRCHILD TTL /SSI . 9N74


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PDF 9N74/5474, 9N70/5470, 7474 truth table 7474 D flip-flop circuit diagram 7474 ttl 7474 7474 D flip-flop Flip-Flop 7470 of 7474 of d 9N74 7474 ttl d 7474
TTL 7474

Abstract: 7474 pin configuration 7474 D flip-flop circuit diagram pin diagram of 7474 7474 7474 PIN DIAGRAM LS74A 8XC660 7474 D flip-flop 74574
Text: reliable operation. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 7474 25MHz 17mA 74LS74A , 74LS unit load (LSul) is 20jjA I!h and -0.4mA l,L. PIN CONFIGURATION LOGIC SYMBOL "oí n 33 vcc , Specification Flip-Flops 7474 , LS74A, S74 LOGIC DIAGRAM MODE SELECT — FUNCTION TABLE OPERATING MODE , Product Specification Flip-Flops 7474 , LS74A, S74 ELECTRICAL CHARACTERISTICS (Over recommended operating


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PDF 1N916, 1N3064, 500ns TTL 7474 7474 pin configuration 7474 D flip-flop circuit diagram pin diagram of 7474 7474 7474 PIN DIAGRAM LS74A 8XC660 7474 D flip-flop 74574
1999 - 7474 D flip-flop

Abstract: 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram ICL7103A zestron reed relay 7474 for shift register 2N2007 shift register by using D flip-flop 7474 application notes 74121 7474 D flip-flop circuit diagram zestron 278
Text: reference voltage. · Over-range and under-range signals available for autoranging. · TTL compatible , HI 10 ICL8052A R LADDER ICL7103A IN LO 14 11 ANALOG GROUND 7 18 13 27 , anode pin of its respective 7 segment display. The position of the zero bit in the shaft register and , S 0.22µF 2N2007 10k #1 -15V #4 S STROBE ( PIN 18) 1/4 - 7406 2N3686 D D , #1 14 1/4 - 7403 #2 9 +5V 30k DCV 1/4 - 7406 7 8 10µF 5


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PDF ICL7103A/ICL8052A AN028 ICL7103A ICL8052A 7474 D flip-flop 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram zestron reed relay 7474 for shift register 2N2007 shift register by using D flip-flop 7474 application notes 74121 7474 D flip-flop circuit diagram zestron 278
pin DIAGRAM OF IC 7474

Abstract: ic 7474 pin diagram 7474 ic pin configuration IC 7474 pin configuration pin IC 7474 logic ic 7474 pin diagram 74s74n pin configuration of 7474 ic ic 7474 IC 7474 flipflop
Text: Signetics 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification Logic , delay time for reliable operation. T Y PE 7474 74L S 74A 74S 74 NOTE: T Y P IC A L f , AX 25M H z 33M , and -0 .4 m A i|L PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 4 10 Roi I , 7474 , LS74A, S74 LOGIC DIAGRAM MODE SELECT - FUNCTION TABLE IN PU TS O P E R A T IN G M O D E , P ro d u c t S p e c ific a tio n Flip-Flops 7474 , LS74A, S74 DC ELECTRICAL CHARACTERISTICS


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PDF LS74A, 500ns 1N916, 1N3064, pin DIAGRAM OF IC 7474 ic 7474 pin diagram 7474 ic pin configuration IC 7474 pin configuration pin IC 7474 logic ic 7474 pin diagram 74s74n pin configuration of 7474 ic ic 7474 IC 7474 flipflop
1999 - ICL7103A

Abstract: zestron reed relay 2N2007 ICL7103 7474 D flip-flop application notes 74121 7474 D flip-flop circuit diagram 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram shift register by using D flip-flop 7474 74121 application as pulse generator
Text: reference voltage. · Over-range and under-range signals available for autoranging. · TTL compatible , HI 10 ICL8052A R LADDER ICL7103A IN LO 14 11 ANALOG GROUND 7 18 13 27 , anode pin of its respective 7 segment display. The position of the zero bit in the shaft register and , S 0.22µF 2N2007 10k #1 -15V #4 S STROBE ( PIN 18) 1/4 - 7406 2N3686 D D , #1 14 1/4 - 7403 #2 9 +5V 30k 1/4 - 7406 7 8 10µF 5 Application


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PDF ICL7103A/ICL8052A AN028 ICL7103A ICL8052A zestron reed relay 2N2007 ICL7103 7474 D flip-flop application notes 74121 7474 D flip-flop circuit diagram 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram shift register by using D flip-flop 7474 74121 application as pulse generator
ttl 7474 sine wave

Abstract: 74590 INTERFACING OF SEVEN SEGMENT DISPLAY WITH 8051 74ls221 circuits diagram frequency counter using 8051 voltage frequency table ad654 ICM7208 74ls04 hex inverter 74LS04* hEX INVERTER MC6801
Text: divides the 1.2288MHz signal by 214, which results in a 75Hz signal being fed into Pin 3 of the 7474 . The 7474 further divides this signal by four, to 18.75Hz. This signal will appear at Pin 9 depending upon the signal level at Pins 1 and 10. If Pins 1 and 10 are low, Pin 9 will be held at a TTL high. If Pins , capacitor, RT and Ct, are selected such thatthisoto + 1V signal seen at Pin 4 results in a Oto 500kHz output frequency. The pull-up resistor, R3. ensures that the AD654 output meets the logic levels required atT1 ( Pin


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PDF AN-276 ttl 7474 sine wave 74590 INTERFACING OF SEVEN SEGMENT DISPLAY WITH 8051 74ls221 circuits diagram frequency counter using 8051 voltage frequency table ad654 ICM7208 74ls04 hex inverter 74LS04* hEX INVERTER MC6801
MC4044

Abstract: frequency counter using 8051 74590 74ls04hex Voltage-to-Frequency Converters 74LS221 ICM7208 74LS221 P 74ls221 circuits diagram AD654
Text: frequency directly into the counter input pin of the 7208 counter-decoder-driver. The 4020Bs are 14 , -bit binary counters with output registers, one 4020B 14 -stage binary counter, one 7474 dual D-type flip-flop , results in a 75Hz signal being fed into Pin 3 of the 7474 . The 7474 further divides this signal by four , Pins 1 and 10 are low. Pin 9 will be held at a TTL high. If Pins 1 and 10 are high, the 18.75Hz square , capacitor, RT and CT, are selected such that this 0 to +1V signal seen at Pin 4 results in a Oto 500kHz


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PDF AN-276 MC6801 MC4044 frequency counter using 8051 74590 74ls04hex Voltage-to-Frequency Converters 74LS221 ICM7208 74LS221 P 74ls221 circuits diagram AD654
Not Available

Abstract: No abstract text available
Text: -1 6 Pin Dual-in-line Power Ceramic Package UC1717 UC3717 -V m -+5V ENAA +Vm 3, 14 , .45V Input Voltage Logic Inputs (Pins 7 8 9) 6V Analog Input ( Pin 1 0 ) . Vcc Reference Input ( Pin Note 1: AI1 voltages are with respect to ground, Pins 4,5 12, 13. Pin numbers refer to DIL-16 package , DIAGRAM VCC AOUT BOUT 5/93 6-71 ■T 3 4 a s n DQiaaat, ?a ■3, 14 VM UC1717


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PDF UC3717 5-1000mA 0-45V UC1717SP UC3717 T34flSn DD132T3
C2717

Abstract: 7474 pin out diagram 7474 pin configuration L298 H-bridge motor drive pin diagram of 7474 Stepper Motors START-STOP circuit Stepping Motors diagram three phase pulse generator wind continental acceleration sensor
Text: itations a n d considerations o f package. BLOCK DIAGRAM Vcc AOUT BOUT 3, 14 VM 7/95 10-97 , ).6V Analog Input ( Pin 1 0 ) . Vcc Reference Input ( Pin 1 1 , PIN FUNCTION FUNCTION PIN N/C 1 Bo u t 2 Timina 3 Vm 4 Gnd 5 N/C 6 Gnd 7 Vcc 8 h 9 Phase 10 N/C 11 lb 12 Current 13 Vr 14 Gnd 15 N/C 16 Gnd 17 Vm 18 A out 19 Emitters 20 [T Ï6] Em itters 15] A o u


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PDF 5-1000mA 0-45V UC3717 UC3717s UC3717N UC1717J UC1717SP UC1717 UC2717 UC3717 C2717 7474 pin out diagram 7474 pin configuration L298 H-bridge motor drive pin diagram of 7474 Stepper Motors START-STOP circuit Stepping Motors diagram three phase pulse generator wind continental acceleration sensor
Not Available

Abstract: No abstract text available
Text: ). 6V Analog Input ( Pin 1 0 ) . Vcc Reference Input ( Pin 1 1 , 50°C Note 1: All voltages are with respect to ground, Pins 4,5, 12, 13. Pin numbers refer to DIL , DIAG RAM VCC AOUT BOUT ■I 3, 14 VM ^34051=] 001474fcj 5^3 UC1717 UC3717 CO NN ECTIO , 16 7 13] Gnd 17 6 Vm 15 14 8 12j Gnd Gnd [5 vg Vcc H 9 10 11 12 13


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PDF UC1717 UC3717 5-1000mA 0-45V UC3717 UC3717S -r-001
CI 7474

Abstract: pin diagram 7400 series hs 111-0 7400 fan-out 7474 pin out diagram TTL CI 7400 74164 CI 7400 HS5212 HS5215
Text: 15 +15V Pin 11 Analog Ground Pin 14 Analog in Pin 12 N/C (int.ref.models) -V ref in (ext.ref.models , .670 mW, Typical ■Wide Operating Temperature Range. -55°C to + 125°C ■Small Size.24- Pin , with a 1 MHz clock. HS 5210 Series hybrid microcircuit converters are housed in hermetically-sealed 24- pin , 5211/ 14 ), ±10 volts (HS 5212/15), and 0 to +10 volts (HS 5216). For each of these input ranges, the , (Models HS5213. 14 , 15) volt« SPECI FICATIONS (Ta=25°C, Voltages ±15, +5 Unless otherwise stated


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PDF 12-Bit 24-Pin, MIL-STD-883 24-pin o11-o11- HS52XXC HS52XXB 12-Bits CI 7474 pin diagram 7400 series hs 111-0 7400 fan-out 7474 pin out diagram TTL CI 7400 74164 CI 7400 HS5212 HS5215
74194 shift register

Abstract: 74377 register logicaps shift register by using D flip-flop 7474 74191 counter 74377 Latches 74373 altera logicaps TTL library 74374 74373 ttl 74191
Text: Equivalent 2-Input NAND Gates. · Efficient Design Entry using TTL SSI and MSI Macrofunctions with Altera's A+PLUS Design System and LogiCaps Schematic Capture. · Speed Equivalent to 74LS TTL for 25MHz Operation · Low-Power CMOS Technology. · 100% Generically Testable Insures 100% Programming Yield · Packaged in 40 Pin , feedback structures guarantee maximum utility from each pin : buried functions may be imple mented while , macros, minimizes the source logic and fits it to the device. Partially utilized TTL macros are compacted


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PDF 25MHz EPB1400 EPB1400 74194 shift register 74377 register logicaps shift register by using D flip-flop 7474 74191 counter 74377 Latches 74373 altera logicaps TTL library 74374 74373 ttl 74191
full adder using ic 74138

Abstract: full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 Application of Multiplexer IC 74151 IC 74138 74138 IC decoder Multiplexer IC 74151
Text: contain 14 MSI TTL functions for user evaluation. · May be erased for other uses upon completion of evaluation. · TTL /CMOS I/O compatibility. · Design implemented using Altera's A+PLUS Development System · Advanced CHMOS circuitry features low power, high performance, and high noise immunity · Includes 68- pin , speeds and density of the EP1800 series make it suitable for LSI replacement of Low power Schottky TTL in , commonly used TTL SSI and MSI functions. These aid the first time user since the function of these blocks


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PDF EP1800JC-EV1 EPt800 68-pin EP1800JC-EV1 0UT20 0UT21 OUT22 0UT23 full adder using ic 74138 full adder using Multiplexer IC 74151 decoder IC 74138 TTL 74194 74151 multiplexer pin configuration of IC 74138 Application of Multiplexer IC 74151 IC 74138 74138 IC decoder Multiplexer IC 74151
7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
Text: OF LS TTL TTL Pari No. Count TTL Part No. Count TTL Part No. Count TTL Part No. Count 7400 4 7470 16 74152 24 74253 40 7401 4 7471 15 74153 27 74257 36 7402 4 7472 14 74154 33 74258 34 7403 4 7473 20 74155 21 74259 48 7404 4 7474 15 74156 21 74260 6 7405 4 7475 14 74157 22 74261 58 7406 3 7476 , intervals along the row and column of the chip, also consist of I/O pads which are compatible of CMOS or TTL , Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O compatibility â


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PDF KG10000 7408 CMOS TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
ic 7483 BCD adder

Abstract: 9N01 ic 7483 full adder IC 7490 pin configuration function of ic 7490 9N03 TIC 8213 7401 ic configuration pin configuration of ic 7492 Fairchild 9311
Text: PHILIPS FAIRCHILD PIN FOR PIN REPLACEMENT 9N74, 7474 9390,7490 9391,7491 9375,7475 9N76, 7476 9393,7493 , 11 12 7 4x2 5 5 4 12 9 4 30 20 55 18 40 16 14 Power Dissipation mW 105 150 250 176 390 400 110 450 , TTL /MSI 93176/54176, 74176 93177/54177,74177 BCD DECADE/4-BIT BINARY COUNTER TO EE ANNOUNCED , 11 LOG IC D IA G R A M 93176/54176, 74176 Pin nu m b ers are show n fo r D IP o n ly . CO , 7400 8200 8210 8211 8213 8220 8223 8280 8281 8283 i i FAIRCHILD PIN FOR PIN REPLACEMENT FAIRCHILD


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PDF 93H183 93S41 93S42 93L24 93S62 93H87 8-20LENT 9N107, FJH101 FJH111 ic 7483 BCD adder 9N01 ic 7483 full adder IC 7490 pin configuration function of ic 7490 9N03 TIC 8213 7401 ic configuration pin configuration of ic 7492 Fairchild 9311
TC430

Abstract: teledyne tsc external DIAGRAM OF IC 7474 IC 7474 pin configuration logic ic 7474 pin diagram TC430C
Text: j z 0.1 pF 100 3 11 14 74S74 1 6 TC430 5 -O 01 12 2 7 TTL START IN 13 4 1 a9 ' -O 02 1 i 100 1 14 1/2 7474 0.1 JIF 0.1 pF 2 kO , TC430 FAST CMOS CCD DRIVER FEATURES Operating Range 4.5V « (V dd - Vss) « 12V TTL , Diode Driver Differential Line Driver PIN Diode Driver Level Shifting Driver FUNCTIONAL DIAGRAM V DD , swings between positive and negative supplies without sacrificing AC performance when driven from TTL


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PDF QGD73 TC430 6T17bDS Q0073f TC430_ 74S74 TC430 teledyne tsc external DIAGRAM OF IC 7474 IC 7474 pin configuration logic ic 7474 pin diagram TC430C
TC430CPA

Abstract: V01Q DS0026 power mosfet driver tc430
Text: TTL START IN 13 4 1 7 *1 2 9 2 TC 430 7 -O 02 14 5 12 1 +5V -A A /V Z Z 0.1 nF 10£i 1 6 5 -O 01 io n tI 1 1/2 7474 7 6 - O TIMING SIGNAL OUT 14 0.1 tiF 0.1 (JF 2kO < I , .4.5V « (V dd - Vss) « 12V TTL /CMOS-Compatible Inputs Low Delay T im e , MOSFET Driver Laser Diode Driver Differential Line Driver PIN Diode Driver Level Shifting Driver , frequencies to 10 MHz and drives loads greaterthan 2200 pF. Peak current output is 3A. The input is TTL /CMOS


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PDF TC430 TC430 74S74 TC430CPA V01Q DS0026 power mosfet driver
LM 7474

Abstract: No abstract text available
Text: I, [7 8 9 10 11 12 13 10] Current Phase [8 9] lo 18 17 16 15 14 PACKAGE PIN , (Pins 3, 14 ) Logic Supply Voltage, Vcc ( Pin 6) Logic Supply Current, Icc ( Pin 6) MIN lo = H = 0 , ) . 6V Analog Input ( Pin 10). Vcc Reference Input ( Pin 1 1 ).15V , terminal. Pin numbers refer to DIL-16 pack­ age. Consult Packaging Section of Databook for thermal limiÂ


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PDF UC3717A* 0-46V UC3717A UC3717, UC3717ANE 3717AJ UC3717A LM 7474
Not Available

Abstract: No abstract text available
Text: UNITS 10 Logic Supply Voltage, Vcc ( Pin 6) 46 V 4.75 Supply Voltage, Vm (Pins 3, 14 , ) .6V Analog Input ( Pin Reference Input ( Pin Input Current , , negative out o l the specified terminal. Pin numbers refer to DIL-16 pack­ age. Consult Packaging Section of Databook for thermal limi­ tations and considerations of package. AOUT BOUT 3, 14 VM


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PDF UC3717A* 0-46V UC3717A UC3717, UC3717ANE 3717AJ UC3717A DD147til
MH1SS1

Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC tda 4100 TDB0124DP TDA 7851 A
Text: , OC, TTL 15 V TTL 3 NOR-Gatter, je 3 E TTL NAND-Gatter mit 8 E DIP 1* DIP 14 DIP DIP DI? DIP DIP , 14 14 14 4 Bit-Volladdierer 4 Bit-Vergleicher TTL TTL 4 . Exklusiv-OR-Gatter, je 2E TTL , Binärer Q au ^-PrioritätSenkodex* TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL DIP 16 DIP 14 DIP 14 DIP 16 , DIP - 14 DIP 14 DIP 14 2 NAND-Treiber, je 2 E TTL BCD- zu 7-Segment-Dekoder-/ TTL Treiber BCD , und AE TTL DIP 16 -25/85 2 NAND-Gatter, je Gatter TTL DIP 14 0/70 1 separater Ein-;/Ausgang 6


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stepping motor EM 323

Abstract: stepping motor EM - 323 LM 7474 7474 pin configuration 1046v
Text: , Vm (Pins 3, 14 ) Logic Supply Voltage, Vcc ( Pin 6) Logic Supply Current, Icc ( Pin 6) Thermal Shutdown , specified terminal. Pin numbers refer to DIL-16 package. Consult Packaging Section o f Databook for thermal limi tations and considerations of package. BLOCK DIAGRAM Vcc AOUT BOUT 3, 14 VM 4/97 TaMfiSn , ) .6V Analog Input ( Pin Reference Input ( Pin 11). 15V


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PDF 0-46V UC3717A UC3717A UC3717, stepping motor EM 323 stepping motor EM - 323 LM 7474 7474 pin configuration 1046v
2006 - 7486 XOR GATE pin configuration

Abstract: driving a stepper motor with 7474 and 7486 7486 STEPPER MOTOR 7486 XOR GATE XOR 7486 pin configuration of d flip flip 7474 CI 7474 7474 14 PIN FUNCTIONAL DIAGRAM OF 7400 7474 dual d flip flop
Text: CAPACITOR NC FOUTPUT COMPARATOR INPUT ­VS 8 Figure 2. D- 14 , N- 14 Pin Configurations 18 +VS , VOUT 14 OFFSET NULL +IN 2 +IN VOUT 1 NC OFFSET NULL OFFSET NULL PIN , Descriptions D- 14 , N- 14 1 Pin No. P-20A 2 Mnemonic VOUT 2 3 4 3 4 6 5 6 8 9 7 , Pin 1 from swinging below Pin 2. Figure 18. PSRR vs. Full-Scale Frequency Rev. D | Page 14 of , 20 k is connected from Pin 13 to Pin 14 and the wiper is connected to the positive supply through a


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PDF AD650 MIL-STD-883 14-Lead 20-Lead 7486 XOR GATE pin configuration driving a stepper motor with 7474 and 7486 7486 STEPPER MOTOR 7486 XOR GATE XOR 7486 pin configuration of d flip flip 7474 CI 7474 7474 14 PIN FUNCTIONAL DIAGRAM OF 7400 7474 dual d flip flop
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