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TSB12LV01APZ
TSB12LV01APZ ECAD Model
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tsb12lv01a datasheet (4)

Part ECAD Model Manufacturer Description Type PDF
TSB12LV01A TSB12LV01A ECAD Model Texas Instruments IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller Original PDF
TSB12LV01AI TSB12LV01AI ECAD Model Texas Instruments IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller Original PDF
TSB12LV01AIPZ TSB12LV01AIPZ ECAD Model Texas Instruments HIGH PERFORMANCE 3.3V LINK LAYER WITH 32-BIT HOST I/F, 2K FIFOS in 100-pin PZ package. Original PDF
TSB12LV01APZ TSB12LV01APZ ECAD Model Texas Instruments High-Speed Serial-Bus Link-Layer Controller Original PDF

tsb12lv01a Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2000 - TSB41LV03

Abstract: No abstract text available
Text: TSB12LV01A / TSB12LV01AI Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSB12LV01A-to-Phy-Layer Transfer , TSB12LV01A. 1.2.2 · · · · Physical-Link Interface Interfaces Directly to the TSB11LV01, TSB14C01 , internally in the TSB12LV01A. Miscellaneous Signals BCLK CYCLEIN 32 42 I I Bus clock. BCLK is the host bus clock used for the host-interface module of the TSB12LV01A. It is asynchronous to SCLK. Cycle in


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PDF TSB12LV01A TSB12LV01AI SLLS332A TSB41LV03
1994 - 32 bit carry select adder code

Abstract: TSB11LV01 TSB12C01A TSB12LV01A TSB12LV01AI TSB14C01 TSB21LV03A TSB41LV03
Text: TSB12LV01A / TSB12LV01AI Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller , . . . . . . . . . . . . . . . . . . . . . . . . . TSB12LV01A-to-Phy-Layer Transfer Waveforms . . . , features of the TSB12LV01A. 1.2.1 Link · · · · · · · 1.2.2 Physical-Link Interface · · , , that generates the internal 24.576-MHz clock used internally in the TSB12LV01A. BCLK 32 I Bus clock. BCLK is the host bus clock used for the host-interface module of the TSB12LV01A. It is


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PDF TSB12LV01A TSB12LV01AI SLLS332A MS-026 MTQF013A S-PQFP-G100) 32 bit carry select adder code TSB11LV01 TSB12C01A TSB12LV01AI TSB14C01 TSB21LV03A TSB41LV03
1994 - N1031

Abstract: TSB11LV01 TSB12C01A TSB12LV01A TSB12LV01AI TSB14C01 TSB21LV03A TSB41LV03
Text: TSB12LV01A / TSB12LV01AI Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller , . . . . . . . . . . . . . . . . . . . . . . . . . TSB12LV01A-to-Phy-Layer Transfer Waveforms . . . , features of the TSB12LV01A. 1.2.1 Link · · · · · · · 1.2.2 Physical-Link Interface · · , , that generates the internal 24.576-MHz clock used internally in the TSB12LV01A. BCLK 32 I Bus clock. BCLK is the host bus clock used for the host-interface module of the TSB12LV01A. It is


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PDF TSB12LV01A TSB12LV01AI SLLS332A MTQF013A S-PQFP-G100) MS-026 N1031 TSB11LV01 TSB12C01A TSB12LV01AI TSB14C01 TSB21LV03A TSB41LV03
2000 - 74LVCH16245

Abstract: TSB12LV01A TSB12LV01B SLLA081
Text: Application Brief SLLA081 - May 2000 TSB12LV01A to TSB12LV01B Transition Document TI 1394 , . This part has been designed to replace the current TSB12LV01A (data sheet literature number SLLS332A and errata literature number SLLS332). Texas Instruments recommends that the TSB12LV01A not be , the TSB12LV01A , but should consider transitioning to the TSB12LV01B, scheduled for release in the third quarter of 2000. The TSB12LV01B is a revision of the TSB12LV01A , with feature enhancements and


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PDF SLLA081 TSB12LV01A TSB12LV01B TSB12LV01A SLLS332A SLLS332) TSB12LV01B. TSB12LV01A, 74LVCH16245
2000 - TSB11LV01

Abstract: TSB12C01A TSB12LV01A TSB12LV01AI TSB14C01 TSB21LV03A N1031 TSB41LV03
Text: TSB12LV01A / TSB12LV01AI Data Manual IEEE 1394-1995 High-Speed Serial-Bus Link-Layer Controller , . . . . . . . . . . . . . . . . . . . . . . . . . TSB12LV01A-to-Phy-Layer Transfer Waveforms . . . , features of the TSB12LV01A. 1.2.1 Link · · · · · · · 1.2.2 Physical-Link Interface · · , , that generates the internal 24.576-MHz clock used internally in the TSB12LV01A. BCLK 32 I Bus clock. BCLK is the host bus clock used for the host-interface module of the TSB12LV01A. It is


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PDF TSB12LV01A TSB12LV01AI SLLS332A TSB11LV01 TSB12C01A TSB12LV01AI TSB14C01 TSB21LV03A N1031 TSB41LV03
1998 - TSB11LV01

Abstract: TSB12C01A TSB12LV01A TSB14C01 TSB21LV03A TSB41LV03
Text: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSB12LV01A-to-Phy-Layer Transfer , features of the TSB12LV01A. 1.2.1 Link · · · · · · · 1.2.2 Physical-Link Interface · · , the internal 24.576-MHz clock used internally in the TSB12LV01A. BCLK 32 I Bus clock. BCLK is the host bus clock used for the host-interface module of the TSB12LV01A. It is asynchronous to , Cycle out. CYCLEOUT is the version of the isochronous cycle clock used by the TSB12LV01A. It is based


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PDF TSB12LV01A SLLS332 TSB11LV01 TSB12C01A TSB12LV01A TSB14C01 TSB21LV03A TSB41LV03
Not Available

Abstract: No abstract text available
Text: Interface TSB12LV01A $ 1 1 .1 5 in q u a n tities o i l TSB12LV01AI > $1 3 .0 0 in q u a n tities o i l T he TSB12LV01A is an IEEE 13941995 stan d ard high-speed serialbus link-layer controller , control and status registers by the application software. The TSB12LV01A transm its and receives 1394 , TSB12LV01A is particularly attractiv e to telecom and industrial m arket segm ents prim arily due to the following special features. T he TSB12LV01A provides a highperform ance IEEE 1394-1995 in te r face w ith th


OCR Scan
PDF TSB12LV01A TSB12LV01AI TSB12LV01A TSB12C01A.
1994 - PB ECO LINK

Abstract: S-PQFP-G100 TSB12LV01A TSB12LV01B TSB12LV01B-EP TSB12LV01BIPZT TSB12LV01BPZT TSB12LV01BPZTG4 power supply for pzt design
Text: TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with , errata items to the TSB12LV01A have been fixed, and the following feature enhancements have been made: · , been added. · Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition , , there are three restrictions that were not present in the TSB12LV01A device: · The TSB12LV01B may only


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PDF TSB12LV01B SLLA212 32-Bit 1394a PB ECO LINK S-PQFP-G100 TSB12LV01A TSB12LV01B TSB12LV01B-EP TSB12LV01BIPZT TSB12LV01BPZT TSB12LV01BPZTG4 power supply for pzt design
1994 - Not Available

Abstract: No abstract text available
Text: a revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature , general-purpose output pins have been added. • Several pin changes have been made. Refer to TSB12LV01A to , SLLA212 – JUNE 2006 However, there are three restrictions that were not present in the TSB12LV01A


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PDF TSB12LV01B SLLA212 32-Bit
1999 - TSB12LV01A

Abstract: SLLS332
Text: ERRATA TO THE TSB12LV01A DATA SHEET (TEXAS INSTRUMENTS LITERATURE NO. SLLS332, MARCH 1999) This document contains corrections and additions to information in the TSB12LV01A data sheet (TI Literature Number SLLS332, March 1999). a. If the user attempts to do a simultaneous READ of the last quadlet of a packet from the GRF (@C0h) through the host interface and WRITE into the GRF from the Phy side, it results in the packet token of the next packet being corrupted. Workaround: 1. In a two-node system


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PDF TSB12LV01A SLLS332, SLLS332
2001 - 1394 schematic

Abstract: TSB12LV23 DSP 128-pin Texas Instruments TSB43AB23 port hdd interconnect mobile camera interface microcontroller OSD microcontroller vga iris scanner circuit av to vga 128pin Firewire 800
Text: 1394a-2000 for data and control bus applications in backplane and cable. TSB12LV01A TSB12LV01AI 3.3 , , iris, brightness, contrast and numerous other features. TSB12LV01A and TSB12LV01B For telecom and industrial applications requiring a 32-bit data path, TI offers the TSB12LV01AI or TSB12LV01B. Both devices support cable and backplane environments. The TSB12LV01AI is qualified for use in industrial temperature ranges. The TSB12LV01A /B has a generic 32-bit host bus interface. A 2


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1994 - SLLA081

Abstract: paccom ev app abstract
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 3.2.1 Version/Revision Register , revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature enhancements , . Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document, TI literature


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PDF TSB12LV01BEP SGLS123 SLLA081 paccom ev app abstract
2002 - SLLA081

Abstract: No abstract text available
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 3.2.1 Version/Revision Register , revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature enhancements , . Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document, TI literature


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PDF TSB12LV01BEP SGLS123 SGYC003B, TSB12LV01BIPZTEP SLLA081
2002 - SLLS435A

Abstract: No abstract text available
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 3.2.1 Version/Revision Register , revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature enhancements , . Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document, TI literature


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PDF TSB12LV01B SLLS435A S-PQFP-G100) MS-026 SLLS435A
1994 - TSB12LV01B

Abstract: TSB12LV01BIPZTEP TSB12LV01A PHRS
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 GRF Status (Read Only) Host , a revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature , section 1.3. · Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition


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PDF TSB12LV01BEP SGLS123 TSB12LV01B-EP TSB12LV01B MTQF012B S-PQFP-G100) MS-026 TSB12LV01B TSB12LV01BIPZTEP TSB12LV01A PHRS
2002 - TSB12LV01A

Abstract: TSB12LV01B
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 GRF Status (Read Only) Host , a revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature , section 1.3. · Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition


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PDF TSB12LV01B SLLS435A S-PQFP-G100) 4073179/B MS-026 TSB12LV01A TSB12LV01B
2006 - TSB12LV23

Abstract: No abstract text available
Text: ), such as the TSB12LV21, TSB12LV22, TSB12LV23, TSB12LV31, TSB12LV41, TSB12LV42, or TSB12LV01A. Please


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PDF TSB41LV03A TSB41LV03AI SLLA225 1394a P1394a TSB12LV23
2002 - TSB12LV01A

Abstract: TSB12LV01B
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 GRF Status (Read Only) Host , a revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature , section 1.3. · Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition


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PDF TSB12LV01B SLLS435A TSB12LV01A TSB12LV01B
1994 - TSB12LV01A

Abstract: TSB12LV01B TSB12LV01BIPZTEP
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 GRF Status (Read Only) Host , a revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature , section 1.3. · Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition


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PDF TSB12LV01BEP SGLS123 TSB12LV01A TSB12LV01B TSB12LV01BIPZTEP
1994 - Not Available

Abstract: No abstract text available
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 3.2.1 Version/Revision Register , revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature enhancements , . Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document, TI literature


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PDF TSB12LV01BEP SGLS123 MTQF012B S-PQFP-G100) MS-026
1994 - Not Available

Abstract: No abstract text available
Text: in the TSB12LV01A. Figure 3–1. Internal Register Map 3–2 GRF Status (Read Only) Host , TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with , errata items to the TSB12LV01A have been fixed, and the following feature enhancements have been made , . • Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document , present in the TSB12LV01A device: • The TSB12LV01B may only operate with a 50 MHz host-interface


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PDF TSB12LV01BÄ SGLS123
2006 - TSB12LV23

Abstract: TSB12LV21 TSB12LV22 TSB12LV31 TSB12LV41 TSB12LV42 TSB41LV03A TSB41LV03AI TSB41LV03PFP
Text: , TSB12LV23, TSB12LV31, TSB12LV41, TSB12LV42, or TSB12LV01A. Please be aware that an important notice


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PDF TSB41LV03A TSB41LV03AI SLLA225 1394a P1394a TSB12LV23 TSB12LV21 TSB12LV22 TSB12LV31 TSB12LV41 TSB12LV42 TSB41LV03A TSB41LV03AI TSB41LV03PFP
1994 - Not Available

Abstract: No abstract text available
Text: in the TSB12LV01A. Figure 3­1. Internal Register Map 3­2 3.2.1 Version/Revision Register , revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed, and the following feature enhancements , . Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document, TI literature


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PDF TSB12LV01B SLLS435A MTQF012B S-PQFP-G100) MS-026
2002 - Not Available

Abstract: No abstract text available
Text: in the TSB12LV01A. Figure 3–1. Internal Register Map 3–2 GRF Status (Read Only) Host , FIFO (ITF). The TSB12LV01B is a revision of the TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with the restrictions noted below. It is also software compatible with the extensions noted below. All errata items to the TSB12LV01A have been fixed , . Refer to TSB12LV01A to TSB12LV01B Transition Document, TI literature number SLLA081 dated May 2000


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PDF TSB12LV01B SLLS435A MTQF012B S-PQFP-G100) MS-026
1994 - Not Available

Abstract: No abstract text available
Text: TSB12LV01A. Figure 3–1. Internal Register Map 3–2 GRF Status (Read Only) Host Control (see , TSB12LV01A , with feature enhancements and corrections. It is pin for pin compatible with the TSB12LV01A with , errata items to the TSB12LV01A have been fixed, and the following feature enhancements have been made , . • Several pin changes have been made. Refer to TSB12LV01A to TSB12LV01B Transition Document , present in the TSB12LV01A device: • The TSB12LV01B may only operate with a 50 MHz host-interface


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PDF TSB12LV01BÄ SGLS123
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