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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTC4053EMSE-4.2#TR Linear Technology LTC4053-4.2 - USB Compatible Lithium-Ion Battery Charger with Thermal Regulation; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LTC4057ES5-4.2#TRM Linear Technology LTC4057-4.2 - Linear Li-Ion Battery Charger with Thermal Regulation in ThinSOT; Package: SOT; Pins: 5; Temperature Range: -40°C to 85°C
LTC4058XEDD-4.2#TRPBF Linear Technology LTC4058-4.2 - Standalone Linear Li-Ion Battery Chargers with Thermal Regulation in DFN; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C
LTC4059EDC Linear Technology LTC4059/LTC4059A - 900mA Linear Li-Ion Battery Chargers with Thermal Regulation in 2 x 2 DFN; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C
LTC4054ES5-4.2#TR Linear Technology LTC4054-4.2 - Standalone Linear Li-Ion Battery Charger with Thermal Regulation in ThinSOT; Package: SOT; Pins: 5; Temperature Range: -40°C to 85°C
LTC4058EDD-4.2 Linear Technology LTC4058-4.2 - Standalone Linear Li-Ion Battery Chargers with Thermal Regulation in DFN; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C

tfBGA PACKAGE thermal resistance Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
BGA and QFP Package mounting

Abstract:
Text: TSOP Higher pin count ZIP SSOP SVP Area array package QFP MCM TFBGA (CSP) BGA , for higher density - Lower thermal resistance HTSSOP HTQFP Exposed die-pad type ADC Lower thermal resistance SIP 1-4 Interface Controller MPU QFI HSOI/HSOP HQFP , Surface-mount type Thin surfacemount type TFBGA (CSP) type Package Volume Trend 4 10 PC/PDAs , PACKAGE TRENDS 1-1 Packaging Trends Needs of electronic equipment Optimized System


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2008 - PU86

Abstract:
Text: QuickLogic PolarPro® Device Data Sheet - 86-Pin TFBGA QL1P100 Rev. E Package Thermal Characteristics The , RAM bits CCM Package TFBGA (0.5 mm) (6 mm x 6 mm) QL1P100 100,000 640 48 5 8 8 36,864 1 86 Process , ), and Military (-55°C to 125°C Junction) temperature ranges. Thermal Resistance Equations: PMAX = , thermal resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA: Ambient , Table 38, pick an appropriate TAMAX and use: PMAX = (125°C - TAMAX)/ JA Table 38: Package Thermal


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PDF 86-Pin QL1P100 PU86
2010 - PMP 11.48

Abstract:
Text: Sheet Rev. D Package Thermal Characteristics The PolarPro II device is available for Commercial (0 , ) temperature ranges. Thermal Resistance Equations: JC = (TJ - TC)/P JA = (TJ - TA)/P PMAX = (TJMAX - TAMAX)/JA Parameter Description: JC: Junction-to-case thermal resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA: Ambient temperature P: Power dissipated by the device , TAMAX and use: PMAX = (125°C - TAMAX)/ JA. Table 11: Package Thermal Characteristics Package


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PDF LVCMOS18, PMP 11.48 power one pmp 5.24 ql2p QL2P150 thetaja wlcsp UART/keyboard controller
2003 - transistor DB19

Abstract:
Text: Voltage, VDD Inputs, VI Ports DC Input Clamp Current, IIK Package Thermal Impedance, JA Storage , SDRAM 2:1 MUX 72-BALL TFBGA PACKAGE OUTLINE - H SUFFIX FOR A TABLE 7. PACKAGE DIMENSIONS , GND 10 DA12 DB11 DA11 DB10 DA10 DB9 DA9 DB8 DA8 DB7 ICS83841 72-Ball TFBGA 6mm x 6mm x 1.2mm package body H Package Top View S VDD GND DH3 DA3 DB 3 DA4 DH4 DB4 GND DH5 DA5 DA6 DB5 VDD VDD , Por t rON On Resistance ; NOTE 1 S S VDD = 2.3V; II = -18mA VDD = 2.5V; VI = VDD or GND; S = VDD S =


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PDF ICS83841 ICS83841 83841BH transistor DB19 tfBGA PACKAGE thermal resistance transistor DB15 DH11 transistor DA19
2003 - DH17

Abstract:
Text: DA7 ICS83841 72-Ball TFBGA 6mm x 6mm x 1.2mm package body H Package Top View DB7 , conditions or any conditions be- DC Input Clamp Current, IIK -50mA Package Thermal Impedance, JA , , Inc. PACKAGE OUTLINE - H SUFFIX 20 BIT, DDR SDRAM 2:1 MUX FOR A 72-BALL TFBGA TABLE 7 , Current Typical S VIK Minimum 1.6 Units V Host Por t DIMM Por t On Resistance , RELIABILITY INFORMATION TABLE 6. JAVS. AIR FLOW TABLE FOR A 72-BALL TFBGA JA by Velocity


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PDF ICS83841 ICS83841 180ps 83841BH DH17 transistor da3 DBX application note DH19
2003 - marking dh10

Abstract:
Text: Character- Package Thermal Impedance, JA 50.04°C/W (0 mps) istics is not implied. Exposure to absolute , -BALL TFBGA TABLE 7. PACKAGE DIMENSIONS JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS FBGA SYMBOL , Package Shipping Packaging Temperature ICS83841BH ICS83841BH 72-Ball TFBGA TBD 0°C to , DH5 DA6 DH6 DH7 DA8 DA4 DB4 DA5 DB5 DB6 DA7 ICS83841 72-Ball TFBGA 6mm x 6mm x 1.2mm package body H Package Top View DB7 www.icst.com/products/hiperclocks.html


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PDF ICS83841 ICS83841 180ps 83841BH marking dh10 transistor DB15 DH11 tfBGA PACKAGE thermal resistance marking dh6 MARKING DA3 MARKING A7 transistor DH19 DH17
2006 - JESD51-9

Abstract:
Text: FBGA Fine Pitch Ball Grid Array · Array molded, cost effective, space saving package solution · Available in 1.40mm (LFBGA), 1.20mm ( TFBGA ), and 1.00mm (VFBGA), 0.80mm (WFBGA) and 0.55mm (UFBGA) maximum thickness · Laminate substrate based package which enables 2 and 4 layers of routing flexibility FEATURES DESCRIPTION · Thin, lightweight, space saving package STATS ChipPAC's Fine Pitch Ball Grid Array (FBGA) is a laminate substrate based chip scale package with plastic overmolded


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2003 - marking dh10

Abstract:
Text: Character- Package Thermal Impedance, JA 50.04°C/W (0 mps) istics is not implied. Exposure to absolute , -BALL TFBGA TABLE 7. PACKAGE DIMENSIONS JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS FBGA SYMBOL , Package Shipping Packaging Temperature ICS83841BH ICS83841BH 72-Ball TFBGA Tray 0 , DH5 DA6 DH6 DH7 DA8 DA4 DB4 DA5 DB5 DB6 DA7 ICS83841 72-Ball TFBGA 6mm x 6mm x 1.2mm package body H Package Top View DB7 www.icst.com/products/hiperclocks.html


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PDF ICS83841 ICS83841 180ps 83841BH marking dh10 marking k4 MPS DH17 DH19 tfBGA 8 x 8 tray
2010 - jedec package TFBGA 12

Abstract:
Text: QuickLogic PolarPro® II Solution Platform Data Sheet Rev. CRev. CRev. C Package Thermal Characteristics , °C Junction), and Military (-55°C to 125°C Junction) temperature ranges. Thermal Resistance Equations: JC , : Junction-to-case thermal resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA , 11: Package Thermal Characteristics Package Description Theta-JA (° C/W) Device Package Code Package Type Pin Count 0 LFM QL2P150 PU TFBGA (6 mm x 6 mPm) 121 51.8


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PDF LVCMOS18, jedec package TFBGA 12 mmc 304
2010 - thetaja wlcsp

Abstract:
Text: PolarPro® II Solution Platform Data Sheet Rev. B Package Thermal Characteristics The PolarPro II device , Military (-55°C to 125°C Junction) temperature ranges. Thermal Resistance Equations: JC = (TJ - TC)/P , resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA: Ambient temperature P , Table 11, pick an appropriate TAMAX and use: PMAX = (125°C - TAMAX)/ JA. Table 11: Package Thermal , V. For the TFBGA package , tie VLP to the same voltage as VCCIO(D). GPIO(H:A) CLK(H:G) CLK(D


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PDF LVCMOS18, thetaja wlcsp QL2P150 121-ball mmc 304 QUICKLOGIC SDIO Host
2008 - 1P100

Abstract:
Text: Modules 8 RAM bits 36,864 CCM Package 8 FIFO Controllers 1 TFBGA (0.5 mm) (6 mm , QuickLogic PolarPro® Device Data Sheet - 86-Pin TFBGA QL1P100 ······ Combining Low Power , QuickLogic PolarPro® Device Data Sheet - 86-Pin TFBGA QL1P100 Rev. E Ultra-Low Power FPGA Combining Performance, Density, and Embedded RAM Table 1: PolarPro 86-Pin TFBGA Product Information Features , PolarPro® Device Data Sheet - 86-Pin TFBGA QL1P100 Rev. E Figure 2: PolarPro Logic Cell QST QDS TBS


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PDF 86-Pin QL1P100 1P100 LVCMOS25 QL1P100
2007 - nand flash sdio quicklogic

Abstract:
Text: °C Junction) and Industrial (40°C to 100°C Junction) temperature ranges. Thermal Resistance Equations: PMAX , : Junction-to-case thermal resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA , Sheet Rev. A Table 13: Package Thermal Characteristics Package Description Platform Package Code PT QL8050 PF PU PV PU PU QL1P100 PU PF PT PS QL1P300 QL1P1000 PU PS PS Package Type TFBGA TQFP CTBGA VQFP , 20 188 36,864 2 86 TFBGA (6x6 mm) 100 VQFP (14x14 mm) 101 CTBGA (6x6 mm) 144 TQFP (20x20 mm) 196


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2007 - jedec package TFBGA 12

Abstract:
Text: °C Junction) and Industrial (40°C to 100°C Junction) temperature ranges. Thermal Resistance Equations: PMAX , : Junction-to-case thermal resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA , Sheet Rev. A Table 13: Package Thermal Characteristics Package Description Platform Package Code PT QL8050 PF PU PV PU PU QL1P100 PU PF PT PS QL1P300 QL1P1000 PU PS PS Package Type TFBGA TQFP CTBGA VQFP , 20 188 36,864 2 86 TFBGA (6x6 mm) 100 VQFP (14x14 mm) 101 CTBGA (6x6 mm) 144 TQFP (20x20 mm) 196


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2010 - QL1P1000

Abstract:
Text: tolerance Min. Max. Unit - 150 ps Package Thermal Characteristics The PolarPro , °C Junction) temperature ranges. Thermal Resistance Equations: JA = (TJ - TA)/P PMAX = (TJMAX - TAMAX)/JA Parameter Description: JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA: Ambient , . D Table 13: Package Thermal Characteristics JA (° C/W) Package Description Platform Package Code Package Type Pin Count 0 LFM 200 LFM 400 LFM PT TFBGA 196 54


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2010 - usb to SD

Abstract:
Text: - TAMAX)/JA Parameter Description: JC: Junction-to-case thermal resistance (not applicable for QL1A100 ­110-pin WLCSP package ) JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA , Package Thermal Characteristics The ArcticLink Solution Platform is available for Commercial (0°C to 85°C Junction) and Industrial (-40°C to 100°C Junction) temperature ranges. Thermal Resistance Equations , : Package Thermal Characteristics JA (°C/W) Package Description JC (°C/W) Pin Count 0 LFM


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PDF 12-signal CEA-936-A usb to SD QUICKLOGIC SDIO Host QL1A100 PDIUSBP11A marvell ethernet PHY transceivers JUDD Embedded SDIO CEA-936 CE-ATA version 1.1
2003 - 4B 22 25V

Abstract:
Text: H Package Top View 2DP4 2DP5 3DP5 ICS83840 64-Ball TFBGA 7mm x 7mm x 1.2mm package , conditions or any conditions be- DC Input Clamp Current, IIK -50mA Package Thermal Impedance, JA , On Resistance ; NOTE 1 0.9 V VDD = 2.3V; II = -18mA nSx rON 1.6 -1.2 V VDD = , PACKAGE OUTLINE - H SUFFIX TABLE 7. PACKAGE DIMENSIONS JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS , INFORMATION Part/Order Number Marking Package Count Temperature ICS83840AH ICS83840AH 64


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PDF ICS83840 ICS83840 120ps 83840AH 4B 22 25V ICS83840AHT ICS83840AHLFT ICS83840AHLF ICS83840AH ICS3840ALF hp8k CBTV4010 tfBGA 8 x 8 tray
2009 - QL2P150

Abstract:
Text: PolarPro® II Solution Platform Data Sheet Rev. A Package Thermal Characteristics The PolarPro II device , Military (-55°C to 125°C Junction) temperature ranges. Thermal Resistance Equations: JC = (TJ - TC)/P , resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA: Ambient temperature P , Table 11, pick an appropriate TAMAX and use: PMAX = (125°C - TAMAX)/ JA. Table 11: Package Thermal , 3. Table 12: Solder Composition Package Type Pin Count Lead Type Pb-Free TFBGA (6 mm


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PDF LVCMOS18, QL2P150 325 MMC block diagram Wireless Bluetooth 2.0 EDR mmc 304 quicklogic multimedia
2003 - 2dp3

Abstract:
Text: /hiperclocks.html 1 H Package Top View 2DP4 2DP5 3DP5 ICS83840B 64-Ball TFBGA 7mm x 7mm x 1.2mm package body REV. A JANUARY 30, 2004 ICS83840B Integrated Circuit Systems, Inc. DDR SDRAM , conditions or any conditions be- DC Input Clamp Current, IIK -50mA Package Thermal Impedance, JA , On Resistance ; NOTE 1 0.9 V VDD = 2.3V; II = -18mA nSx rON 1.6 -1.2 V VDD = , PACKAGE OUTLINE - H SUFFIX TABLE 7. PACKAGE DIMENSIONS JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS


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PDF ICS83840B ICS83840B 83840BH 2dp3 ICS83840BHT ICS83840BHLFT ICS83840BHLF ICS83840BH ICS3840BLF CBTV4010 4318C tsa11
2003 - Not Available

Abstract:
Text: 2DP2 1DP3 2DP3 3DP3 1DP4 2DP4 0DP5 ICS83840B 64-Ball TFBGA 7mm x 7mm x 1.2mm package body H Package , Ports DC Input Clamp Current, IIK Package Thermal Impedance, JA Storage Temperature, TSTG -50mA 50.04 , ICS83840BHLF ICS83840BHLFT Marking ICS83840BH ICS83840BH ICS3840BLF ICS3840BLF Package 64-Ball TFBGA 64 , Voltage Input Clamp Voltage nSx Input Leakage Current Host Por t DIMM Por t rON On Resistance ; NOTE 1 nSx , . ICS83840B DDR SDRAM MUX PACKAGE OUTLINE - H SUFFIX TABLE 7. PACKAGE DIMENSIONS JEDEC VARIATION ALL


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PDF ICS83840B ICS83840B 83840BH
2006 - DH-14

Abstract:
Text: conditions for extended periods may affect product reliability. Package Thermal Impedance, JA 50.04°C/W (0 , BIT, DDR SDRAM 2:1 MUX TSD 72-BALL TFBGA Systems, Inc. PACKAGE OUTLINE - H SUFFIX FOR A , Package 72-Ball TFBGA 72-Ball TFBGA 72-Ball, Lead Free, TFBGA 72-Ball, Lead Free, TFBGA Shipping Packaging , DA12 DB11 DA11 DB10 DA10 DB 9 DA9 DB8 DA8 DB 7 REV. A MARCH 10, 2006 ICS83841 72-Ball TFBGA 6mm x 6mm x 1.2mm package body H Package Top View S VDD GND DH3 DA3 DB3 DA4 DH4 DB4 GN D DH5 DA5 DA6 DB5


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PDF 180ps ICS83841 ICS83841 199707558G DH-14 DH11 DH17
2003 - transistor DA3 S 18

Abstract:
Text: 72-Ball TFBGA 6mm x 6mm x 0.8mm package body H Package Top View DB7 The Preliminary , - Package Thermal Impedance, JA 50.04°C/W (0 mfps) istics is not implied. Exposure to absolute maximum , , Inc. PACKAGE OUTLINE - H SUFFIX ICS83841 20 BIT, DDR SDRAM 2:1 MUX FOR A 72-BALL TFBGA , Package Count Temperature ICS83841AH ICS83841AH 72-Ball TFBGA TBD 0°C to 85 , Minimum 1.6 Units V Host Por t DIMM Por t On Resistance ; NOTE 1 0.9 V VDD = 2.3V; II


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PDF ICS83841 ICS83841 83841AH transistor DA3 S 18 DH11 DH17 transistor da3 transistor DB15 DH19 DH12 transistor DB19 DA17 21MUX
2010 - 1P100

Abstract:
Text: QuickLogic® PolarPro® Device Data Sheet - 86-Pin TFBGA QL1P100 ······ Combining Low Power , · · · · 1 QuickLogic® PolarPro® Device Data Sheet - 86-Pin TFBGA QL1P100 Ultra-Low Power FPGA Combining Performance, Density, and Embedded RAM Table 1: PolarPro 86-Pin TFBGA Product , Clocks 5 RAM Modules 8 RAM bits 36,864 CCM Package 8 FIFO Controllers 1 TFBGA (0.5 mm) (6 mm x 6 mm) 86 Process Data The QuickLogic PolarPro is fabricated on a 0.18µ


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PDF 86-Pin QL1P100 1P100 LVCMOS25 PU86 QL1P100
2008 - 12x12 bga thermal resistance

Abstract:
Text: °C Junction) and Industrial (40°C to 100°C Junction) temperature ranges. Thermal Resistance Equations: PMAX , : Junction-to-case thermal resistance JA: Junction-to-ambient thermal resistance TJ: Junction temperature TA , Sheet Rev. B Table 13: Package Thermal Characteristics Package Description Platform Package Code PT QL8050 PF PU PV PU PU QL1P100 PF PT PS QL1P300 QL1P1000 PU PS PS Package Type TFBGA TQFP CTBGA VQFP TFBGA , (14x14 mm) 101 CTBGA (6x6 mm) 144 TQFP (20x20 mm) 196 TFBGA (12x12 mm) QL1P100 20 188 36,864 2 121 TFBGA


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Not Available

Abstract:
Text: Fine Pitch Ball Grid Array TFBGA PACKAGE CODE: NE50 DOCUMENT CONTROL #: PD-2101 REVISION: - , Package Description PI3WVR12612NEE NE 50-Pin, Thin Fine Pitch Ball Grid Array ( TFBGA , TFBGA (NEE) -52-pin TQFN (ZL52) Block Diagram D0+ D0+A D0D1+ D0-A D1+A AUX+B SCL_A , HDMI 2.0, DisplayPort 1.2 Video Switch Pin Assignment (50-Ball TFBGA , NEE) A B GPU GPU_SEL , signals only (DDC, AUX, HPD) VDD = 0V, VINPUT = 0V to 3.6V 20 RON_HS On resistance between


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PDF PI3WVR12612 PI3WVR12612 PD-2101 VR12612 52-Pin PI3WVR12612NEE 50-Pin, PI3WVR12612ZL 52-Pin,
Not Available

Abstract:
Text: : -23dB (0 ≤ f ≤ 1 GHz) f ≤ 1 GHz) It is available in a 52-pin TQFN 3.5x9x0.4mm package and 48-pin TFBGA 4.5x4.5x0.8mm package . The 48-pin version is pin compatible with CBTW28DD14. Îà , . Thermal characteristics can be found on the company web site at www.pericom.com/ package 2. E = Pb-free , ) ÎÎ High Speed multiplexing à à 52 pin TQFN (3.5x9x0.4mm) à à 48 pin TFBGA (4.5x4.5x0.8mm)pin compatible with CBTW28DD14 Pin Configuration (48 pin TFBGA ) 52 51 50 49 48 B13 C13 B12 C12


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PDF PI2DDR3212 2133Mbps, 14-bit 2133Mbps PI2DDR3212 14-bit MO-220 52-Pin, PD-2102
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