The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
HA4314BCAZ96 Intersil Corporation 400MHz, 4x1 Video Crosspoint Switch; PDIP14, QSOP16, SOIC14; Temp Range: 0° to 70°
HA4344BCBZ96 Intersil Corporation 350MHz, 4x1 Video Crosspoint Switch with Synchronous Controls; SOIC16; Temp Range: 0° to 70°
ISL54230IRTZ Intersil Corporation Octal Multiprotocol Switch; TQFN32, WLCSP36; Temp Range: -40° to 85°C
ISL8324IBZ Intersil Corporation Low-Voltage, Single Supply, Dual SPST Analog Switches; SOIC8; Temp Range: See Datasheet
CD22M3494MQAZ Intersil Corporation 16x8x1 BiMOS-E Crosspoint Switch; PDIP40, PLCC44; Temp Range: -40° to 85°C
HA4314BCBZ Intersil Corporation 400MHz, 4x1 Video Crosspoint Switch; PDIP14, QSOP16, SOIC14; Temp Range: 0° to 70°

switch SGMII MII GMII Datasheets Context Search

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2012 - RGMII to SGMII PHY

Abstract: MAX24287 switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii 1000BASE-X fpga ethernet sgmii fpga rgmii
Text: Parallel MII Interface ( GMII , RGMII, TBI RTBI, 10/100 MII ) to a Component with an SGMII or 1000BASE , -X SFP optical modules Connects processors with parallel MII interfaces to PHY or switch ICs with SGMII , duplex mode between GMII / MII MDIO and SGMII PCS Configurable for 10/100 MII DTE or DCE Modes (i.e , be configured for GMII , RGMII, TBI, RTBI, or 10/100 MII , while the serial interface can be configured , -X autonegotiation without software involvement. This device is ideal for interfacing single-channel GMII / MII devices


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII to SGMII PHY switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii fpga ethernet sgmii fpga rgmii
2012 - SFP module 1588

Abstract: IEEE1588 integrated mac and phy MAX24288 switch SGMII MII GMII MDIO MAX24288ETK ethernet mdio circuit diagram gmii sfp 1000BASE-X sfp sgmii
Text: parallel MII interfaces to PHY or switch ICs with SGMII interfaces Interface conversion is transparent to MAC layer and higher layers Translates link speed and duplex mode between GMII / MII MDIO and SGMII PCS , timestamper with an SGMII or 1000BASE-X serial interface and a parallel MII interface that can be configured for GMII , RGMII, or 10/100 MII . The device provides all required hardware support for high-accuracy , full-featured, gigabit parallel-to-serial MII converter. It provides full SGMII revision 1.8 compliance and also


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PDF MAX24288 1000BASE-X IEEE1588 SFP module 1588 IEEE1588 integrated mac and phy switch SGMII MII GMII MDIO MAX24288ETK ethernet mdio circuit diagram gmii sfp 1000BASE-X sfp sgmii
2011 - MAX24288

Abstract: 1000BASE-X sfp switch SGMII MII GMII 1000BASE-X sfp sgmii RGMII to SGMII PHY MDIO SFP module 1588 gmii sfp 1000BASE-X 1N255
Text: higher layers Translates link speed and duplex mode between GMII / MII MDIO and SGMII PCS 3 ABRIDGED , IEEE 1588 clock and timestamper with an SGMII or 1000BASE-X serial interface and a parallel MII interface that can be configured for GMII , RGMII, or 10/100 MII . The device provides all required hardware , , the MAX24288 is a full-featured, gigabit parallel-to-serial MII converter. It provides full SGMII , -X or SGMII v1.8 (4, 6, or 8 Pin) MAX24288ETK+ 68 TQFN-EP* -40°C to +85°C Parallel: GMII , RGMII, or


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PDF MAX24288 MAX24288 1000BASE-X IEEE1588 com/MAX24288 1000BASE-X sfp switch SGMII MII GMII 1000BASE-X sfp sgmii RGMII to SGMII PHY MDIO SFP module 1588 gmii sfp 1000BASE-X 1N255
2009 - ML605 UCF FILE

Abstract: iodelay virtex-6 ML605 user guide switch SGMII MII GMII RAMB36s example ml605 ethernet fpga rgmii 1000base-x xilinx 1000BASE-X sfp sgmii RGMII to SGMII
Text: v1.3, RGMII v2.0, SGMII , and 1000BASE-X PCS/PMA interfaces, as well as GMII / MII at 2.5V only , Gb/s. SGMII The Serial-GMII ( SGMII ) interface is an alternative to GMII / MII . SGMII converts the , illustrated in Figure 1 and Figure 2, these can be connected using GMII / MII , RGMII, or SGMII to provide a , Ethernet MAC 10 Mbps, 100 Mbps, 1 Gbps Ethernet FIFO GMII / MII (or RGMII) Switch or Router IOBs MAC , Overclocked 2000 or 2500 Mb/s 1. Physical interface MII ; or tri-speed GMII , RGMII, or SGMII GMII , RGMII


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PDF DS710 ML605 UCF FILE iodelay virtex-6 ML605 user guide switch SGMII MII GMII RAMB36s example ml605 ethernet fpga rgmii 1000base-x xilinx 1000BASE-X sfp sgmii RGMII to SGMII
2004 - ET1081

Abstract: switch SGMII MII GMII L-ET1081N1-B-DB Agere SNR
Text: PHY AFE RJ-45 SGMII Data Output Enable SGMII Loopback MII Loopback Line Driver Loopback , loopback control register (address 19) with the following options being available: MII , SGMII , and all , µm process Oversampling architecture to improve signal integrity and SNR SGMII or SerDes interfaces to MAC or switch Low power consumption: - Less than 750 mW per port in 1000Base-T mode - Advanced , block diagram of the octal PHY. PMA D PMA C PMA B GTX_CLK TX_CLK TXD[7:0] TX_ER TX_EN GMII PCS


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PDF ET1081 388-pin 1000Base-T PB05-063GPHY PB04-025GPHY) switch SGMII MII GMII L-ET1081N1-B-DB Agere SNR
2006 - vhdl code for mac interface

Abstract: sfp design virtex-5 ETHERNET-MAC verilog code for ethernet FPGA Virtex 6 vhdl code for phy interface RGMII phy Xilinx gmii sfp fpga ethernet sgmii 1000BASE-X fpga rgmii
Text: FIFO I/F Ethernet MAC PCS GMII / MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Serial-GMII ( SGMII ) interface is an alternative to GMII / MII . SGMII converts the parallel interface of the , Figures 1 and 2, these can be connected using GMII / MII , RGMII, or SGMII to provide a tri-speed Ethernet , , Scripts User Constraints File (.ucf) Example Designs - Supports MII , GMII , RGMII v1.3, RGMII v2 , sublayer. GMII / MII The Media Independent Interface ( MII ), defined in IEEE 802.3 clause 22, is a


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PDF DS550 Virtex-51 vhdl code for mac interface sfp design virtex-5 ETHERNET-MAC verilog code for ethernet FPGA Virtex 6 vhdl code for phy interface RGMII phy Xilinx gmii sfp fpga ethernet sgmii 1000BASE-X fpga rgmii
2006 - sgmii sfp virtex

Abstract: xilinx virtex 5 mac 1.3 fpga rgmii RGMII to MII fpga ethernet sgmii iodelay Virtex-5 LXT Ethernet GTX 460 switch SGMII MII GMII GTP ethernet
Text: Supports MII , GMII , RGMII v1.3, RGMII v2.0, SGMII , and 1000BASE-X PCS/PMA interfaces Supported HDL , Mbps, 100 Mbps, and 1 Gbps. SGMII The Serial-GMII ( SGMII ) interface is an alternative to GMII / MII . SGMII converts the parallel interface of the GMII / MII into a serial format using a RocketIO GTP or GTX , . Alternatively, the external GMII / MII can be replaced with an RGMII (as shown) or as an SGMII (which requires , several ports. Figure Top x-ref 2 GMII / MII (or RGMII) Virtex-5 Device Ethernet MAC Switch or


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PDF DS550 sgmii sfp virtex xilinx virtex 5 mac 1.3 fpga rgmii RGMII to MII fpga ethernet sgmii iodelay Virtex-5 LXT Ethernet GTX 460 switch SGMII MII GMII GTP ethernet
2007 - sgmii sfp virtex

Abstract: UCF virtex-4 1000base-x xilinx 1000BASE-X sfp sgmii sgmii mode sfp fpga ethernet sgmii xilinx tcp vhdl DS307 1000BASE-X RGMII SGMII
Text: FIFO I/F Ethernet MAC PCS GMII / MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Serial-GMII ( SGMII ) interface is an alternative to the GMII / MII . SGMII converts the parallel interface of the , Figures 1 and 2, these can be connected using GMII / MII , RGMII, or SGMII to provide a tri-speed Ethernet , the EMAC0/EMAC1 tie-off pins based on user options - Supports MII , GMII , RGMII v1.3, RGMII v2 , sublayer. GMII / MII The Media Independent Interface ( MII ), defined in IEEE 802.3 clause 22, is a


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PDF DS307 1000BASE-X sgmii sfp virtex UCF virtex-4 1000base-x xilinx 1000BASE-X sfp sgmii sgmii mode sfp fpga ethernet sgmii xilinx tcp vhdl RGMII SGMII
2011 - MAX24287

Abstract: RGMII-100 max24287etk sgmii switch RGMII-1000 125Gb 1000BASE-X sfp 369B switch SGMII MII GMII MII100
Text: higher layers Translates link speed and duplex mode between GMII / MII MDIO and SGMII PCS Configurable , configured for GMII , RGMII, TBI, RTBI, or 10/100 MII , while the serial interface can be configured for 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet switch , -X autonegotiation without software involvement. This device is ideal for interfacing single-channel GMII / MII , Interface a Component with a Parallel MII Interface ( GMII , RGMII, TBI RTBI, 10/100 MII ) to a Component


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PDF MAX24287 MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-100 max24287etk sgmii switch RGMII-1000 125Gb 1000BASE-X sfp 369B switch SGMII MII GMII MII100
2006 - RGMII constraints

Abstract: 1000base-x xilinx xilinx virtex 5 mac 1.3 V583 RGMII to SGMII fpga ethernet sgmii DS307 1000BASE-X Ethernet-MAC using vhdl ETHERNET-MAC
Text: FIFO I/F Ethernet MAC PCS GMII / MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Serial-GMII ( SGMII ) interface is an alternative to the GMII / MII . SGMII converts the parallel interface of the , Figures 1 and 2, these can be connected using GMII / MII , RGMII, or SGMII to provide a tri-speed Ethernet , the EMAC0/EMAC1 tie-off pins based on user options - Supports MII , GMII , RGMII v1.3, RGMII v2 , sublayer. GMII / MII The Media Independent Interface ( MII ), defined in IEEE 802.3 clause 22, is a


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PDF DS307 1000BASE-X RGMII constraints 1000base-x xilinx xilinx virtex 5 mac 1.3 V583 RGMII to SGMII fpga ethernet sgmii Ethernet-MAC using vhdl ETHERNET-MAC
2012 - MAX24287

Abstract: RGMII-1000 switch SGMII MII GMII 1000base SX transmitter sc ENG-46158 TF401
Text: (Optional) SGMII PHY b) Connect Parallel MII Component to SGMII Component < GMII > RXD[7:0] CDR , -X SFP optical modules Connects processors with parallel MII interfaces to PHY or switch ICs with SGMII , duplex mode between GMII / MII MDIO and SGMII PCS Configurable for 10/100 MII DTE or DCE Modes (i.e , processor with an RGMII or GMII interface to a switch device with an SGMII interface or to a 1000BASE , configured for GMII , RGMII, TBI, RTBI, or 10/100 MII , while the serial interface can be configured for


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-1000 switch SGMII MII GMII 1000base SX transmitter sc ENG-46158 TF401
2004 - vhdl code for ethernet mac spartan 3

Abstract: application TEMAC TEMAC verilog code for mdio protocol RGMII RGMII SGMII 1000BASE-X MDIO clause 22 clause 22 phy registers DS297
Text: Ethernet 1000BASE-X PCS/PMA or SGMII core or other custom logic - IOBs to provide an external GMII / MII - , GMII / MII RGMII/ SGMII Figure 3: Typical Ethernet Architecture MAC The Ethernet Medium Access , , these can be connected using GMII / MII , RGMII, or SGMII to provide a tri-speed Ethernet port. The , Typical applications for the TEMAC core include the following: · Ethernet Tri-Speed BASE-T Port ( MII / GMII , Port ( MII / GMII /RGMII) Figure 1 illustrates a typical application for the TEMAC core. The PHY side of


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PDF DS297 1000BASE-X vhdl code for ethernet mac spartan 3 application TEMAC TEMAC verilog code for mdio protocol RGMII RGMII SGMII MDIO clause 22 clause 22 phy registers
2012 - RGMII-1000

Abstract: MAX24287 switch SGMII MII GMII sgmii specification ieee ENG-46158
Text: Parallel MII Interface ( GMII , RGMII, TBI RTBI, 10/100 MII ) to a Component with an SGMII or 1000BASE , (Optional) SGMII PHY b) Connect Parallel MII Component to SGMII Component < GMII > RXD[7:0] CDR , processors with parallel MII interfaces to PHY or switch ICs with SGMII interfaces Interface conversion is , an RGMII or GMII interface to a switch device with an SGMII interface or to a 1000BASE-X optical , for GMII , RGMII, TBI, RTBI, or 10/100 MII , while the serial interface can be configured for 1.25Gbps


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-1000 switch SGMII MII GMII sgmii specification ieee ENG-46158
2004 - xilinx tcp vhdl

Abstract: TEMAC 1000BASE-X application TEMAC DS297 fpga ethernet sgmii IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL MDIO communication protocol UCF virtex4
Text: . Figure Top x-ref 1 GMII / MII (or RGMII) Xilinx FPGA Tri-Mode Ethernet MAC Switch or Router , GMII / MII RGMII/ SGMII Figure 4: Typical Ethernet Architecture MAC The Ethernet Medium Access , using GMII / MII , RGMII, or SGMII to provide a tri-speed Ethernet port. The 1000BASE-X architecture , ) that can be connected to - IOBs to provide an external GMII / MII 4 - A shim to provide an external , . Virtex-6 devices support GMII and MII at 2.5V only; please see the Virtex-6 FPGA Data Sheet: DC and


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PDF DS297 xilinx tcp vhdl TEMAC 1000BASE-X application TEMAC fpga ethernet sgmii IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL MDIO communication protocol UCF virtex4
2010 - 88E6161

Abstract: 88E6097 88e6131 88SA8052 98DX4122 88E6122 88E6351 88E6031 88E6350R 88ap270m
Text: Ethernet Switch 6 4 FE PHYs + GMII /RGMII/ SGMII 1.0W · 88E6092/95 8 FE + 3 GbE Ethernet Switch 11 8 FE PHYs + GMII / SGMII · 88E6095F 8 FE + 3 GbE Ethernet Switch 11 · 88E6096/97 8 FE , -88E6171R-1 1K 64 · 88E6171 7-Port Gigabit Ethernet Switch 7 5 GbE PHYs + 2 GMII /RGMII/ MII 2.5W , Ethernet Switch with Sync-E 7 5 GbE PHYs + 2 GMII /RGMII/ MII 2.5W DB1-88E6350R-1 Yes 8K , te d s · 88E6031 3-Port Fast Ethernet Switch 3 2 PHYs + 1 MII or 1 PHY + 2 MII 0.4W


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PDF CH-1163 88E6161 88E6097 88e6131 88SA8052 98DX4122 88E6122 88E6351 88E6031 88E6350R 88ap270m
2004 - application TEMAC

Abstract: RGMII constraints 1000BASE-X DS297 sgmii specification ieee switch SGMII MII GMII RGMII phy Xilinx spartan ucf file 6 sgmii xilinx EF-DI-TEMAC-PROJ
Text: several ports. Figure Top x-ref 2 GMII / MII (or RGMII) Xilinx FPGA Ethernet MAC Switch or , PMD GMII / MII RGMII/ SGMII Figure 4: Typical Ethernet Architecture MAC The Ethernet Medium , using GMII / MII , RGMII, or SGMII to provide a tri-speed Ethernet port. The 1000BASE-X architecture , to provide an external GMII / MII 3 - A shim to provide an external RGMII1 · Configured and monitored , Support Provided by Xilinx @ www.xilinx.com/support 1. Spartan-3E devices support only the MII or GMII


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PDF DS297 application TEMAC RGMII constraints 1000BASE-X sgmii specification ieee switch SGMII MII GMII RGMII phy Xilinx spartan ucf file 6 sgmii xilinx EF-DI-TEMAC-PROJ
2015 - 88E6097

Abstract: 88E6020 88E1119 88E6071 Marvell 88E1512 88AP270M 88W8897 Marvell PHY 88E6352 88PG867 MV64460
Text: Dy rted .1Q po 02 up E8 sS IEE LAN V 1.5W 1K e Siz 8 FE PHYs GMII / SGMII Yes , PHYs GMII /RGMII/ SGMII 64 d Au 1.0W 6 2K DB-88E6085-1 rt Pa ard Bo s on er , GMII / SGMII ize eS ag ck Pa c mi na Dy rted .1Q po 02 up E8 sS IEE LAN V DB1 , 88E6092/95 2 PHYs 2 MII /RMII e mb 4FE+2GE Ethernet Switch Nu 88E6046 d Au 7 , 88E6250 1.2W 7 4-Port Fast Ethernet Switch 8 PHYs 2 MII 4 88E6220 88E6045 p em


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PDF CH-1163 88E6097 88E6020 88E1119 88E6071 Marvell 88E1512 88AP270M 88W8897 Marvell PHY 88E6352 88PG867 MV64460
2006 - ABCU-571NRZ

Abstract: 1000BASE-X sgmii mode sfp 571N sfp autonegotiation ABCU-57xxRZ ic 4026 use in digital pulse counter ABCU-571NR ieee802.3 document ABCU-5710RZ
Text: -T MII /10BASE-T No 100BASE-T MII /100BASE-T No 1000BASE-T GMII /1000BASE-X or SGMII , -X or SGMII 10BASE-T MII /10BASE-T 100BASE-T MII /100BASE-T 1000BASE-T GMII /1000BASE-X or SGMII 10BASE-T MII /10BASE-T 100BASE-T MII /100BASE-T 1000BASE-T GMII /1000BASE , Partner (5) 10BASE-T Remote MAC/SerDes (6, 7) MII /10BASE-T Link up? No GMII /1000BASE-X ABCU-57xxRZ Cat 5 or 5e 100BASE-T MII /100BASE-T No GMII /1000BASE-X ABCU-57xxRZ Cat 5 or


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PDF 1000BASE-T ABCU-57xxRZ ABCU-57xx00BASE-T ANSI/TIA/EIA-568-B 2-2001Commercial AV01-0308EN ABCU-571NRZ 1000BASE-X sgmii mode sfp 571N sfp autonegotiation ic 4026 use in digital pulse counter ABCU-571NR ieee802.3 document ABCU-5710RZ
2006 - 1000BASE-X

Abstract: ieee802.3 document avago SERDES Mb sfp autonegotiation SFP Loopback Adapter Module 1000BASE 0x9084 sgmii mode sfp sfp i2c eeprom 0xAC application note 0x9140
Text: SGMII HBCU-5710R Cat 5or 5e 10BASE-T GMII /1000BASE-X or SGMII MII /10BASE-T SGMII , 1000BASE-T GMII /1000BASE-X or SGMII Yes GMII /1000BASE-X HBCU-5710R 10BASE-T MII /10BASE , -5710R 1000BASE-T GMII /1000BASE-X or SGMII Yes SGMII HBCU-5710R 10BASE-T MII /10BASE-T Yes SGMII HBCU-5710R 100BASE-T MII /100BASE-T Yes SGMII HBCU-5710R 1000BASE-T GMII /1000BASE-X or SGMII Yes GMII /1000BASE-X HBCU-5710R 10BASE-T MII /10BASE-T No GMII


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PDF 1000BASE-T HBCU-5710R 1000BASE-X ANSI/TIA/EIA-568-B 2-2001Commercial 5989-0430EN AV01-0068EN ieee802.3 document avago SERDES Mb sfp autonegotiation SFP Loopback Adapter Module 1000BASE 0x9084 sgmii mode sfp sfp i2c eeprom 0xAC application note 0x9140
Marvell 88E1512

Abstract: 88E6352 88E6176 Marvell 88E1510 88E6172 88E6071 88E6020 88E6161 88E6097 88w8782
Text: Ethernet Switch 6 4 FE PHYs GMII /RGMII/ SGMII r we Po X -F e yp eT e Siz p 1.0W 1.0W , Ethernet Switch 11 8 FE PHYs GMII / SGMII 1.5W 88E609 5 only DB-88E6095-8F3GC 8K 256 , Switch 11 8 FE PHYs GMII /RGMII/ SGMII 8 FE PHYs GMII /RGMII/ SGMII 4 FE PHYs 1 GE PHY 1 Serdes 1 , Ethernet Switch 7 5 GE PHYs 2 GMII /RGMII/ MII 5 GE PHYs 1 RGMII/ MII / RMII 1 GMII / RGMII/ MII / RMII 5 , -Port AVB Gigabit Ethernet Switch 7 5 GE PHYs 2 GMII /RGMII/ MII 5 GE PHYs 2 GMII /RGMII/ MII 5 GE PHYs


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VSC8211

Abstract: RGMII to SGMII PHY SGMII L10M rgmii specification gmii layout 1000BASE-X sfp sgmii 1000BASE-SX SFP/RGMII to SGMII 100BASE-FX
Text: 1000BASE-X PHY with SGMII , SerDes, GMII , MII , TBI, RGMII / RTBI MAC Interfaces GENERAL DESCRIPTION: The , ETHERNET PRODUCTS VSC8211 Single Port 10/100/1000BASE-T PHY and 1000BASE-X PHY with SGMII , SerDes, GMII , MII , TBI, RGMII / RTBI MAC Interfaces 3.3v 10/100/1000 Mbps Ethernet MAC 1.2v Cat-5 UTP 10/100/1000BASE-T GMIII / MII , RGMII, TBI, RTBI MDC, MDIO Vitesse VSC8211 10/100 , TXER GTXCLK RXD[7:0] GMII MII RGMII TBI RTBI PCS DECODER TRELLIS DECODER PAM


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PDF VSC8211 10/100/1000BASE-T 1000BASE-X 10/100/1000BASE-T RJ-45 1000BASE-LX 1000BASE-SX 700mW VSC8211 RGMII to SGMII PHY SGMII L10M rgmii specification gmii layout 1000BASE-X sfp sgmii 1000BASE-SX SFP/RGMII to SGMII 100BASE-FX
2009 - example ml605

Abstract: Marvell PHY 88E1111 Xilinx Marvell PHY 88E1111 Xilinx spartan Marvell PHY 88E1111 Xilinx ML605 microblaze locallink 88E1111 RGMII config Marvell PHY 88E1111 ml505 LocalLink 88E1111 GMII config XAPP691
Text: to the PHY. GMII / MII , RGMII, SGMII and 1000BASE-X PCS/PMA interfaces are used in this example. Also , Subsystem Pattern Generator EMAC0 ( GMII / MII , RGMII, or SGMII ) Tx PHY Rx LocalLink Swap , , GMII / MII , RGMII, SGMII and 1000BASE-X PCS/PMA interfaces are all available. XAPP1144 (v1 , logic for the physical interfaces. The GMII / MII , RGMII, or SGMII interface is connected to an external , RJ45 jack, either GMII / MII , RGMII, or SGMII can be used, and is determined through the choice of


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PDF XAPP1144 ML605 example ml605 Marvell PHY 88E1111 Xilinx Marvell PHY 88E1111 Xilinx spartan Marvell PHY 88E1111 Xilinx ML605 microblaze locallink 88E1111 RGMII config Marvell PHY 88E1111 ml505 LocalLink 88E1111 GMII config XAPP691
2006 - 88E1111

Abstract: Marvell PHY 88E1111 Datasheet marvell 88E1111 register RGMII sgmii marvell 88E1118 Marvell PHY 88E1118 Marvell PHY 88E1111 layout Marvell 88E1112 88E1112 Marvell 88E1111
Text: with a low pin count, 4-pair, differential SGMII connection. The classic GMII interface defined in the , bridging function between SGMII and GMII buses. The transmit and receive data paths leverage the 1000BASE , solution. Figure 1. LatticeSC SGMII Solution 125MHz RefClk MAC/PHY Mode flexiPCS (G) MII 4 or , Adaptation GMII SGMII PCS IP Core 8 bits at 125MHz 8BI 8b10b + LSM SERDES 8 bits at , Independent Interface ( GMII ), Reduced GMII (RGMII), Serial GMII ( SGMII ), the Ten-Bit Interface (TBI), and


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PDF TN1127 22-wire 10Mbps, 100Mbps 1000Mbps 88E1111/88E1112 1-800-LATTICE 88E1111 Marvell PHY 88E1111 Datasheet marvell 88E1111 register RGMII sgmii marvell 88E1118 Marvell PHY 88E1118 Marvell PHY 88E1111 layout Marvell 88E1112 88E1112 Marvell 88E1111
2006 - 88E1111

Abstract: 88E1118 88E1112 sgmii specification ieee Marvell PHY 88E1111 Datasheet 88e111 Marvell PHY 88E1111 layout Marvell 88E1111 88E1111 PHY registers 88E1111 "mdio registers"
Text: connection with a low pin count, 4-pair, differential SGMII connection. The classic GMII interface defined , bridging function between SGMII and GMII buses. The transmit and receive data paths leverage the 1000BASE , (PCS) · Conforms to the Cisco SGMII Specification, Revision 1.7 · 4-bit or 8-bit (G) MII Interface , bits at 2.5, 25, 125MHz Rate Adaptation GMII SGMII PCS IP Core 8 bits at 125MHz 8BI , devices support the Gigabit Media Independent Interface ( GMII ), Reduced GMII (RGMII), Serial GMII ( SGMII


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PDF TN1133 22-wire 10Mbps, 100Mbps 1000Mbps 88E1111/88E1112 1-800-LATTICE 88E1111 88E1118 88E1112 sgmii specification ieee Marvell PHY 88E1111 Datasheet 88e111 Marvell PHY 88E1111 layout Marvell 88E1111 88E1111 PHY registers 88E1111 "mdio registers"
2007 - Marvell 88e111

Abstract: RGMII to SGMII PHY eTSEC GMII Initial marvell ethernet switch sgmii sgmii sgmii marvell 88e111 Marvell 88e111 driver mpc8313e etsec Ethernet ethernet phy sgmii
Text: , GMII , RGMII, TBI etc. For providing SGMII functionality, connections are provided to the SerDes , ) interface, just like any MII compatible PHY. To configure the processor to operate in SGMII mode, the TBI , . Figure 2 shows the functional details of SGMII support on the MPC8313E processor. MPC8313E GMII /RGMII eTSEC1 MDC/MDIO TBI/RTBI TBI Controller SerDes e300 Core SGMII (RxD/RxCLK/TxD) GMII , Setup and Code Table 1. SGMII Mode Register Initialization Steps (continued) Perform an MII


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PDF AN3354 MPC8313E Marvell 88e111 RGMII to SGMII PHY eTSEC GMII Initial marvell ethernet switch sgmii sgmii sgmii marvell 88e111 Marvell 88e111 driver mpc8313e etsec Ethernet ethernet phy sgmii
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