The Datasheet Archive

Top Results (2)

Part Manufacturer Description Datasheet Download Buy Part
HM1-65642B/883 Intersil Corporation 8KX8 STANDARD SRAM, 150ns, CDIP28
24502BVA Intersil Corporation 1KX4 STANDARD SRAM, 120ns, CDIP18

sram ecc Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2005 - Not Available

Abstract: No abstract text available
Text: 32 KB Cache FEC Crossbar Switch 2 MB Flash 80 KB SRAM ( ECC ) 512 KB SRAM ( ECC ) I/O , res Device 116 MHz Cache 32 KB Program flash 2 MB SRAM 592 KB DMA 32


Original
PDF MPC5668G 32-bit e200z0 MPC5668GFS
2005 - MPC5668G

Abstract: sram ecc Tresos e200z6 Lauterbach nexus IC3000 car gateway architecture NEXUS TRACE32 wiggler
Text: JTAG Power Architecture® e200z6 Core 2 MB Flash Data Flash 80 KB SRAM ( ECC ) 512 KB SRAM ( ECC ) I/O Bridge Standby RAM Boot Assist Module (BAM) Crossbar Slaves , SRAM Software (RTOS, Communication Stacks) Evaluation kit including CodeWarrior (build only


Original
PDF MPC5668G 32-bit MPC5668GFS sram ecc Tresos e200z6 Lauterbach nexus IC3000 car gateway architecture NEXUS TRACE32 wiggler
2010 - MPC5634

Abstract: sram ecc AN3953 MPC5632M MPC563xM Assembly instruction mpc5634 AN4027 AN3519 MPC5633M MPC5500
Text: MPC563xM internal SRAM map. The SRAM block also provides 7-bit error checking and correction ( ECC ) with , -bit write to the SRAM will generate a read/modify/write operation that will check the ECC value upon read. The SRAM initialization method is: Example 10. Initialize SRAM ECC //initialize 94k SRAM li mtctr , Initializing the SRAM ECC is straightforward. However, initializing SRAM in serial boot mode is also not difficult. When initializing the SRAM ECC in RAM mode, users must know where the last 32-bit word is stored


Original
PDF AN4027 MPC563xM MPC563xM MPC563XMRM, MPC5634 sram ecc AN3953 MPC5632M Assembly instruction mpc5634 AN4027 AN3519 MPC5633M MPC5500
2005 - MPC5602S

Abstract: e200z0h sram ecc xPC56XX motherboard service guide MPC5604S wVGA TFT LCD driver nexus 5001 MPC5606S eeprom emulation
Text: EEPROM (Emulation) RAM Controller Peripheral Bridge Freescale Technology Flash ( ECC ) LINFlex Graphics SRAM DSPI FlexCAN ADC I2C SUI LCD Flash ( ECC ) eMIOS200 SMD SSD SRAM ( ECC ) QuadSPI Color Indicator Bar/Volume no. Selector Guide Product Number , Price EEPROM emulation Documentation · Up to 48 KB on-chip SRAM with ECC Freescale Document , on-chip graphics SRAM (no ECC ) MPC560xS Microcontroller Product Brief Device family summary ·


Original
PDF 32-bit MPC560xS MPX560xS MPC560XSFAMFS MPC5602S e200z0h sram ecc xPC56XX motherboard service guide MPC5604S wVGA TFT LCD driver nexus 5001 MPC5606S eeprom emulation
2011 - MPC5675K

Abstract: e200z7d MPC5674 MPC567xK MPC5673 sram ecc eTimer MPC5673K e200z7 adas
Text: implemented at each output of this sphere of RC 2 MB Flash ( ECC ) replication (SoR). MDDR RC I/O Bridge 512 KB SRAM ( ECC ) RC A comprehensive suite of hardware and software development , with ECC XBAR · Up to 512 KB SRAM with ECC 0­150 MHz (+2% FM) Nominal platform frequency , chassis applications such as advanced flash and 512 KB SRAM , plus a feature set driver assistance , parallel processing tasks. Together Green Hills Software · Runtime Software with up to 512 KB SRAM


Original
PDF 32-bit MPC567xK MPC5675K LVD12) HVD12) LVD27) MPC5675KFS e200z7d MPC5674 MPC5673 sram ecc eTimer MPC5673K e200z7 adas
2009 - 4x40

Abstract: 4X40 LCD LCD 4x40 SPC560S60 BRSPC56XS0709 MCAL lin tft HMI SPC56 LQFP176 LQFP144
Text: Flash ( ECC ) GRAM controller 160-Kbyte graphic SRAM 64-Kbyte data Flash ( ECC ) Peripheral , generator 10-bit ADC 16 channels Quad SPI LCD 4x40 48-Kbyte SRAM ( ECC ) Applications QQ , Reduced cost of non-quality Z0h PowerPC Core ECC on all memories Memory/register protection Clock


Original
PDF SPC56xS 32-bit com/SPC56 SPC56xS SPC56 LQFP176/LQFP144 BRSPC56XS0709 4x40 4X40 LCD LCD 4x40 SPC560S60 BRSPC56XS0709 MCAL lin tft HMI LQFP176 LQFP144
2008 - 4X40 LCD

Abstract: cluster stepper motor SPC56xS sram ecc 64 32 spi lcd LQFP144 SPC56 SPC560S40 4X40 LCD module LCD 4x40
Text: to 2 Mbytes Code flash 24 to 64 Kbytes SRAM 160 Kbytes To 1 Mbytes SRAM ( ECC ) ( ECC ) 64 Kbytes Data flash ( ECC ) Peripheral bridge 3-4 DSPI 2-3 FlexCAN 2- 4 LINFlex 2-4 I²C , PowerPC Core n Zero defect strategy from design to production n ECC on all memories n Latest 90


Original
PDF SPC56xS 32-bit com/SPC56 SPC56xS SPC56 LQFP176/LQFP144 BRSPC56XS0908 4X40 LCD cluster stepper motor sram ecc 64 32 spi lcd LQFP144 SPC560S40 4X40 LCD module LCD 4x40
2005 - MPC5605B

Abstract: MPC5602B MPC5603B MPC5606B linflex wiggler MPC5602C MPC5605 MPC5603B package MPC5604C
Text: message latencies. Freescale Technology 2 SRAM ( ECC ) Color Indicator Bar/Volume no , mailbox data storage, ideal for CAN gateways to manage event driven vs. Flash ( ECC ) Peripheral


Original
PDF 32-bit MPC560xB/C e200z0 32-bit MPC5605B, SC512K XPC56XXMB MPC560xB MPC560XBFAMFS MPC5605B MPC5602B MPC5603B MPC5606B linflex wiggler MPC5602C MPC5605 MPC5603B package MPC5604C
2008 - SPC560D40

Abstract: SPC560B50 SPC560B60 SPC560C50 SPC560B40 car body control module SPC560D30 SPC560B54 SPC560B64 car gateway architecture
Text: 128128 Kbytes K to 4 Mbytes code Flash to 4 Mbytes ( ( ECC ) code Flash 20 to 256 Kbytes SRAM ( ECC ) Peripheral bridge SPI 2-6 I2C I²C 1 Watchdog eMIOs eMIOS 16­ 96 ch Timers 6 ch CTU System timers ( ECC ) FlexCAN 1-7 API/RTC 64 Kbytes data Flash LINFlex 2 - 10 12 SIU ( ECC ) 10/12-bit ADC 16­64 ch C line B line D line Core Code Data , non-quality n Z0h - Z4d PowerPC Core n Zero defect strategy from design to production n ECC on all


Original
PDF SPC56xB/C/D 32-bit com/SPC56 SPC56xB/C/D BRSPC56XB0908 10/12-bit 10-bit 10/12-bit, SPC560D40 SPC560B50 SPC560B60 SPC560C50 SPC560B40 car body control module SPC560D30 SPC560B54 SPC560B64 car gateway architecture
2011 - Nexus S camera

Abstract: No abstract text available
Text: PTP MII Master 96 KB SRAM ( ECC ) PDI TSENS ME PCU video_clk Slave MJPEG , ) Digital Core System ECC protected system SRAM (Static Random Access Memory) allowing zero wait , Buffer 96kB SRAM ( ECC ) PCU 64kB Data Flash ( ECC ) Slave ME 512kB Code Flash ( ECC , ) Output Buffer video_clk1 Slave 96KB SRAM ( ECC ) PCU 64KB Data Flash ( ECC ) ME 512KB , SRAM ECC MPC5604E microcontroller product brief, Rev. 2 Freescale Semiconductor


Original
PDF MPC5604EPB MPC5604E MPC5604P MPC5604P, Nexus S camera
2009 - SPC56EL

Abstract: spc56el60 SPC560P50 SPC56EL development tools SPC560P40 SPC560P spc56el50 aips SPC560P44 SPC560P34
Text: AIPS bridge SWT STM INTC SRAM ECC AIPS Bridge TSENS RC 2ND PLL XOSC FM PLL , JTAG Nexus PowerPCTM e200zx FPU VLE MMU CACHE FlexRay RC RC RC Flash ECC , ECC Error correction code FCCU Fault collection and control unit FlexCAN CAN controller FMPLL


Original
PDF SPC560P, SPC56EL 32-bit com/spc56 SPC56EL, SPC56HK SPC56 controllerx12-bit SPC56EL spc56el60 SPC560P50 SPC56EL development tools SPC560P40 SPC560P spc56el50 aips SPC560P44 SPC560P34
2009 - MPC5643L

Abstract: MPC5643L Microcontroller Reference Manual MPC5643LRM mpc5604p SKY BLUE freescale MPC5643L manual MPC5643L reference manual amba ahb bus arbitration AXBS MPC5643L user Manual mpc5643* CMU
Text: bridge AIPS bridge SRAM ECC Flash ECC RCCU Peripherals Figure 1. MPC5643L architecture , FlexRay INTC DMA2× Cross-bar switch Memory protection unit AIPS bridge SRAM ECC Flash ECC , FlexRay INTC DMA2× Cross-bar switch AIPS bridge SRAM ECC Flash ECC Peripherals Figure , reported by error-correcting codes ( ECC ) of the ECC protection of the flash and the system SRAM · ECC , , for example, the products use different versions of the e200 core. As the SRAM ECC on the MPC5643L


Original
PDF AN3952 MPC560xP MPC564xL MPC5604P MPC5643L MPC56xxx MPC564xL MPC5643L Microcontroller Reference Manual MPC5643LRM SKY BLUE freescale MPC5643L manual MPC5643L reference manual amba ahb bus arbitration AXBS MPC5643L user Manual mpc5643* CMU
2009 - SPC560D40

Abstract: Car security system block diagram SPC560B40L3 SPC560D40L3 SPC564B70L7 SPC560B50L3 SPC560D30L3 SPC560D SPC560D40L1 SPC564B64L7
Text: 128 Kbytes to 4 Mbytes ( code Flash Peripheral bridge RAM controller 12 to 256 Kbytes SRAM ( ECC ) ( ECC ) 64 Kbytes data Flash ( ECC ) SPI 2-8 I²C 1 Watchdog eMIOs 16-96 ch , ECC on all memories n Latest 90 nm automotive focused technology n Memory/register protection


Original
PDF SPC56xB/C/D 32-bit com/SPC56 SPC56xB/C/D BRSPC56XB0309 SPC560D40 Car security system block diagram SPC560B40L3 SPC560D40L3 SPC564B70L7 SPC560B50L3 SPC560D30L3 SPC560D SPC560D40L1 SPC564B64L7
2009 - MPC5643L

Abstract: mpc5643 MPC5643LRM MPC5643L Microcontroller Reference Manual MPC5604P MPC5643L manual MPC560XPRM MPC5643L interrupts MPC5643L pinout MPC5643L user Manual
Text: RCCU RCCU AIPS bridge AIPS bridge SRAM ECC Flash ECC RCCU Peripherals Figure 1 , FlexRay INTC DMA2× Cross-bar switch Memory protection unit AIPS bridge SRAM ECC Flash ECC , × Cross-bar switch AIPS bridge SRAM ECC Flash ECC Peripherals Figure 3. MPC5604P block diagram , reported by error-correcting codes ( ECC ) of the ECC protection of the flash and the system SRAM · ECC , , for example, the products use different versions of the e200 core. As the SRAM ECC on the MPC5643L


Original
PDF AN3952 MPC560xP MPC564xL MPC5604P MPC5643L MPC56xxx MPC564xL mpc5643 MPC5643LRM MPC5643L Microcontroller Reference Manual MPC5643L manual MPC560XPRM MPC5643L interrupts MPC5643L pinout MPC5643L user Manual
2008 - eMIOS200

Abstract: MPC5668G e200z650 BCM API code MPC5668E MPC5668 e200z6 e200Z0 sram ecc MPC5510
Text: KB 36 x ADC 2 x I2C 2 x DSPI 24 x eMIOS Flash ( ECC ) 6 x FlexCAN SRAM ( ECC ) SRAM ( ECC ) Standby RAM LEGEND ADC BAM DSPI ECC eMIOS eDMA eSCI FEC FlexCAN FlexRayTM , 32 x eMIOS 2 x DSPI 2 x DSPI SRAM ( ECC ) 8 x eSCI 2 x I2C 2 x I2C Standby RAM , error-correcting codes ( ECC ) reporting for RAM and flash 2.6.14 On-Chip SRAM On-chip SRAM on the MPC5668G , /E has two levels of memory hierarchy, a 32 KB unified cache and 592/128 KB on-chip L2 SRAM . 2 MB of


Original
PDF MPC5668G/E 32-bit MPC5668G; MPC551x eMIOS200 MPC5668G e200z650 BCM API code MPC5668E MPC5668 e200z6 e200Z0 sram ecc MPC5510
2010 - bosch edc 16

Abstract: bosch edc 17 bosch edc 15 lsm 11 bosch MPC5643L e200z4 bosch edc e200z4d BOSCH edc 15 map location bypass ballast uart
Text: Parallel Mode: 6 × 3 1 MB, ECC , RWW Static RAM ( SRAM ) 128 KB, ECC MPC5643L Microcontroller , Unit ECC logic for SRAM ECC logic for SRAM PBRIDGE RC TSENS PBRIDGE RC Flash memory ECC bits + logic TSENS SRAM ECC bits ADC BAM CMU CRC CTU DSPI ECC ECSM eDMA , on-chip SRAM with ECC - Built-in RWW capabilities for EEPROM emulation SIL3/ASILD innovative safety , 1-bit error correction, 2-bit error detection 2.8.6 On-chip SRAM with ECC The MPC5643L SRAM


Original
PDF MPC5643LPB MPC5643L 32-bit bosch edc 16 bosch edc 17 bosch edc 15 lsm 11 bosch e200z4 bosch edc e200z4d BOSCH edc 15 map location bypass ballast uart
2010 - MPC5646C

Abstract: MPC5645 e200z4d MPC5645B MPC5644B MPC5645C MPC5644C MPC5646B MPC5646c freescale e200z4
Text: PROTECTION UNIT SIUL 8 PIT PBridge SWT 4 STM 128 KB SRAM ( ECC ) 128 KB SRAM ( ECC , memory memory ( ECC ) ( ECC ) ( ECC ) SSCM ECSM BAM STCU 16 Semaphores DMAMux COMMUNICATION I , INTC JTAGC LINFlex Nexus PBRIDGE PIT RTC/API SIUL SRAM SSCM STM SWT STCU , 1.5 MB 2 MB Data flash memory 3 MB 4x16 KB SRAM 128 KB 192 KB MPU 160 KB , calculated based upon SRAM bootup after STANDBY exit. 8 KB of the RAM contents is retained in STANDBY mode


Original
PDF MPC5646CPB MPC5646C 32-bit MPC5645 e200z4d MPC5645B MPC5644B MPC5645C MPC5644C MPC5646B MPC5646c freescale e200z4
2010 - bosch edc 17

Abstract: bosch edc 16 e200z4 SPC560P lsm 11 bosch BOSCH ECU cross reference SPC56EL60L5C bosch edc 15 SPC564L60L3 SPC56EL
Text: with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-chip SRAM with ECC . . . . . , Crossbar Switch Memory Protection Unit ECC logic for SRAM Crossbar Switch Memory Protection Unit ECC logic for SRAM PBRIDGE RC RC PBRIDGE TSENS Flash memory ECC bits + logic RC Secondary PLL SRAM ECC bits TSENS IRCOSC FMPLL SSCM CMU CMU CMU BAM CRC FlexPWM , , SPC56EL60L5 Features 2.7.6 On-chip SRAM with ECC The SPC56EL60xx SRAM provides a general-purpose


Original
PDF SPC56EL60L3 SPC56EL60L5 32-bit e200z4d bosch edc 17 bosch edc 16 e200z4 SPC560P lsm 11 bosch BOSCH ECU cross reference SPC56EL60L5C bosch edc 15 SPC564L60L3 SPC56EL
2008 - SPC560P50L3

Abstract: kb 3310 ieee 1149.7 LINFlex PROTOCOL instruction set e200z0 bosch automotive relay Bosch jtag SPC560 serial peripheral interface in flexray controller BOSCH ECU information
Text: On-chip flash memory with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 On-chip SRAM , KB Data Flash ECC 40 KB SRAM ECC Slave Boot Assist Module System Integration Unit-Lite 512 KB Code , with ECC Up to 40 KB SRAM on-chip with ECC INTC - Interrupt controller capable of handling 144 , SRAM with ECC The SPC560Px SRAM module provides a general-purpose memory of up to 40 KB in total. ECC , with an e200z6 core and 64-bit wide ECC . The SRAM module provides the following features


Original
PDF SPC560P50L3, SPC560P50L5 SPC560P44L3, SPC560P44L5 32-bit 60MHz e200z0h 32bit 512KByte 4x16KByte SPC560P50L3 kb 3310 ieee 1149.7 LINFlex PROTOCOL instruction set e200z0 bosch automotive relay Bosch jtag SPC560 serial peripheral interface in flexray controller BOSCH ECU information
2007 - lauterbach s-record

Abstract: TRACE32 CMM Boot from external memory 0x4000FFFF MPC5500 Configuration and Initialization 0x4000003f MPC5500 sram ecc MPC5554 0b0101101
Text: error correction coding ( ECC ) is implemented for all SRAM ( SRAM ). It is essential that the ECC parity , initialized. · Insert SRAM ECC initialization code: The serial download mode of the BAM performs 64 , enables the ECC bits for that double word. By placing SRAM initialization code at the start of the , devices: Table 1. Devices supported by AN2831 Device Core VLE Supported SRAM Size Bus , SRAM Figure 1. MPC5500 Boot Assist Module Flow Diagram MPC5500 Boot Assist Module, Rev. 0 3


Original
PDF AN2831 MPC5500 MPC500 lauterbach s-record TRACE32 CMM Boot from external memory 0x4000FFFF MPC5500 Configuration and Initialization 0x4000003f sram ecc MPC5554 0b0101101
2004 - st nand flash application note

Abstract: an1823 NAND512-A NAND256-A NAND128-A NAND01G-A AN1935 AN1819 AN1817 ARM7TDMI
Text: CPU Command Transfer Data from NAND to SRAM ECC executed directly in SRAM 500µs 250µs , ) 15µs DMA unused ECC executed directly in SRAM unused 250µs Time ai08656 Note , from the NAND without having to use Error Correction Code ( ECC ). May 2004 1/19 APPLICATION , DMA vs. Without DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ECC , . . . . . . . . . . 16 Figure 11.Code Transfer to External SRAM . . . . . . . . . . . . . . . . . .


Original
PDF AN1935 Byte/264 st nand flash application note an1823 NAND512-A NAND256-A NAND128-A NAND01G-A AN1935 AN1819 AN1817 ARM7TDMI
Not Available

Abstract: No abstract text available
Text: €¢ 1.5 MB SRAM ( ECC support on 512KB) • NAND flash controller with 32-bit ECC • Dual Quad SPI , no L2 Cache, or, − 1MB SRAM with 512KB of L2 Cache (Optional) • • • • ECC support on 512KB SRAM LPDDR2/DDR3 DRAM controller (8/16-bit ECC ) NAND Flash Controller with 32-bit ECC , SRAM with 512KB of L2 Cache (Optional) • • • • • ECC support on 512KB SRAM 64KB , Real-time, highly integrated solutions with 2D display and 1.5 MB SRAM to control, interface, connect


Original
PDF 153km MPC5606S 24-bit
2011 - Automotive Product Selector Guide

Abstract: products automotive IS61WV51216 IS61WV512 DDR RAM 512M IS61LPS2048 is66wve2m16 IS61WV25632 BGA-60 8M*32
Text: leadframe 10. ECC = ECC based SRAM www.issi.com November 2011 408-969-6600 Automotive Product , ),mBGA(48) 8,10,20 TSOP2(44),mBGA(48) 25,35 TSOP2(44),mBGA(48) 8,10,20 BGA(90) ECC Based SRAM x24 Interface ECC Based SRAM ECC Based SRAM Low Power Low Power PowerSaverTM Low Power Asynchronous SRAM , of new products. We do this with our SRAM and DRAM product families. Product Support One of the , SRAM Den Org Part No. Vcc VccQ Speed (Mhz) tKQ (ns) Pkg (#Pins) Status(1)(2) Comment(3,4,5,6) 4M


Original
PDF
2009 - SPC56EL

Abstract: spc56el60 SPC56EL60L5 bosch edc 16 bosch edc 17 38448 SPC560P e200z4d bosch edc 15 e200z4
Text: . . . . . . . . . . . . . . . . . . . . . 18 2.7.6 On-chip SRAM with ECC . . . . . . . . . . . , Switch Crossbar Switch Memory Protection Unit Memory Protection Unit ECC logic for SRAM AIPS Bridge ECC logic for SRAM AIPS Bridge RC Flash memory ECC bits + logic TSENS RC SRAM ECC bits T-Sens ADC AIPS BAM CMU CRC CTU DMA DSPI ECC ECSM FCCU FlexCAN FMPLL , 1-bit error correction, 2-bit error detection On-chip SRAM with ECC The SPC56EL60L5 SRAM


Original
PDF SPC56EL60L5 32-bit e200z4d LQFP144 LBGA257 16-priority SPC56EL spc56el60 SPC56EL60L5 bosch edc 16 bosch edc 17 38448 SPC560P bosch edc 15 e200z4
2011 - bosch edc 17

Abstract: bosch edc 16 bosch edc 15 SPC56EL60 SPC56EL60L3 bosch general purpose actuator bypass ballast uart e200z4d ST TRACE CODE TRANSISTOR lsm 11 bosch
Text: SRAM with ECC ­ Built-in RWW capabilities for EEPROM emulation SIL3/ASILD innovative safety concept , with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-chip SRAM with ECC . . . . . . , with error detection code Signal processing engine (SPE) 1 MB Flash memory with ECC 128 KB on-chip SRAM , 16/38 Features SPC56EL60L3, SPC56EL60L5 2.7.6 On-chip SRAM with ECC The SPC56EL60 SRAM , address decoder. The SRAM module provides the following features: System SRAM : 128 KB ECC on 32


Original
PDF SPC56EL60L3 SPC56EL60L5 32-bit e200z4d bosch edc 17 bosch edc 16 bosch edc 15 SPC56EL60 bosch general purpose actuator bypass ballast uart ST TRACE CODE TRANSISTOR lsm 11 bosch
Supplyframe Tracking Pixel