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Part ECAD Model Manufacturer Description Datasheet Download Buy Part
DRA722AHGABCQ1 DRA722AHGABCQ1 ECAD Model Texas Instruments SoC Processor for Automotive Infotainment 760-FCBGA
DRA725AGGABCRQ1 DRA725AGGABCRQ1 ECAD Model Texas Instruments SoC Processor for Automotive Infotainment 760-FCBGA
DRA725AGGABCQ1 DRA725AGGABCQ1 ECAD Model Texas Instruments SoC Processor for Automotive Infotainment 760-FCBGA
DRA722AHGABCRQ1 DRA722AHGABCRQ1 ECAD Model Texas Instruments SoC Processor for Automotive Infotainment 760-FCBGA
DRA756PPIGABZQ1 DRA756PPIGABZQ1 ECAD Model Texas Instruments Multi-core SoC processors with ISP and pin-compatible with DRA75x SoCs for infotainment applications 760-FCBGA -40 to 125
DRA746PPIGABZQ1 DRA746PPIGABZQ1 ECAD Model Texas Instruments Multi-core SoC processors with ISP and pin-compatible with DRA74x SoC processors 760-FCBGA -40 to 125

soc 1044 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2003 - soc 1044

Abstract: 88E1145 Marvell PHY 88E1145 Prestera-FX910 PRESTERA SWITCH Prestera marvell 88e114
Text: system-on-a-chip ( SoC ) that supports full-wirespeed L2 bridging, L3 routing and L2-L4 advanced trafÞc classiÞcation , Ð 32-bit/66 MHz PCI bus interface Ð IEEE 1149.1 (JTAG) support Ð 1044 PBGA package Ð Low power


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PDF PresteraTM-EX120/EX125 12-Port 98EX120/98EX125 Prestera-EX120/EX125 PresteraEX120/EX125 98EX120/125-001 soc 1044 88E1145 Marvell PHY 88E1145 Prestera-FX910 PRESTERA SWITCH Prestera marvell 88e114
2003 - soc 1044

Abstract: 98EX110 Prestera Marvell multicast
Text: uncompromising non-blocking performance and system scalability. It is a highly integrated system-on-a-chip ( SoC , frame support Ð 32-bit/66 MHz PCI bus interface Ð IEEE 1149.1 (JTAG) support Ð 1044 PBGA package Ð


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PDF PresteraTM-EX110/EX115 98EX110/98EX115 Prestera-EX110/EX115 PresteraEX110/EX115 98EX110/115-001 soc 1044 98EX110 Prestera Marvell multicast
K5W1G

Abstract: TWL4030 sandisk SD Card 2GB sony psp lcd sandisk sd card sony dvp-ns51p dvp-ns51p SMSC9115 SONY PSP 2001 v4l2 camera
Text: . 13 5. ALSA SoC Audio Driver , . 13 5.1. ALSA SoC Architecture , Driver Input driver V4l2 ALSA SoC (MUSB, EHCI) USB 2.0 HID Host (MUSB, EHCI) USB 2.0 ISO , . Resizer Performance 14 Platform Support Products Version 02.01.01.08 ALSA SoC Audio Driver Abstract This chapter provides details on ALSA SoC audio driver along with throughput and CPU load numbers


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PDF OMAP35x K5W1G TWL4030 sandisk SD Card 2GB sony psp lcd sandisk sd card sony dvp-ns51p dvp-ns51p SMSC9115 SONY PSP 2001 v4l2 camera
2012 - SPRS836D

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x™ DSP Core , important disclaimers. PRODUCTION DATA. TCI6638K2K Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , dispatch that directs tasks to the appropriate available hardware. The packet-based system on a chip ( SoC , Infrastructure KeyStone SoC is a member of the C66x family based on TI's new KeyStone II Multicore SoC , allows the SoC resources to operate efficiently and seamlessly. This unique SoC architecture also


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PDF TCI6638K2K SPRS836Dâ TCI6638K2K TMS320C66xâ 1024K SPRS836D
2012 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) 1 TCI6636K2H Features and Description 1.1 Features • Eight TMS320C66x™ DSP Core , System-on-Chip ( SoC ) SPRS835F—October 2013 1.2 Applications • Small Cell 1.3 KeyStone Architecture , chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central resource to move packets. The , Infrastructure KeyStone SoC is a member of the C66x family based on TI's new KeyStone II Multicore SoC , allows the SoC resources to operate efficiently and seamlessly. This unique SoC architecture also


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PDF TCI6636K2H SPRS835Fâ TCI6636K2H TMS320C66xâ 1024K
2012 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) Check for Evaluation Modules (EVM): EVMK2H 1 66AK2H14/12/06 Features and Description , disclaimers. PRODUCTION DATA. 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , . The packet-based system on a chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central , System-on-Chip ( SoC ) SPRS866E—November 2013 1.5 Enhancements in KeyStone II The KeyStone II architecture , Features and Description 3 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC


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PDF 66AK2H14/12/06 SPRS866Eâ 66AK2H14/12/06 66AK2H14/12) 66AK2H06) TMS320C66xâ 1024K Cortex-A15
2014 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) 1 TCI6630K2L Features and Description 1.1 Features • ARM CorePac – Two ARM , CorePac TCI6630K2L Multicore DSP+ARM KeyStone II System-on-Chip ( SoC ) SPRS893B—March 2014 1.2 , appropriate available hardware. The packet-based system on a chip ( SoC ) uses the 2-Tbps capacity of the , Infrastructure KeyStone SoC is a member of the C66x family based on TI's new KeyStone II Multicore SoC , queue-based communication system that allows the SoC resources to operate efficiently and seamlessly. This


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PDF TCI6630K2L SPRS893Bâ TCI6630K2L
2013 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) Check for Evaluation Modules (EVM): EVMK2H 1 66AK2H14/12/06 Features and Description , disclaimers. PRODUCTION DATA. 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , . The packet-based system on a chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central , System-on-Chip ( SoC ) SPRS866E—November 2013 1.5 Enhancements in KeyStone II The KeyStone II architecture , Features and Description 3 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC


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PDF 66AK2H14/12/06 SPRS866Eâ 66AK2H14/12/06 66AK2H14/12) 66AK2H06) TMS320C66xâ 1024K Cortex-A15
2012 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) Check for Evaluation Modules (EVM): EVMK2H 1 66AK2H14/12/06 Features and Description , disclaimers. PRODUCTION DATA. 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , . The packet-based system on a chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central , System-on-Chip ( SoC ) SPRS866E—November 2013 1.5 Enhancements in KeyStone II The KeyStone II architecture , Features and Description 3 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC


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PDF 66AK2H14/12/06 SPRS866Eâ 66AK2H14/12/06 66AK2H14/12) 66AK2H06) TMS320C66xâ 1024K Cortex-A15
2012 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) Check for Evaluation Modules (EVM): EVMK2H 1 66AK2H14/12/06 Features and Description , disclaimers. PRODUCTION DATA. 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , . The packet-based system on a chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central , System-on-Chip ( SoC ) SPRS866E—November 2013 1.5 Enhancements in KeyStone II The KeyStone II architecture , Features and Description 3 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC


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PDF 66AK2H14/12/06 SPRS866Eâ 66AK2H14/12/06 66AK2H14/12) 66AK2H06) TMS320C66xâ 1024K Cortex-A15
2012 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) Check for Evaluation Modules (EVM): EVMK2H 1 66AK2H12/06 Features and Description 1.1 , . 66AK2H12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC ) SPRS866D—October 2013 1.2 , chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central resource to move packets. The , System-on-Chip ( SoC ) SPRS866D—October 2013 1.5 Enhancements in KeyStone II The KeyStone II architecture , Features and Description 3 66AK2H12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC


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PDF 66AK2H12/06 SPRS866Dâ 66AK2H12/06 66AK2H12) 66AK2H06) TMS320C66xâ 1024K Cortex-A15
2013 - 60K6

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) Check for Evaluation Modules (EVM): EVMK2H 1 66AK2H14/12/06 Features and Description , disclaimers. PRODUCTION DATA. 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , . The packet-based system on a chip ( SoC ) uses the 2-Tbps capacity of the TeraNet switched central , System-on-Chip ( SoC ) SPRS866E—November 2013 1.5 Enhancements in KeyStone II The KeyStone II architecture , Features and Description 3 66AK2H14/12/06 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC


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PDF 66AK2H14/12/06 SPRS866Eâ 66AK2H14/12/06 66AK2H14/12) 66AK2H06) TMS320C66xâ 1024K Cortex-A15 60K6
2014 - Not Available

Abstract: No abstract text available
Text: IGLOO2 and SmartFusion2 SoC FPGAs Datasheet IGLOO2 and SmartFusion2 SoC FPGAs Datasheet , IGLOO2 and SmartFusion2 SoC FPGAs Datasheet Table of Contents 19.IGLOO2 Specifications . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . 121 Revision 1 3 IGLOO2 and SmartFusion2 SoC , ) . . . . . . . . . . . . . . . . . 119 Revision 1 4 IGLOO2 and SmartFusion2 SoC FPGAs Datasheet List of Tables Introduction Device Status Table 1. IGLOO2 and SmartFusion2 SoC FPGAs Device


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2014 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) 1 66AK2E05/02 Features and Description • ARM® Cortex™-A15 MPCore™ CorePac – Up , 66AK2E05, 66AK2E02 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC ) SPRS865B—January 2014 1.2 , performance device based on TI's KeyStone II Multicore SoC Architecture, incorporating the most , Documentation Feedback 66AK2E05, 66AK2E02 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , ( SoC ) SPRS865B—January 2014 1.6 Functional Block Diagram The figures below show the functional


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PDF 66AK2E05, 66AK2E02 SPRS865Bâ 66AK2E05/02 Cortex-A15 Cortex-A15 TMS320C66xâ
2014 - Not Available

Abstract: No abstract text available
Text: System-on-Chip ( SoC ) 1 66AK2E05/02 Features and Description • ARM® Cortex™-A15 MPCore™ CorePac – Up , 66AK2E05, 66AK2E02 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC ) SPRS865B—January 2014 1.2 , performance device based on TI's KeyStone II Multicore SoC Architecture, incorporating the most , Documentation Feedback 66AK2E05, 66AK2E02 Multicore DSP+ARM KeyStone II System-on-Chip ( SoC , ( SoC ) SPRS865B—January 2014 1.6 Functional Block Diagram The figures below show the functional


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PDF 66AK2E05, 66AK2E02 SPRS865Bâ 66AK2E05/02 Cortex-A15 Cortex-A15 TMS320C66xâ
2014 - ksz8863 EVAL BOARD

Abstract: ANLAN204
Text: ANLAN204 Updating PTP Software on the KSZ9692 SoC 2-MII Board and SoC Test Board Rev. 1.0 Introduction This application note describes two methods for updating the software on the Soc 2-MII Board and its predecessor – the Soc Test Board. The two boards are essentially identical, and this document refers to them both as the “SoC board”. Table 1. SoC Board Identification Ordering Part Number Silkscreen Label on Board KSZ9692-MII-PTP-EV Soc 2-MII BOARD KSZ9692PB-PTP-EVAL Soc Test BOARD


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PDF ANLAN204 KSZ9692 KSZ9692-MII-PTP-EV KSZ9692PB-PTP-EVAL KSZ8463, KSZ8462 KSZ8441 KSZ8463MLI-EVAL KSZ8462HLI-EVAL KSZ8441HLI-EVAL ksz8863 EVAL BOARD ANLAN204
2008 - TMS320DA830

Abstract: DA830 D830k011 sprug83 SPRS483A avr lcd 2x16 SPRS483 omap 3630 ax 2008 mp3 TMS320C674x
Text: TMS320DA830/TMS320DA828 Digital Audio System-on-Chip ( SoC ) www.ti.com SPRS483A ­ NOVEMBER 2008 ­ REVISED MAY 2009 1 TMS320DA830/TMS320DA828 Digital Audio System-on-Chip ( SoC ) · · · , Dual Core Digital Audio SoC ­ 300-MHz ARM926EJ-STM RISC MPU ­ 300-MHz C674xTM VLIW DSP · · · , System-on-Chip ( SoC ) SPRS483A ­ NOVEMBER 2008 ­ REVISED MAY 2009 · ADVANCE INFORMATION · · · · , · · · · · · TMS320DA830/TMS320DA828 Digital Audio System-on-Chip ( SoC ) USB 2.0


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PDF TMS320DA830/TMS320DA828 SPRS483A TMS320DA830/TMS320DA828 96/24TM TMS320DA830 DA830 D830k011 sprug83 SPRS483A avr lcd 2x16 SPRS483 omap 3630 ax 2008 mp3 TMS320C674x
2012 - Not Available

Abstract: No abstract text available
Text: + battery-modeling algorithm ModelGaugeK to track the battery relative state-of-charge ( SOC ) continuously over , insertion, the ICs debounce initial voltage measurements to improve the initial SOC estimate, thus allowing them to be located on system side. SOC , voltage, and rate information is accessed using the I2C , Debounce  Best of 16 Samples to Estimate Initial SOC S Programmable Reset for Battery Swap  2.28V to 3.48V Range S Configurable Alert Indicator  Low SOC  1% Change in SOC ï


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PDF MAX17048 /MAX17049 MAX17048/MAX17049 MAX17049
2013 - altera board

Abstract: No abstract text available
Text: Remote Debugging over TCP/IP for Altera SoC 2013-09-18 AN-693 Subscribe Send Feedback , of using an Altera SoC . Related Information Analyzing and Debugging Designs with the System , Familiarity with networking setup requirements SLD Hub Controller Linux driver (for SoC device) Linux , connected to the Altera FPGA (either internally or externally) Altera SoC with the HPS connected to an , over TCP/IP for Altera SoC Send Feedback AN-693 2013-09-18 System Components 3 System


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PDF AN-693 0-00069-g54902dfdirty. altera board
2012 - Not Available

Abstract: No abstract text available
Text: to track the battery relative state-of-charge ( SOC ) continuously over a widely varying charge , battery insertion, the ICs debounce initial voltage measurements to improve the initial SOC estimate, allowing them to be located on system side. SOC and voltage information is accessed using the I2C interface , Initial SOC S Programmable Reset for Battery Swap 2.28V to 3.48V Range S Low SOC Alert Indicator S I2C , 1) PARAMETER Supply Voltage Fuel-Gauge SOC Reset (VRESET Register) Data I/O Pins Supply Current Time


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PDF MAX17058 /MAX17059 MAX17058/MAX17059 MAX17059
2012 - MAX17058X

Abstract: MAX17058G MAX17058
Text: to track the battery relative state-of-charge ( SOC ) continuously over a widely varying charge , battery insertion, the ICs debounce initial voltage measurements to improve the initial SOC estimate, allowing them to be located on system side. SOC and voltage information is accessed using the I2C interface , Initial SOC S Programmable Reset for Battery Swap 2.28V to 3.48V Range S Low SOC Alert Indicator S I2C , 1) PARAMETER Supply Voltage Fuel-Gauge SOC Reset (VRESET Register) Data I/O Pins Supply Current Time


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PDF MAX17058 /MAX17059 MAX17058/MAX17059 MAX17059 MAX17058X MAX17058G
2012 - MAX17058G

Abstract: 7812
Text: ModelGaugeK to track the battery relative state-of-charge ( SOC ) continuously over a widely varying charge , . On battery insertion, the ICs debounce initial voltage measurements to improve the initial SOC estimate, allowing them to be located on system side. SOC and voltage information is accessed using the , Quiescent Current: 23µA SBattery-Insertion Debounce Best of 16 Samples Estimates Initial SOC SProgrammable Reset for Battery Swap 2.28V to 3.48V Range SLow SOC Alert Indicator SI2C Interface


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PDF MAX17058 /MAX17059 MAX17058/MAX17059 MAX17059 MAX17058G 7812
2013 - Not Available

Abstract: No abstract text available
Text: relative state-of-charge ( SOC ) continuously over a widely varying charge/discharge conditions. The , , the ICs debounce initial voltage measurements to improve the initial SOC estimate, allowing them to be located on system side. SOC and voltage information is accessed using the I2C interface. The ICs , Current: 23µA S Battery-Insertion Debounce  Best of 16 Samples Estimates Initial SOC S Programmable Reset for Battery Swap  2.28V to 3.48V Range S Low SOC Alert Indicator S I2C Interface


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PDF MAX17058/MAX17059 MAX17058/MAX17059 MAX17058 MAX17059
2012 - Not Available

Abstract: No abstract text available
Text: + battery-modeling algorithm ModelGaugeK to track the battery relative state-of-charge ( SOC ) continuously over , insertion, the ICs debounce initial voltage measurements to improve the initial SOC estimate, thus allowing them to be located on system side. SOC , voltage, and rate information is accessed using the I2C , Battery-Insertion Debounce  Best of 16 Samples to Estimate Initial SOC S Programmable Reset for Battery Swap  2.28V to 3.48V Range S Configurable Alert Indicator  Low SOC  1% Change in SOC


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PDF MAX17048/MAX17049 MAX17048/MAX17049 MAX17048 MAX17049
2012 - MAX17049X

Abstract: No abstract text available
Text: ModelGaugeK to track the battery relative state-of-charge ( SOC ) continuously over widely varying charge and , measurements to improve the initial SOC estimate, thus allowing them to be located on system side. SOC , voltage , Estimate Initial SOC S Programmable Reset for Battery Swap 2.28V to 3.48V Range S Configurable Alert Indicator Low SOC 1% Change in SOC Battery Undervoltage/Overvoltage VRESET Alert S I2C Interface S 8 , SOC Reset (VRESET Register) Data I/O Pins SYMBOL VIN VRST SCL, SDA, ALRT (VIN = 2.5V to 4.5V, TA


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PDF MAX17048 /MAX17049 MAX17048/MAX17049 MAX17049 MAX17049X
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