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Part Manufacturer Description Datasheet Download Buy Part
LTC2856-1 Linear Technology 20Mbps and Slew Rate Limited 15kV RS485/RS422 Transceiver
LTC2856CDD-2#TRPBF Linear Technology LTC2856 - 20Mbps and Slew Rate Limited 15kV RS485/RS422 Transceiver; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
LTC2856HMS8-1#TRPBF Linear Technology LTC2856 - 20Mbps and Slew Rate Limited 15kV RS485/RS422 Transceiver; Package: MSOP; Pins: 8; Temperature Range: -40°C to 125°C
LTC2856IMS8-2#TRPBF Linear Technology LTC2856 - 20Mbps and Slew Rate Limited 15kV RS485/RS422 Transceiver; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C
LTC2857HDD-1#TRPBF Linear Technology LTC2857 - 20Mbps and Slew Rate Limited 15kV RS485/RS422 Transceiver; Package: DFN; Pins: 8; Temperature Range: -40°C to 125°C
LTC2857IDD-2#TRPBF Linear Technology LTC2857 - 20Mbps and Slew Rate Limited 15kV RS485/RS422 Transceiver; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C

slew rate LM307 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1995 - slew rate LM307

Abstract: transistor smd marking KX LM307 LM107 National Semiconductor AN20 op amps lm307 Search LB-19 LM307N ic tl 741 OF IC 741
Text: Application Notes Input Output Type Bandwidth, typ (MHz) Slew Rate , typ (Volts/usec) Supply Current per , -19: Predicting OP Amp Slew Rate Limited Response Please use Adobe Acrobat to view PDF file(s). If you have , LM107 LM207 LM307 Operational Amplifiers December 1994 LM107 LM207 LM307 Operational , b25 C to a 85 C and the LM307 from 0 C to a 70 C Features Y Y Y Y Offset voltage 3 mV maximum , 30V g 15V Continuous b 55 C to a 125 C b 25 C to a 85 C b 65 C to a 150 C LM307 g 18V 500 mW g 30V


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PDF LM107 LM207 LM307 LM101A slew rate LM307 transistor smd marking KX National Semiconductor AN20 op amps lm307 Search LB-19 LM307N ic tl 741 OF IC 741
LM107

Abstract: slew rate LM307 Signal Conditioning Amplifiers FET WEIN BRIDGE OSCILLATOR wein bridge oscillator FET linear wein oscillator lm107j8 LM301AJ8 LM301AH slew rate LM107
Text: and slew rate to be optimized for the application. The LM107 is identical to the LM101A with the , urm TECHNOLOGY LM101A/LM301A LIVUÜ7/ LM307 Operational Amplifiers KffiUIKS ■30 Volt , /LM107. ±22 Volts LM301A/ LM307 . ±18 Volts Differential Input Voltage , . Indefinite Operating Temperature Range LM101A/LM107 .-55°Cto125°C LM301A/ LM307 . 0°Cto 70°C Maximum Junction Temperature LM101A/LM107 . 150°C LM301A/ LM307


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PDF LM101A/LM301A 7/LM307 LM101A LM107 LM101A/107 -Kq14 015N-1> LM107, slew rate LM307 Signal Conditioning Amplifiers FET WEIN BRIDGE OSCILLATOR wein bridge oscillator FET linear wein oscillator lm107j8 LM301AJ8 LM301AH slew rate LM107
Signal Conditioning Amplifiers

Abstract: slew rate LM307 101-AH LM307T
Text: external compensation, allowing the frequency response and slew rate to be optimized for the application , LM101A/LM301A _LM.107/ LM307 JÊ ^ m F FflTURS r r u v TECHNOLOGY m . , Supply Voltage LM101A/LM107. ±22 Volts LM301A/ LM307 , LM101A/LM107 . -55°C to125°C LM301A/ LM307 . 0°Cto 70°C Maximum Junction Temperature LM101A/LM107 . 150°C LM301A/ LM307


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PDF LM101A/LM301A 107/LM307 LM101A LM107 LM101A/107 LM107/LM307 Signal Conditioning Amplifiers slew rate LM307 101-AH LM307T
301Ah

Abstract: No abstract text available
Text: compensation, allowing the frequency response and slew rate to be optimized for the application. Th e L M 1 0 7 , LM101A/LM301A _ LM107/ LM307 O perational Amplifiers FCflTURCS 30 Volt Differential Input , MAX 0 .7 2.0 3.0 15 10 20 0.1 0.2 75 100 LM301A/ LM307 MIN TYP MM 2.0 7 .5 10 30 50 70 0.3 0.6 250 , LO G Y LM 101A/LM 301A LM107/ LM307 TYP IC A L P R FO R m fìflC CHflRRCTCRISTICS Single Pole , 1 2 3 4 5 6 7 THE |M S) XTUDS® 2-299 LM 101A/LM 301A LM107/ LM307


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PDF LM101A/LM301A LM107/LM307 01A/LM LM107/LM307 301Ah
1984 - TEMPERATURE DEPENDENT DC FAN SPEED CONTROL USING

Abstract: op amps lm307 Search OP AMP for Piezoelectric film 2N4393 piezo "charge amp" LT1010 LT318A 2N2222 application note emitter follower 2N5486 LT1008
Text: . The buffer slew rate can be reduced by inadequate supply bypass. With output current changes much , SLEW RATE WHILE RAISING QUIESCENT CURRENT TO ~50mA LT1010 Overload Protection The LT1010 has , TO-39, TO-220 OR TO-3 PACKAGE ­ A1 ­POWER 15MHz BANDWIDTH 100V/s SLEW RATE DRIVE ±10V , /0.01% SLEW = 100V/s AN04 F04 ­15V Figure 4. Fed Forward. Wideband DC-Stabilized Buffer an4f , get reasonable droop rate , the hold capacitor must be appropriately sized, but too large a value


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PDF LT1010 TEMPERATURE DEPENDENT DC FAN SPEED CONTROL USING op amps lm307 Search OP AMP for Piezoelectric film 2N4393 piezo "charge amp" LT318A 2N2222 application note emitter follower 2N5486 LT1008
datasheets of op-amp ic 741

Abstract: 741 IC data sheet LM107 pin diagram lm307 compensation LM307 LM207 LM107 LM101A lm107h/883 slew rate LM307
Text: SYMBOL PARAMETER CONDITIONS NOTES PINNAME MIN MAX UNIT SUBGROUPS Sr+ Slew Rate Vin = -5V to +5V, Av=1, Rl=2K 0.2 V/uS 7 Sr- Slew Rate Vin = +5V to -5V, Av , LM307 from 0C to + 70C. Industry Part Number NS Part Numbers LM107 LM107H/883 Prime Die


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PDF MNLM107-X LM107 LM101A LM101A, 50mVrms, 20Khz, 09413HR MKT-H08CRE datasheets of op-amp ic 741 741 IC data sheet LM107 pin diagram lm307 compensation LM307 LM207 lm107h/883 slew rate LM307
TDA1034

Abstract: tda1034b TDA1034N TDA1034 Signetics TDA1034BN TBA221 tda 1034 na741 LM307 LM301 ITT
Text: noise voltage • D.C. voltage gain • A,.C. voltage gain • Power bandwidth • Slew - rate â , Signetics Integrated Circuits - Operational Amplifiers TDA1034 Series — Operational Amplifier GENERAL DESCRIPTION The TDA1034 is a high-performance general purpose operational amplifier. Compared to most of the standard operational amplifiers (e.g. nA741, TBA221, LM301 A and LM307 ), it shows better noise performance, improved output drive capability and considerably higher small-signal and power


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PDF TDA1034 nA741, TBA221, LM301 LM307) tda1034b TDA1034N TDA1034 Signetics TDA1034BN TBA221 tda 1034 na741 LM307 LM301 ITT
MC14577bp

Abstract: mc1741n MC1490 k 105 jfet motorola MC1741C E 212 JFET LM833/MC MCT1458 MC14576B lm339 operational amplifier
Text: Single Supply, High Slew Rate Low Input Offset Voltage, Bipolar Operational A m Low Input Offset, High Slew Rate , Wide Bandwidth, JFET Input Operational A m plifiers , Amplifiers . 2-275 High Slew Rate , Wide , . 2-282 High Slew Rate , Wide Bandwidth, JFET Input Operational Amplifiers . . . 2-298 Low Power, High Slew Rate , Wide Bandwidth, JFET Input Operational A m plifiers


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UA78HGSC

Abstract: SL490DP TCA280A ne5534h MM58174 N82S100 UA78HGS TCA280A equivalent mw RADIO RECEIVER IC zn414 ML929DP
Text: compatible interfacing ZN1040E Driving Common Anode LED Displays • • • • Count rate , conjunction with microprocessors, an analogue device such as the LH0094CD can process data at a fast rate to , rate . Operating as a unity gain follower, D.C. gain accuracy is 0.002% typical and acquisition time is , components (see diagrams below). The frequency (or repetition rate ) can be selected externally over a range


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PDF LM78L05ACZ LM78L12ACZ LM78L15ACZ LM340LAZ-5 LM340LAZ-12 LM340LAZ-15 LM2931Z5 LM78L05ACH LM78L12ACH LM78L15ACH UA78HGSC SL490DP TCA280A ne5534h MM58174 N82S100 UA78HGS TCA280A equivalent mw RADIO RECEIVER IC zn414 ML929DP
2000 - TN-48-09

Abstract: MT48LC16M8A2TG-75
Text: TN-48-09: LVTTL Derating for Slew Rate Violations Introduction Technical Note LVTTL Derating for Slew Rate Violations Introduction SDRAM timings are tested and guaranteed under certain slew , describes the proper setup and hold time derating when the slew rate during transition time violates , times meet specification ( slew rate 1V/ns), setup time is measured from the midpoint (1.4V) of the , Slew Rate Violations Hold Time Hold Time The hold time for the SDRAM command bus (tCH) includes


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PDF TN-48-09: 09005aef83d30fcc/Source: 09005aef83d30fa9 TN-48-09 MT48LC16M8A2TG-75
P6139A

Abstract: dc voltmeter circuit diagrams voltmeter DC AAT4252A AAT4282A HP33120A TDS3054B voltmeter HP33120
Text: EV-134 AAT4252A EVAL Dual Slew Rate Controlled Load Switch Introduction The AAT4252A evaluation board provides a platform for test and evaluation of the AAT4252A dual slew rate controlled load switch , the TDFN22-8 package and low inductive output ringing with the fast slew rate setting. The design , inputs and outputs at 65s and 600s turn-on slew rate . The desired turn-on slew rate time is determined , output to fast turn-on slew rate while logic low (GND) sets the output to slow turn-on slew rate


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PDF EV-134 AAT4252A TDFN22-8 EV-134 P6139A dc voltmeter circuit diagrams voltmeter DC AAT4282A HP33120A TDS3054B voltmeter HP33120
2007 - slew rate control

Abstract: "P-Channel MOSFETs" Slew Rate Control Driver IC for P-Channel MOSFETs P-Channel MOSFETs FDG901D sc70-5 mosfet driver 55V MOSFET P-Channel FDG258P SC70-5 IC MOSFET QG 6 PIN
Text: FDG901D Slew Rate Control IC for P-Channel MOSFETs Features General Description Three , FDG901D Slew Rate Control IC for P-Channel MOSFETs February 2008 FDG901D Slew Rate Control IC for , Input Voltage VIL VDD = 2.7V to 6.0V 2.55 V Off Characteristics - Slew Rate Control , Rate Control Driver Gate Current IG Slew Pin = Open 90 120 A Slew Pin = GND 1 , 2.2 = Open 1.8 ms 11 ms = VDD = Open Output Slew Rate 162 V/ms Slew Pin =


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PDF FDG901D FDG901D SC70-5 slew rate control "P-Channel MOSFETs" Slew Rate Control Driver IC for P-Channel MOSFETs P-Channel MOSFETs sc70-5 mosfet driver 55V MOSFET P-Channel FDG258P IC MOSFET QG 6 PIN
2000 - OB33LN

Abstract: IOB33LNU IOBL33LLU OB25LPLL IOBL25HHU OB33PL IOB33PH OTB33PL OB33LL
Text: negative active select signal that enables the driver. The user can select slew rate and driver strength of , I/O Ring Power Supply Signal Voltage 2.5V High Drive High Slew Rate Normal Slew Rate Low Slew Rate , for 3.3V I/O Ring Power Supply Signal Voltage 3.3V PCI Drive High Slew Rate Normal Slew Rate Low Slew , I/O Ring Power Supply Signal Voltage 3.3V PCI Drive High Active Enable High Slew Rate Normal Slew Rate Low Slew Rate Low Active Enable High Slew Rate Normal Slew Rate Low Slew Rate OTBL33PH OTBL33PN


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PDF IB33U IB25U IB25LPU IB25LP OB33LN IOB33LNU IOBL33LLU OB25LPLL IOBL25HHU OB33PL IOB33PH OTB33PL OB33LL
2001 - Not Available

Abstract: No abstract text available
Text: FDG901D April 2001 PRELIMINARY FDG901D Slew Rate Control Driver IC for P-Channel MOSFETs , /dt dv/dt Turn­On Delay Time Slew Rate = OPEN Turn­On Delay Time Slew Rate = GROUND Turn­On Delay Time Slew Rate = VDD Turn-ON Slew Rate Slew Rate = OPEN Turn-ON Slew Rate Slew Rate = GROUND Turn-ON Slew Rate Slew Rate = VDD VDD = 5 V, Logic IN = 4.5 V, CLOAD = 560 pF, Test Circuit 1 32 1.9 13 VDD = 5 V , VDD Logic Signal Slew Rate Control 4 2 5 Application Circuit Typical Application Battery


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PDF FDG901D FDG901D
2007 - Not Available

Abstract: No abstract text available
Text: FDG901D Slew Rate Control IC for P-Channel MOSFETs Features General Description 1 Three , www.fairchildsemi.com FDG901D Slew Rate Control IC for P-Channel MOSFETs February 2008 FDG901D Slew Rate , Off Characteristics - Slew Rate Control Driver Supply Input Breakdown Voltage BVDG IDG = 101A , 0V 100 nA On Characteristics - Slew Rate Control Driver Slew Pin = Open Gate Current IG , VOUT Rise Time 2.2 = Open 26 V/ms 0.3 V/ms = VDD Output Slew Rate dv/dt =


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PDF FDG901D FDG901D SC70-5
2001 - Slew Rate Control Driver IC for P-Channel MOSFETs

Abstract: No abstract text available
Text: FDG901D October 2001 PRELIMINARY FDG901D Slew Rate Control Driver IC for P-Channel MOSFETs , Rise Time Slew Pin = VDD Output Slew Rate Slew Pin = OPEN Output Slew Rate Slew Pin = GROUND Output Slew Rate Slew Pin = VDD VSupply = 5.5 V, VDD = 5.5 V, Logic IN = 5.5 V, CLOAD = 510 pF, Test Circuit , VDD Logic Signal Slew Rate Control 4 2 5 Ig 3 1 Application Circuit Typical Application Battery , simplest method of limiting the inrush current is to control the slew rate of the MOSFET switch. This can


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PDF FDG901D FDG901D Slew Rate Control Driver IC for P-Channel MOSFETs
2001 - FDG258P

Abstract: marking tm sc70-5
Text: FDG901D September 2001 PRELIMINARY FDG901D Slew Rate Control Driver IC for P-Channel MOSFETs , Pin = VDD Output Slew Rate Slew Pin = OPEN Output Slew Rate Slew Pin = GROUND Output Slew Rate Slew , Gate Load Ig 3 1 VDD Logic Signal Slew Rate Control 4 2 5 Application Circuit Typical , supplied by it. The simplest method of limiting the inrush current is to control the slew rate of the , area, and involves other compromises in performance. The slew rate control driver IC FDG901D is


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PDF FDG901D FDG901D FDG258P marking tm sc70-5
2000 - AC142

Abstract: IOB33PH IOB33PNU OTB33PL IOB33LL ob33lh OTB33PH
Text: slew rate applies to both rising and falling edges. The strong and weak drivers for each voltage , positive or negative active select signal that enables the driver. The user can select slew rate and , Drive High Slew Rate OB25LPHH OB25LPLH Normal Slew Rate OB25LPHN OB25LPLN Low Slew , Slew Rate OB33PH OB33LH OB25HH OB25LH Normal Slew Rate OB33PN OB33LN OB25HN OB25LN Low Slew Rate OB33PL OB33LL OB25HL OB25LL Table 8 · Output Pads with High Active


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PDF AC142 AC142 IOB33PH IOB33PNU OTB33PL IOB33LL ob33lh OTB33PH
2002 - Slew Rate Control Driver IC for P-Channel MOSFETs

Abstract: FDG901D FDG258P SC70-5
Text: FDG901D Slew Rate Control Driver IC for P-Channel MOSFETs General Description Features The , = GROUND Output Rise Time Slew Pin = VDD Output Slew Rate Slew Pin = OPEN Output Slew Rate Slew Pin = GROUND Output Slew Rate Slew Pin = VDD 8.3 ms 28 µs 1.8 ms 11 ms , Logic Signal Slew Rate Control Ig 3 4 1 2 5 Application Circuit Typical Application , simplest method of limiting the inrush current is to control the slew rate of the MOSFET switch. This can


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PDF FDG901D FDG901D SC70-5 Slew Rate Control Driver IC for P-Channel MOSFETs FDG258P
2013 - what is slew rate

Abstract: No abstract text available
Text: of additive jitter on i) input rise and fall time at a given amplitude, or slew rate ii) output , amplitude versus rise and fall time, which is expressed as Volts/ns—or slew rate . Most engineers would associate slew rate with analog components, such as an op-amp, and it’s uncommon to see a slew rate , ps rise and fall time measured at 20% and 80%, the differential slew rate would be (2 x 350 mV x 0.6) / (400 ps) or 1.05 V/ns. For the purpose of this application note only differential slew rate is used


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PDF AN766 what is slew rate
2005 - HIN238

Abstract: fractional load rs485 transceiver RS-485
Text: Duplex ICC Data Slew SHDN VCC Devices Range # of Tx/ Allowed Half/Full High Hot Rate Rate Tx/Rx EN/DIS , Protected to ±15kV, Half Duplex, 250kbps, Slew Rate Limited, 5V, with Rx/Tx Enables and Low Power SHDN , ISL8488E ±15kV ESD Protected, 5V, Low Power, 250kbps, Slew Rate Limited, Full Duplex, RS-485/RS-422 Transceivers ISL8489E ±15kV ESD Protected, 5V, Low Power, Slew Rate Limited, Full Duplex, RS-485/RS , ICC Data Slew SHDN VCC Devices Range # of Tx/ Allowed Half/Full High Hot Rate Rate Tx/Rx EN/DIS ICC


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PDF RS-232 RS-485/RS-422 15Mbps 10Mbps 1-888-INTERSIL ISL8487E ISL88694 HIN238 fractional load rs485 transceiver RS-485
Not Available

Abstract: No abstract text available
Text: and 16 m A w ith slew rate control, current spike suppression and overvoltage protection - Full , capabilities. Several important features are incorporated in the output drivers. These include slew rate , 8.73 12.35 * PH L BT2R (A to Z) Buffer, 2mA, Slew Rate 6.15 4.93 6 .6 4 9.04 , ) Buffer, 8mA, Slew Rate 5.3 0 * PH L 85 pF TTL Trislate Output Pad 6.8 0 8.09 11.44 Control TTL Tristate Output Pad BT16R (A to Z) Buffer, 16mA, Slew Rate Control (1) For


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PDF BHDA08A BHAD12A BHSD14A
AO4L

Abstract: ld3p AO15A AO16A AO23L FD3S AO15AN B16RM AO2A TS ao8l
Text: cells - High drive I/O capability of sinking up to 24 mA with slew rate control and current spike , incorporated in the output drivers. These include slew rate control and current spike suppression. Slew rate , the control of the slope is usually not very 3 MTC-35000 significant, slew rate controlled , Drive Capability for Slew Rate Control Buffers Current Drive (mA) Standard Unit Maximum , Capacitance Cell Name Symbol CMOS Tristate Output Buffer (8mA, Slew Rate Control) BT8CRM tPHL


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PDF MTC-35000 102ps 216ps AO4L ld3p AO15A AO16A AO23L FD3S AO15AN B16RM AO2A TS ao8l
1999 - iob25hh

Abstract: IOB33LNU
Text: negative active select signal that enables the driver. The user can select slew rate and driver strength of , I/O Ring Power Supply Signal Voltage 2.5V High Drive High Slew Rate Normal Slew Rate Low Slew Rate , for 3.3V I/O Ring Power Supply Signal Voltage 3.3V PCI Drive High Slew Rate Normal Slew Rate Low Slew , 3.3V I/O Ring Power Supply Signal Voltage 3.3V PCI Drive High Active Enable High Slew Rate Normal Slew Rate Low Slew Rate Low Active Enable High Slew Rate Normal Slew Rate Low Slew Rate OTBL33PH OTBL33PN


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PDF IB33U IB25U IB25LPU IB25LP IOB25LPLN IOB25LPLL IOBL25LPHH IOBL25LPHN IOBL25LPHL IOBL25LPLH iob25hh IOB33LNU
2003 - slew rate control IO

Abstract: DDR266A DDR266B DDR333 K4H281638E
Text: -0.7 +0.7 -0.75 +0.75 -0.75 +0.75 -0.75 +0.75 ns 1 Input Slew Rate (for , V/ns Output Slew Rate (x4,x8) tSL(O) 1.0 4.5 1.0 4.5 1.0 4.5 1.0 4.5 Output Slew Rate Matching Ratio(rise to tSLMR 0.67 1.5 0.67 1.5 0.67 1.5 0.67 1.5 Input Slew Rate (for I/O pins) V/ns Rev. 1.0 Dec. 2002 DDR SDRAM 128MB Unbuffered , are guaranteed by design. Table 1 : Input Slew Rate for DQ, DQS, and DM AC CHARACTERISTICS DDR333


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PDF 128MB 200pin 64-bit 184Pin M470L1714ET0-C 128MB slew rate control IO DDR266A DDR266B DDR333 K4H281638E
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