The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
DP83867ERGZR Texas Instruments Extended temperature gigabit Ethernet PHY with SGMII 48-VQFN -40 to 105
DP83867ERGZT Texas Instruments Extended temperature gigabit Ethernet PHY with SGMII 48-VQFN -40 to 105
DP83867ISRGZR Texas Instruments Gigabit Ethernet PHY Customized for Harsh Industrial Environments with SGMII 48-VQFN -40 to 85
DP83867CSRGZT Texas Instruments Low Power & Small Package Gigabit Ethernet PHY with SGMII 48-VQFN 0 to 70
DP83867ISRGZT Texas Instruments Gigabit Ethernet PHY Customized for Harsh Industrial Environments with SGMII 48-VQFN -40 to 85
DP83867CSRGZR Texas Instruments Low Power & Small Package Gigabit Ethernet PHY with SGMII 48-VQFN 0 to 70
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Microchip Technology Inc
CORESGMII-OM Ten bit Interface(TBI) on Gigabit Media Interface(G/MII) - Virtual or Non-Physical Inventory (Software & Literature) (Alt: CORESGMII-OM)
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Avnet CORESGMII-OM No Container 0 1 $655.39 $655.39 $655.39 $655.39 $655.39 More Info
Avnet, Inc.
SGMII-PEX-RISER SGMII-PEX RISER CARD FOR QORIQ DEVELOPMENT SYSTEMS - Bulk (Alt: 57R7094)
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Avnet (3) SGMII-PEX-RISER Bulk 0 13 Weeks, 1 Days 1 $690.63 $690.63 $690.63 $690.63 $690.63 More Info
SGMII-PEX-RISER Box 0 15 Weeks 1 $649.99 $649.99 $649.99 $649.99 $649.99 More Info
SGMII-PEX-RISER 0 16 Weeks, 3 Days 1 €657.79 €657.79 €657.79 €657.79 €657.79 More Info
NXP Semiconductors
SGMII-PEX-RISER DEV BOARD, 64BIT QORLQ DUALCORE MCU; Silicon Manufacturer:NXP; No. of Bits:64bit; Silicon Family Name:QorIQ; Core Architecture:Power Architecture; Core Sub-Architecture:Power Architecture; Silicon Core Number:P5020; Product Range:- RoHS Compliant: Yes
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Newark element14 SGMII-PEX-RISER Bulk 0 1 $690.63 $690.63 $690.63 $690.63 $690.63 More Info
Lattice Semiconductor Corporation
GBE-SGMII-PM-UT1 SITE LICENSE GBE PCS SGMII ECP2M
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-PM-UT1 0 1 $3170.05 $3170.05 $3170.05 $3170.05 $3170.05 More Info
Lattice Semiconductor Corporation
GBE-SGMII-PM-U1 IP CORE GBE PCS SGMII ECP2M CONF
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-PM-U1 0 1 $1057.09 $1057.09 $1057.09 $1057.09 $1057.09 More Info
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Lattice Semiconductor Corporation
GBE-SGMII-E3-UT1 SITE LICENSE GBE PCS SGMII ECP3
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-E3-UT1 0 1 $3170.05 $3170.05 $3170.05 $3170.05 $3170.05 More Info
Lattice Semiconductor Corporation
GBE-SGMII-SC-UT1 SITE LIC GBE PCS SGMII SC/SCM
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-SC-UT1 0 1 $3170.05 $3170.05 $3170.05 $3170.05 $3170.05 More Info
Lattice Semiconductor Corporation
GBE-SGMII-E5-U IP CORE GBE PCS SGMII ECP5
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-E5-U 0 1 $1057.09 $1057.09 $1057.09 $1057.09 $1057.09 More Info
Lattice Semiconductor Corporation
GBE-SGMII-E3-U1 IP CORE GBE PCS SGMII ECP3 CONF
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-E3-U1 0 1 $1057.09 $1057.09 $1057.09 $1057.09 $1057.09 More Info
Lattice Semiconductor Corporation
GBE-SGMII-SC-U1 IP CORE GBE PCS SGMII SC/SCM
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-SC-U1 0 1 $1057.09 $1057.09 $1057.09 $1057.09 $1057.09 More Info
Lattice Semiconductor Corporation
GBE-SGMII-E5-UT SITE LICENSE FOR ECP5 SGMII
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Symmetry Electronics GBE-SGMII-E5-UT 0 1 $3170.05 $3170.05 $3170.05 $3170.05 $3170.05 More Info

sgmii Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2012 - RGMII to SGMII PHY

Abstract: MAX24287 switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii 1000BASE-X fpga ethernet sgmii fpga rgmii
Text: for 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet , interaction is optional for device operation. Hardware-configured modes support SGMII master and 1000BASE , Wire-Speed Ethernet Interface Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs Serial Interface Configurable as 1000BASE-X or SGMII Revision 1.8 (4-, 6-, or 8-Pin) Parallel Interface , MDIO and SGMII PCS Supports 10/100 MII or RGMII Operation with SGMII Running at the Same


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII to SGMII PHY switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii fpga ethernet sgmii fpga rgmii
2006 - 88E1111

Abstract: Marvell PHY 88E1111 Datasheet marvell 88E1111 register RGMII sgmii marvell 88E1118 Marvell PHY 88E1118 Marvell PHY 88E1111 layout Marvell 88E1112 88E1112 Marvell 88E1111
Text: LatticeSC/Marvell Serial-GMII ( SGMII ) Physical Layer Interoperability November 2006 Technical Note TN1127 Introduction The Serial Gigabit Media Independent Interface ( SGMII ) is a connection bus , with a low pin count, 4-pair, differential SGMII connection. The classic GMII interface defined in the IEEE 802.3 specification is strictly for gigabit rate operation. However, the Cisco SGMII , Cisco SGMII specification is comprised of more than just a bus interface definition; it defines a


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PDF TN1127 22-wire 10Mbps, 100Mbps 1000Mbps 88E1111/88E1112 1-800-LATTICE 88E1111 Marvell PHY 88E1111 Datasheet marvell 88E1111 register RGMII sgmii marvell 88E1118 Marvell PHY 88E1118 Marvell PHY 88E1111 layout Marvell 88E1112 88E1112 Marvell 88E1111
2009 - ENG-46158

Abstract: clause 37 AN3869 IEEE 802.3 Clause 27 eTSEC GMII Initial "IEEE 802.3" "Clause 27" RGMII to SGMII PHY sgmii specification ieee sgmii 1000BASE-X
Text: registers (CR, TICON) remains consistent with what was described above for SGMII. For 1000BaseX , Implementing SGMII Interfaces on the PowerQUICCTM III by 1 Networking and Multimedia Group Freescale Semiconductor, Inc. Austin, TX Introduction SGMII is a serial interface for gigabit Ethernet that , description of SGMII in general and describes how it is similar and different to other gigabit Ethernet standards and interfaces. The specifics of the Freescale SGMII implementation are detailed, including


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PDF AN3869 ENG-46158 clause 37 AN3869 IEEE 802.3 Clause 27 eTSEC GMII Initial "IEEE 802.3" "Clause 27" RGMII to SGMII PHY sgmii specification ieee sgmii 1000BASE-X
2006 - 88E1111

Abstract: 88E1118 88E1112 sgmii specification ieee Marvell PHY 88E1111 Datasheet 88e111 Marvell PHY 88E1111 layout Marvell 88E1111 88E1111 PHY registers 88E1111 "mdio registers"
Text: LatticeECP2M/Marvell Serial-GMII ( SGMII ) Physical Layer Interoperability November 2006 Technical Note TN1133 Introduction The Serial Gigabit Media Independent Interface ( SGMII ) is a , connection with a low pin count, 4-pair, differential SGMII connection. The classic GMII interface defined in the IEEE 802.3 specification is strictly for gigabit rate operation. However, the Cisco SGMII , Cisco SGMII specification is comprised of more than just a bus interface definition; it defines a


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PDF TN1133 22-wire 10Mbps, 100Mbps 1000Mbps 88E1111/88E1112 1-800-LATTICE 88E1111 88E1118 88E1112 sgmii specification ieee Marvell PHY 88E1111 Datasheet 88e111 Marvell PHY 88E1111 layout Marvell 88E1111 88E1111 PHY registers 88E1111 "mdio registers"
2004 - sgmii specification ieee

Abstract: ENG-46158 virtex-7 1000BASE-X sfp sgmii traffic light controller vhdl coding ISERDES vhdl code for ethernet mac spartan 3 SPARTAN 6 ethernet vhdl ethernet spartan 3a vhdl ethernet spartan 3e
Text: transceiver is connected to an external off-the-shelf Ethernet PHY device that also supports SGMII. (This can , transceiver is connected to an external off-the-shelf Ethernet MAC device that also supports SGMII. (This can , BASEX-Reserved. For SGMII- Always 1 · Bits [4:1]: Reserved · Bit [5]: For 1000 BASEX- Full Duplex 1 = Full Duplex Mode is advertised 0 = Full Duplex Mode is not advertised For SGMII- Reserved · Bit [6]: Reserved · , ]: Reserved · Bits [11:10]: For 1000 BASEX- Reserved For SGMII- Speed 1 1 Reserved 1 0 1000 Mb/s 0 1 100 Mb/s


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PDF 1000BASE-X DS264 ENG-46158) sgmii specification ieee ENG-46158 virtex-7 1000BASE-X sfp sgmii traffic light controller vhdl coding ISERDES vhdl code for ethernet mac spartan 3 SPARTAN 6 ethernet vhdl ethernet spartan 3a vhdl ethernet spartan 3e
SFP LVDS

Abstract: SFP LVDS altera sgmii mode sfp SFP altera sgmii SFP sgmii altera fpga ethernet sgmii 8B10B circuit diagram of PPM transmitter and receiver AN-518-1
Text: SGMII Interface Implementation Using Soft-CDR Mode of Stratix III Devices Application Note 518 , ( SGMII ). Support of SGMII on the LVDS I/Os allows for multi-port Gigabit Ethernet system implementations that require high port counts, low power, and lower cost. SGMII systems can be implemented with the , and different aspects of SGMII implementation using this mode, as well as: Typical SGMII applications High-speed interface circuit requirements Soft-CDR architecture Soft-CDR mode


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SGMII

Abstract: sgmii switch broadcom switch LAN Switches Gigabit Ethernet BCM5691 "ethernet switch" sgmii L2
Text: 4-pins per port SGMII interface to Gigabit Ethernet PHYs 32 million packets/second (line rate , switch blade applications 12-Port Gigabit Ethernet Multilayer Switch SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII PCI I2C GPIC FFP GPIC FFP , SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII


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PDF BCM5691 12-PORT SGMII sgmii switch broadcom switch LAN Switches Gigabit Ethernet BCM5691 "ethernet switch" sgmii L2
2007 - Marvell 88e111

Abstract: RGMII to SGMII PHY eTSEC GMII Initial marvell ethernet switch sgmii sgmii sgmii marvell 88e111 Marvell 88e111 driver mpc8313e etsec Ethernet ethernet phy sgmii
Text: 8 Figure 1 shows the connection between MPC8313E MAC and PHY with the support of SGMII. Rx , example has Statistics Enable = 1, TBIM = 1, SGMIIM = 1) (Set R100M = 1 in SGMII 100 Mbps speed , is SGMII. If it is SGMII , then gfar_configure_serdes is called to initialize the TBI interface and program it to select SERDES, as follows: u32 ecntrl_val; /* SGMII_SUPPORT */ ecntrl_val = gfar_read , Linux host IP address indicates proper working of the SGMII. Throughput can be tested by connecting a


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PDF AN3354 MPC8313E Marvell 88e111 RGMII to SGMII PHY eTSEC GMII Initial marvell ethernet switch sgmii sgmii sgmii marvell 88e111 Marvell 88e111 driver mpc8313e etsec Ethernet ethernet phy sgmii
2003 - broadcom switch ethernet

Abstract: ethernet "32 pin" ethernet phy sgmii 4 port ethernet controller sgmII BCM5693 broadcom switch broadcom switch ethernet "on-chip packet buffer" BCM95691K12 ethernet chip switch
Text: per port · 4-pin per port SGMII interface to Gigabit Ethernet PHYs · 32 million packets/second , , enhanced thermal 480-pin EBGA package SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII PCI BSC GPIC GPIC GPIC GPIC GPIC GPIC CMIC L2 Table MMU VLAN Table GPIC GPIC GPIC GPIC GPIC GPIC SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII CBP 12


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PDF BCM5693 12-PORT BCM95691K12, 5692-PB02-R broadcom switch ethernet ethernet "32 pin" ethernet phy sgmii 4 port ethernet controller sgmII BCM5693 broadcom switch broadcom switch ethernet "on-chip packet buffer" BCM95691K12 ethernet chip switch
2003 - BCM5692

Abstract: BCM95690K24S serdes SGMII
Text: expansion port · Gigabit Ethernet SerDes per port · 4-pin per port SGMII interface to Gigabit Ethernet , IPIC SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII PCI BSC GPIC GPIC GPIC GPIC GPIC GPIC CMIC L2 Table MMU VLAN Table GPIC GPIC GPIC GPIC GPIC GPIC SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII CBP 12-Port Gigabit Ethernet


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PDF BCM5692 12-PORT 10/100/1000-Mbps 10-Gbps BCM95690K24S, 5692-PB02-R BCM5692 BCM95690K24S serdes SGMII
2002 - BCM5690

Abstract: sgmii 10 Gbps ethernet phy BCM95690K24 ethernet phy sgmii
Text: low latency · Gigabit Ethernet SerDes per port · 4-pin per port SGMII interface to Gigabit , SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII , FFP GPIC FFP GPIC FFP SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII CBP B C M 5 6 9 0 O V E R V I E W BCM5690 Block Diagram , ) Built-in SerDes with SGMII support The BCM5690 network switch is a scalable, modular chip solution


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PDF BCM5690 12-PORT BCM95690K24 BCM95690K24s 5690-PB01-R-6 BCM5690 sgmii 10 Gbps ethernet phy ethernet phy sgmii
2010 - VSC7428

Abstract: VSC7462 VSC7460 VSC7429
Text: PerfectReach™ The device supports combinations of up to 26 SGMII ports consisting of 12 GbE Cu PHYs, 12 SGMII interfaces, two of which support 1G/2.5G, and up to three QSGMII ports. One of the SGMII ports , DDR2 SI MW 2× SGMII VSC7429 26-Port GbE Switch with 12 Cu PHYs 12 S F P S F , — 1G Cu PHY, 3× QSGMII, 1× SGMII , 1× 1G/2.5G SGMII • Provider Bridging (PB) • 12× 1G Cu PHY, 10× SGMII , 2× 1G/2.5G SGMII • Dual leaky bucket policers with remarking and statistics


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PDF VSC7429 26-Port 32-bit VSC7429 VSC8512 12-port 24/26-port VSC7428 VSC7462 VSC7460
2003 - ethernet phy sgmii

Abstract: sgmii BCM5691 BCM95691K12 IEEE802 sgmii switch
Text: per port · 4-pins per port SGMII interface to Gigabit Ethernet PHYs · 32 million packets/second , thermal 480-pin EBGA package SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII PCI I2C GPIC FFP GPIC FFP GPIC FFP GPIC FFP GPIC , GPIC FFP GPIC FFP GPIC FFP GPIC FFP GPIC FFP SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII CBP 12-Port Gigabit Ethernet


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PDF BCM5691 12-PORT BCM95691K12 5691-PB04-R ethernet phy sgmii sgmii BCM5691 IEEE802 sgmii switch
2013 - Not Available

Abstract: No abstract text available
Text: Specification Revision 1.8 Cisco System's proprietary specification document for SGMII. • High-Speed , 2013.10.17 AN-518 SGMII Interface Implementation Using Soft CDR Mode of Altera FPGAs Subscribe Send Feedback The Serial Gigabit Media Independent Interface ( SGMII ) protocol provides connectivity between the physical layer (PHY) and the Ethernet media controller (MAC). The SGMII solution for , ) function for Altera FPGAs. You can use the soft CDR mode to implement SGMII systems in the following


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PDF AN-518
2009 - Marvell 88e1111 register map

Abstract: 88E1111 PHY registers map 88E1111 88E1111 register map 88E1111 config 88E1111 registers Marvell PHY 88E1111 alaska register map Marvell PHY 88E1111 MDIO read write sfp Marvell 88E1111 application note Marvell PHY 88E111 alaska
Text: SGMII /Gb Ethernet IP SGMII_MODE input. This input is valid when GBE_MODE=0 ( SGMII mode). This signal is controlled by SW14, switch 1. SGMII_MODE I Output of SW14, switch 1 Press switch 1 down (0V) to set SGMII_MODE low. The SGMII /Gb Ethernet IP is in MAC mode. Pull switch 1 up (3.3V) to set SGMII_MODE high , SGMII_MODE 1 U1 ECP3-95-1156 ispVM/ORCAstra JTAG J12 SW1 RESET 12V J37 88E1111 , LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability December 2009 Technical Note


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PDF TN1197 88E1111 H0020 Marvell 88e1111 register map 88E1111 PHY registers map 88E1111 register map 88E1111 config 88E1111 registers Marvell PHY 88E1111 alaska register map Marvell PHY 88E1111 MDIO read write sfp Marvell 88E1111 application note Marvell PHY 88E111 alaska
2004 - traffic light controller vhdl coding

Abstract: ENG-46158 1000BASE-X sfp sgmii 1000base-x xilinx sgmii specification ieee vhdl code for mac transmitter verilog code for 10 gb ethernet vhdl code for ethernet mac spartan 3 gtx 970 DS264
Text: also supports SGMII. (This can be a tri-mode PHY providing 10BASE-T, 100BASE-T, and 1000BASE , that also supports SGMII. (This can be a tri-mode MAC providing 10/100/1000 Mb/s operation, for example , BASEX-Reserved. For SGMII- Always 1 · Bits [4:1]: Reserved · Bit [5]: For 1000 BASEX- Full Duplex 1 = Full Duplex Mode is advertised 0 = Full Duplex Mode is not advertised For SGMII- Reserved · Bit [6]: Reserved · , ]: Reserved · Bits [11:10]: For 1000 BASEX- Reserved For SGMII- Speed 1 1 Reserved 1 0 1000 Mb/s 0 1 100 Mb/s


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PDF 1000BASE-X DS264 ENG-46158) traffic light controller vhdl coding ENG-46158 1000BASE-X sfp sgmii 1000base-x xilinx sgmii specification ieee vhdl code for mac transmitter verilog code for 10 gb ethernet vhdl code for ethernet mac spartan 3 gtx 970
2014 - Not Available

Abstract: No abstract text available
Text: design for a complete SGMII-to- (G)MII bridge. This reference design is included with the SGMII and Gb , complete SGMII-to- (G)MII bridge is shown in Figure 2-2. Figure 2-2. SGMII to (G)MII Bridge Reference , Signals rst_n In Reset - Active low global reset. sgmii_mode In operating in SGMII mode. ï , . 33 SGMII-to- (G)MII Reference Design , Active high signal, asserts while state machine is in “Link OK” state sgmii_mode Controls


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PDF IPUG60 LFE5UM-85F-7MG756C 09L-SP1
2003 - SGMII

Abstract: ethernet phy sgmii sgmii switch BCM5691 BCM95691K12 broadcom switch ethernet "on-chip packet buffer" broadcom switch BCM569
Text: 4-pins per port SGMII interface to Gigabit Ethernet PHYs 32 million packets/second (line rate , switch blade applications 12-Port Gigabit Ethernet Multilayer Switch SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII PCI I2C GPIC FFP GPIC FFP , SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII , Buffer MAC(s) Built-in SerDes with SGMII support The BCM5691 network switch is a scalable


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PDF BCM5691 12-PORT BCM95691K12 5691-PB03-R-4 SGMII ethernet phy sgmii sgmii switch BCM5691 broadcom switch ethernet "on-chip packet buffer" broadcom switch BCM569
2003 - BCM5690

Abstract: BCM95690K24 ethernet chip switch BCM95690K24S
Text: low latency · Gigabit Ethernet SerDes per port · 4-pin per port SGMII interface to Gigabit , HiGigTM Interface IPIC SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII PCI I2C GPIC FFP GPIC FFP GPIC FFP GPIC FFP GPIC , GPIC FFP GPIC FFP GPIC FFP GPIC FFP GPIC FFP SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII SerDes/ SGMII CBP B C M 5 6 9 0 O V E R


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PDF BCM5690 12-PORT BCM95690K24 BCM95690K24s 5690-PB04-R-06 BCM5690 ethernet chip switch
2004 - ENG-46158

Abstract: traffic light controller vhdl coding verilog hdl code for traffic light control IEEE 802.3 Clause 38 verilog coding using instantiations vhdl code for ethernet mac spartan 3 1000BASE-X sgmii xilinx VHDL code for traffic light controller 1000BASE-SX
Text: Ethernet PHY device that also supports SGMII. (This can be a tri-mode PHY providing 10BASE-T, 100BASE , reset operating as SGMII. Note: The standard can be set following reset using the MDIO Management , 0 Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 DS264 September 16, 2009 0 Product , -X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access , 1.25 Gbps Performance Core Resources · GMII to Serial-GMII ( SGMII ) bridge, as defined in the


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PDF 1000BASE-X DS264 1000BASE-X ENG-46158 traffic light controller vhdl coding verilog hdl code for traffic light control IEEE 802.3 Clause 38 verilog coding using instantiations vhdl code for ethernet mac spartan 3 sgmii xilinx VHDL code for traffic light controller 1000BASE-SX
2004 - ET1081

Abstract: switch SGMII MII GMII L-ET1081N1-B-DB Agere SNR
Text: Description (continued) SGMII_0P /N SGMII_1P /N SGMII_2P /N SGMII_3P /N SGMII_4P /N SGMII_5P /N SGMII_6P /N SGMII_7P , µm process Oversampling architecture to improve signal integrity and SNR SGMII or SerDes interfaces , TDR_SEL LED_A/B_[0:7] LED_SER JTAG/ Test SGMII /SerDes Management Interface Bias Clock LEDS , PHY AFE RJ-45 SGMII Data Output Enable SGMII Loopback MII Loopback Line Driver Loopback , SGMII Rx data output can be disabled by clearing the SGMII data output enable bit, PHY control register


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PDF ET1081 388-pin 1000Base-T PB05-063GPHY PB04-025GPHY) switch SGMII MII GMII L-ET1081N1-B-DB Agere SNR
2006 - FTM-3413C-SL05G

Abstract: FTM-3401C-SL2G FTM-3413C-SLG FTM-5401S-SL10BG FTM-3401C-SL2CG FTM-C012R-LCG FTM-8401C-SL2G FTM-3401s-SL10BG ftm-3413c-slcg FTM-3401C-SL10G
Text: the user SGMII. 6. These are the differential transmitter inputs. They are AC-coupled, differential , Nov 13, 2006 100BASE-FX Spring-Latch SGMII SFP Transceiver (For 2km transmission with MCU , supporting SGMII interface. The optical output can be disabled by a TTL logic high-level input of Tx Disable , further information, please refer to SFP Multi-Source Agreement (MSA). Fiberxon SGMII SFP transceiver , configure all functions of FTM-3401C-SL2CG. Features Build-in PHY supporting SGMII Interface Build-in


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PDF 100BASE-FX GR-468-CORE FTM-3401C-SL2CG FTM-3413C-SL05G FTM-3401C-SL2G FTM-3413C-SLG FTM-5401S-SL10BG FTM-C012R-LCG FTM-8401C-SL2G FTM-3401s-SL10BG ftm-3413c-slcg FTM-3401C-SL10G
2006 - 1000BASE-X

Abstract: ieee802.3 document avago SERDES Mb sfp autonegotiation SFP Loopback Adapter Module 1000BASE 0x9084 sgmii mode sfp sfp i2c eeprom 0xAC application note 0x9140
Text: . SGMII The HBCU-5710R supports the Serial Gigabit Media Independent Interface ( SGMII. ). This interface , . SGMII 9 VII. Programmable Features VIII. SFP MSA Status and Control signal I/O , -X Connector SGMII Interface SerDes / SGMII Interface RJ45 Connector CAT 5 Cable 10/100/1000 , SGMII HBCU-5710R Cat 5or 5e 10BASE-T GMII/1000BASE-X or SGMII MII/10BASE-T SGMII HBCU-5710R Cat 5 or 5e 100BASE-T MII/100BASE-T Yes SGMII HBCU-5710R Cat 5 or 5e


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PDF 1000BASE-T HBCU-5710R 1000BASE-X ANSI/TIA/EIA-568-B 2-2001Commercial 5989-0430EN AV01-0068EN ieee802.3 document avago SERDES Mb sfp autonegotiation SFP Loopback Adapter Module 1000BASE 0x9084 sgmii mode sfp sfp i2c eeprom 0xAC application note 0x9140
2010 - 10GBASE-T

Abstract: RJ45 LAN port of motherboard CAT7 cables sgmii switch APM96895 LDPC encoder MACsec APM9689x CAT6A cables sgmii
Text: upgrade of equipment. Flexible system-side interfaces support XFI, RXAUI, XAUI and SGMII. Triveni , (EEE, IEEE 802.3az) Clause 28 AN Loop Timing Mode 10G mode: XFI, RXAUI, XAUI 100M/1G mode: SGMII , Server NICs and HBAs Blade Servers LOM Triveni System Block Diagram XFI XAUI RXAUI SGMII APM9689x RJ45 XFI XAUI RXAUI SGMII 10GBASE-T RJ45 Port 2 XFI XAUI RXAUI SGMII 10GBASE-T RJ45 Port 3 XFI XAUI RXAUI SGMII Port 4 MDIO/MDC 215 Moffett Park Drive


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PDF 10GBASE-T APM9689x RJ45 LAN port of motherboard CAT7 cables sgmii switch APM96895 LDPC encoder MACsec CAT6A cables sgmii
2011 - Technical Product Brief

Abstract: 88E1112 Technical Product Brief 88E1112 88E1112 sfp marvell ethernet switch sgmii alaska x register Marvell PHY 88E1112 SFP Marvell 88e1112 sgmii switch
Text: the Serial Gigabit Media Independent Interface ( SGMII ) for direct connection to a MAC/Switch port , /100/1000BASE-T IEEE 802.3 compliant Supports Serial Gigabit Media Independent Interface ( SGMII , applications SGMII to SERDES mode supported SGMII to SGMII bridging supported Supports tri-speed GBIC/SFP , ® 88E1112 10/100/1000 Mbps Ethernet MAC MAC Interface - SGMII T r a n s f o r m e r , : - 1000BASE-X OR M A G MAC Interface - SGMII RJ45 Media Type: - 1000BASE-T -


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PDF 88E1112 MV-S105997-00, 88E1112 Technical Product Brief 88E1112 Technical Product Brief 88E1112 sfp marvell ethernet switch sgmii alaska x register Marvell PHY 88E1112 SFP Marvell 88e1112 sgmii switch
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