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0SFE006.V Littelfuse Inc FUSE SFE 6A 32V
0SFE004.V Littelfuse Inc Fuses SFE 4A
0SFE07.5V Littelfuse Inc Fuses SFE 7.5A
0SFE0001ZP Littelfuse Inc AST SFE FUSE ASSORTMENT
0SFE020.V Littelfuse Inc Fuses SFE 20A
0SFE014.V Littelfuse Inc Fuses SFE 14A

sfe 5,5 ma Datasheets Context Search

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sfe 5.5 murata

Abstract: TBA120 MURATA sfe 5.5 MHZ TBA120S sfe 5.5 MB ceramic filter SFE 5.5 ceramic filter TBA120 WITH TBA120S NF IC TBA120 sfe 5,5 ma
Text: ) SFE 5.5 MA SFE 4.5 MA SFE 10.7 SFE 10.7 323 This Material Copyrighted By Its Respective Manufacturer , €¢ Voltage for AFC Maximum ratings Supply voltage1) Vs 18 V Z current /12 15 mA ( S 1 min /, 2 20 mA Voltage v5 4 V Current h 5 mA h 2 mA Storage temperature range Tstg -40 to 125 °C Junction , 10.7 MHz, respectively) min typ max Current consumption ft5 — °° Is 10 14 18 mA Rs-0 Is 11 15.2 20 mA IF voltage gain Gv 68 dB IF output voltage at limiting ^qpp 170 250 mV (each output


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PDF TBA120 rms-10 50kHz; Vs-12V sfe 5.5 murata MURATA sfe 5.5 MHZ TBA120S sfe 5.5 MB ceramic filter SFE 5.5 ceramic filter TBA120 WITH TBA120S NF IC TBA120 sfe 5,5 ma
tba120s

Abstract: MURATA sfe 5.5 MHZ tba120
Text: 680 Q Filter (Murata) SFE 5.5 MA r2 OO OO 1 KQ SFE 4.5 MA 330 Q SFE 10.7 323 , V mA mA V mA mA °C °C RthSA 90 K /W Vs hi hi Vs h U Tstg Operating , 20 mA mA dB mV 3.3 1 kQ kQ Vqpp 170 14 15.2 68 250 RqS 1.9 2.6 , mA ) Z resistance Breakdown voltage Breakdown voltage ( I3 — 500 (iA) Current gain (VCe — 5 V, / c ” 1 mA ) typ max Vn 11.2 13.2 55 VcBO VC EO G| 26 13 25 12 30 40


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PDF TBA120S 300ji tba120s MURATA sfe 5.5 MHZ tba120
1999 - KA2915

Abstract: cda 6.5 mhz SFE 6.0 SFE 5.5 schematic diagram video television SFE-5.5 COIL SIF television video section block diagram cda 10,7 mhz video ic chip schematic diagram
Text: Unit Supply Voltage VCC(V20-21) 12 V Supply Current I20 85 mA I16 15 mA V2,3,4,24-21 0 V V8-21 5.5 0 V V13-21 4.2 0 V V17-21 Circuit Voltage V20-21 V16-21 0 V I5,6,11,23,26 -10 mA (peak) I19 +0.6 -0.6 mA (peak) I25 +10 0 mA (peak) I17 Circuit Current +0.3 +10 -4 mA (peak , 6.5 6.0 6.0 5.5 SFE 5.5 CDA 5.5 SFE 6.5 CDA 6.5 SFE 6.0 CDA 6.0 SFE 6.0


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PDF KA2915 28-DIP-600A KA2915 000pF) cda 6.5 mhz SFE 6.0 SFE 5.5 schematic diagram video television SFE-5.5 COIL SIF television video section block diagram cda 10,7 mhz video ic chip schematic diagram
1998 - KA2915

Abstract: CF301 CD10 RD10 schematic diagram video television SFE-5.5
Text: Storage Temperature Symbol Unit 12 85 15 1100 V mA mA V V V V mA (peak) mA (peak) mA (peak) mA (peak) mW -20~ +70 -55~ +150 VCC(V20-21) I20 I16 V2,3,4,24-21 V8-21 V13 , System B D I IRELAND X201 CF301 CF302 5.5 SFE 5.5 CDA 5.5 6.5 SFE 6.5 CDA 6.5 6.0 SFE 6.0 CDA 6.0 6.0 SFE 6.0 CDA 6.0 AUSTRALIA 5.5 SFE 5.5 CDA 5.5 NOTES: 1. All


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PDF KA2915 28-DIP-600A KA2915 000pF) CF301 CD10 RD10 schematic diagram video television SFE-5.5
MSM518122-JS/ZS

Abstract: No abstract text available
Text: 5 1 8 1 2 2 -7 0 7 0 ns 25 ns 140 ns 3 0 ns 120 mA M S M 5 1 8 1 2 2 -8 0 80 ns 2 5 ns 150 ns 3 0 ns 110 mA M S M 5 1 8 1 2 2 -1 0 100 ns 25 ns 180 ns 30 ns 100 mA Standby 8 mA BLOCK Address Buffer Block Write V. ■4 - V 1 , Dissipation C o n d itio n s U n it Ta = 2 5 ‘C 50 mA Pd Ta = 25°C 1 O p e ra , 100 ( RAS - VIL. C AS Cycling tPC - tPC m ia C AS before R AS Ref. Active 3 ,4 mA


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PDF MSM518122-JS/ZS 518122-JS/ZS MSM518122-JS/ZS
KA2915

Abstract: television video section block diagram CF301 apl 117 sfe 5.5 SFE SFE-5.5 schematic diagram video television sfe 5.5 cda 10,7 mhz V13-21
Text: =25°C) Characteristic Symbol Value Unit Supply Voltage VcciVawi) 12 V Supply Current I20 85 mA lie 15 mA , Current Is, 6, 11,23, 26 + 0.3 -10 mA (peak) »19 + 0.6 -0.6 mA (peak) l25 + 10 0 mA (peak) 117 + 10 -4 mA (peak) Power Dissipation (Ta=70°C) Pd 1100 mW Operating Temperature Topr -20- +70 °C , . Control Sensitivity B Ati ±100/lA Input Variable OSC. Freq. Variable 73 81 89 Hz/ MA Phase Det , Location System B D I IRELAND AUSTRALIA X201 5.5 6.5 6.0 6.0 5.5 CF301 SFE 5.5 SFE 6.5 SFE 6.0 SFE


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PDF Vid217 KA2915 television video section block diagram CF301 apl 117 sfe 5.5 SFE SFE-5.5 schematic diagram video television sfe 5.5 cda 10,7 mhz V13-21
Not Available

Abstract: No abstract text available
Text: V Receiver O utput Voltage R out - 0 .5 to Vcc +0.5 V IIN ±20.0 mA - 4 0 to , ) Param eter Sym bol C onditions MIN. TYP. C ircuit C urrent mA 35 mA 28 mA , out), D in = GND, R in, R out pin OPEN, ST B Y = H C ircuit C urrent mA 10 STBY = H , +25 °C V ±6.0 V ±5.0 V Vcc = +3.3 V, for GND ±40 mA SR Cl = 10 , tandby O utput T ra n sfe r Tim e tDAZ R l = 3 kß , C l = 2 500 pF,Note 10 4 10 IIS S


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PDF tPD4723 RS-232 PD4723 EIA/TIA-232-E RS-232C) P30GS-65-300B-1
CF301

Abstract: No abstract text available
Text: V I20 Supply Voltage 85 mA Supply Current 15 16 1 V 2, 3, 4,24-21 mA 0 V , , 26 + 0.3 -1 0 mA (peak) 1 19 + 0.6 -0 .6 mA (peak) I25 + 10 0 mA (peak) 1 17 Circuit Voltage V20.21 + 10 -4 mA (peak) Circuit Current Power , CF301 SFE 5.5 SFE 6.5 SFE 6.0 SFE 6.0 SFE 5.5 CF302 CDA 5.5 CDA 6.5


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PDF KA2915 KA2915 CF301
Not Available

Abstract: No abstract text available
Text: . U topia 2 signaling supports single cell tra n sfe rs to single output ports, but the 77301 also , (U topiaTx). W ith U topiaTx, d ata tra n sfe r is initiated by the d evice able to receive a cell , (ENR and ENS fo r the 77301 ). During the first byte tra n sfe r the T xS O C is asserted to identify the beginning of the cell transfer. S uccessive clocks tra n sfe r the cell until the last d ata , , the condition fo r additional tra n sfe rs is d eterm ined by the T xC LA V and T xE N B as before


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PDF IDT77301 IDT77301 18-bit MO-136, 492-M
jUPD482234

Abstract: D482234 482234LE UPD482235
Text: inputs and outputs Row address strobe Column address strobe Data tra n sfe r/O u tp u t enable W , tra n sfe r/O u tp u t enable W rite-per-bit/W rite enable Serial data input/O utput enable Serial , Input In the data tra n sfe r cycle, this TAP register input pin functions as the address input pin w , operation after data tra n sfe r (9 bits are latched at the falling edge of the CAS). S TO P R egister , ) Pin Name DT/OE (Data tra n sfe r/ output enable) Input/ O utput Input These are the data tra n sfe r


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PDF uPD482234 uPD482235 256K-WORD PP482234, 482234LE-xx jUPD482234 D482234 482234LE
upd4723gs

Abstract: No abstract text available
Text: Im Toot Tttg mA °C Pt °c w Note 6. Pulse width = 1 ms, duty = 10 % MAX. RECOMMENDED , . 14 U nit mA C ircu it C u rre n t 10 mA 35 mA 28 mA 1 3 /iA 5 , mA mA 5 /iA C ircu it C u rre n t at S ta n d b y (S ta n d b y M o d e 2} Vcc * +5.0 , * V V mA H ig h -Level Input V oltag e L o w -L e v e l Input V oltag e H ig h-Level input Cu rre , ±5.0 ±40 3.0 3.0 2.5 30 30 ±6.0 -2 5 1.0 fiA V V V mA V//IS V//is MS O utput V oltag e V do


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PDF RS-232 EIA/TIA232-E EIA/TIA-232-E RS-232C) P30GS 65-300B upd4723gs
thunder ca 103

Abstract: clap siren DISTORTION PEDAL DIAGRAM car reverse horn omni cfl B0543C LG DSP Siren horn Sound Generator 25 tune musical door bell GoldStar master i
Text: ©tal Päd 2 95 0 Halo Päd 2 96 0 Sweep Päd 1 402Ö75? OGDbliD 3flb ■35 ( Sfe LG Semicon. Co , . - Technology : High performance 0.8 micron CMOS process. - Package type : 100 QFP i ( Sfe LG Semicon , data when the read signal become enable ( Sfe LG Semicon. Co., LTD. Pin No. Pin name I/O Pin function , 99 IOW/ I-U I/O Write enable 75 SRA17 I/O-U ♦NOTE (1) 100 Vcc ( Sfe LG Semicon. Co., LTD. * Note 0 , . Pin 82 = Not used. ( Sfe LG Semicon. Co., LTD. 5. GM82C6S0 Function Block Diagram The GM82C650 has the


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PDF GM82C650 20bits -64/32L thunder ca 103 clap siren DISTORTION PEDAL DIAGRAM car reverse horn omni cfl B0543C LG DSP Siren horn Sound Generator 25 tune musical door bell GoldStar master i
AMPLIFIER wifi

Abstract: Capacitor 47nS namics UCC1837
Text: mA mA V V V V V V mV mV mV HA HA MA V V % HA dB mMho ha ma D 1.485 1.470 1.455 90 85 120 0 , 90 5 40 25 1.5 100 9.7 9 9 mA ma V V V VlN = 4.5V, IOUT = 10|oA, 0°C to 70°C V in = 4.5V , a Pass Element The U CC3837 is designed for use with an N-Channel M O SFE T pass element only. The , be based on required dropout voltage and gate drive characteristics. A lower R d so n M O SFE T is used when low dropout is required, but this type of M O SFE T will have higher gate capacitance which


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PDF UCC1837 UCC2837 UCC3837 CC3837 100ns 200mA AMPLIFIER wifi Capacitor 47nS namics
SFE 5.5 MC

Abstract: No abstract text available
Text: 9.0 33 300 ±1.5 2.0 Vs 4.5 V +125 -25 to +125 ±200 Unit V mA mW mA V V V °C , . Unit 4.5 5.0 27 9.0 33 V mA 750 150 V Q jiV 750 150 V Q jiV < 1.5 , /kQ ±1.9 ±3.0 MHz MHz 2 .2 1.0 S Afcap Afhold i Typ. V mA Q mA mV 150 , HH SFE 5.74 MC 12 \ . jiF ^ 22 11 ^ l~»öl R R 2.2 jtF U2860B 2 SFE 5.5 MC H H f X 3.3 kQ HH 15 nF I SFE 6.0 MC 1 kQ HHH I Mute Squelch AF


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PDF U2860B-B U2860B D-74025 21-Jan-99 SFE 5.5 MC
2003 - STF 410 B 2 A

Abstract: DEUTSCH SRE sfe 410 COMPAGNIE DEUTSCH reb 07 time relay Deutsch socket SME410 DSAHI00046190.txt deutsch sfe
Text: mA at 28 V Trigerring is garantee for a pulse of 21 V during 20 ms 50 ms mini 1 ms 10 or 15 A , REB * *B REB * *K REB * *T * SOKETS SFE 410 B 2 * * SFE 410 B 2 * * SFE 410 B 5 , loss from 21 to 32 V or from 18 to 32 V ( see Temperature range) 140 mA at 28 V Trigerring is garantee , * *T * SOKETS SFE 410 B 2 * * SFE 410 B 2 * * SFE 410 B 5 * * SOCKETS WITH REMOVABLE CONTACTS REB


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Not Available

Abstract: No abstract text available
Text: shift registers that are connected to the RAM array through a 2048 bit data tra n sfe r gate. The SAM , lo s 50 mA * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded , mA 90 85 80 140 130 120 mA 5 5 5 mA ICC2A 50 45 40 mA lCC3 90 85 80 mA 140 130 120 mA 70 65 60 mA 120 110 100 mA |CC5 90 85 80 mA Active ICC5A 140 130 120 mA Standby |CC6


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PDF KM424C256A 256Kx4 KM424C256A 28-PIN 7Tb4142
Not Available

Abstract: No abstract text available
Text: MIC5010 charges a 1nF load in 60ns typical and protects the M O SFE T from over-current conditions. Faster , to V+ - 1 0V to V+ 50 mA -1 V to 50V -0.5V to 36V -1 m A to +1mA 150°C Operating Ratings (Notes 1 , 0.1 8 Max 10 20 2 Units ma mA V V V HA Logic Input Voltage, V IN V + = 4.75V , low all functions are turned off for low standby current, and the gate of the power M O SFE T is also , source pin 6 to prevent exceeding the V GS rating of the M O SFE T at high supplies. The current sense


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PDF MIC5010 MIC5010 MIC501X
Not Available

Abstract: No abstract text available
Text: through a 1024 bit data tra n sfe r gate. The SAM port has serial read and w rite cap abilities. Data , Po 1 w S hort C irc u it O u tp u t C urrent Ios 50 mA 'P e rm a n e n t device , -1 2 65 55 mA 100 85 mA lcC2 3 3 mA A ctive lcC2A 40 35 mA S tandby leca 65 55 mA A ctive IcC3A 100 85 mA Standby Icc4 50 40 mA A ctive lcc*A 85 70 mA Standby Icci A ctive IcciA SE = V


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PDF KM424C64 120ns 100ns 180ns 220ns KM424C64 24-PIN
SONY APS 331

Abstract: icx024 ICX024BL ICX024BL6 483 EEN
Text: n sfe r clock H orizontal register tra n sfe r clock GND 2 3 4 5 6 7 8 9 10 ¡ V4>3 V(t>2 , clock inpu ts an d GND B etw een each of H orizontal and vertical tra n sfe r clock Inputs and SUB P otential d iffe ren ce betw een vertical tra n sfe r clock inputs Potential d iffe ren ce betw een horizontal tra n sfe r clock inputs B etw een each of HO' . H 0 2 and Vcu B etw een each of PG, B etw een , Idd l;Nl Iin2 Min. Typ. 5.0 Max. ; 1 O ! U nit mA nA > Rem aps N o ie 3 N ote 4 Note 5


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PDF
HA1024

Abstract: No abstract text available
Text: asynchronously except d u ring data tra n sfe r betw een the ports. The RAM array c o n s is ts of 256 rows o f , RAM array throug h a 1024 b it data tra n sfe r gate. The SAM port has serial read and w rite cap , °c w mA ` Perm anent device dam age may o c c u r if " ABSOLUTE M AXIM UM RATINGS" are exceeded , nit -1 2 55 85 3 35 55 85 40 70 55 85 65 95 mA mA mA mA mA mA mA mA mA mA mA mA O perating C urrent , bol IIL loL V oh V ql M in -1 0 -1 0 2.4 - Max 10 10 0.4 Unit mA Inp ut Leakage C urrent


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PDF KM424C64 KM424C64 24-PIN HA1024
sfe 5.74

Abstract: U2829B U2829 sfe 5.5 SFE TDA4445B
Text: , 6 Symbol Vs Is Vext Value 10. 15 70 12 8 8 1 125 -25 to +70 -25 t o +125 Unit V mA V Ptot Tj , Test Conditions / Pins V 1 1 6 = 10 mV or V3= 3.5 V Pin 11 Vo 5.0 V Symbol Is Min. Typ. 60 Max. Unit mA , v i-i6 fmod Symbol V Min. Typ. 50 4.1 0.65 1.5 850 Max. Unit nv V Im ax V mA , o p nr j | | 22 nF | 22nF H I-H M 22 mH 3.3 m F 10 nF ,p i=H SFE ' 1 _i - ¿H 560 0 SFE -C = > -T SFE 5.5 M Hz 5.74 M H z 22 -E . vision IF u5600 HH HH SAW m


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PDF TDA4445A/TDA4445B TDA4445B TDA4445A TDA4445B 13-Oct-98 D-74025 sfe 5.74 U2829B U2829 sfe 5.5 SFE
Not Available

Abstract: No abstract text available
Text: ports operate asynchronously except during data tra n sfe r betw een the ports. The RAM array c o n s , registers th a t are con necte d to the RAM array through a 1024 b it data tra n sfe r gate. The SAM port , lo s 50 mA •P erm anent device dam age may o c c u r if “ ABSOLUTE MAXIMUM RATINGSâ , Parameter (Ram Port) -1 0 mA 65 55 85 mA 3 3 mA Ic c î A 40 35 mA Icc3 65 55 mA 100 85 mA Icc4 50 40 mA A ctive ICC4A 85 70


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PDF KM424C64 KM424C64 24-PIN
Not Available

Abstract: No abstract text available
Text: high speed shift registers that are con necte d to the RAM array through a 2048 bit data tra n sfe r , mA 90mA 50mA 5mA 85mA 45mA 5mA 40mA 5mA Fast Page Mode RAM Read, Write, Read-Modify-Write , CMOS VIDEO RAM Rating - 1 to + 7 .0 - 1 to + 7.0 - 55 to + 150 1 50 Unit V V °c w mA Ios , 120 5 40 80 120 60 100 80 120 110 150 Unit mA mA mA mA mA mA mA mA mA mA mA mA Active Standby , 10 10 Unit mA mA Input Leakage C urrent (Any in p u t 0 < V iN< 6 .5 V , all oth er pins not


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PDF KM424C256A 256Kx4 KM424C256A 28-PIN
sfe 5.5 SFE

Abstract: No abstract text available
Text: * bUldlion T ra n sfe r M olded T ra n sfe r M olded T ra n sfe r M olded T ra n sfe r M olded Leadwire , sfe r M olded T ra n sfe r M olded T ra n sfe r M olded T ra n sfe r M olded Leadwire Tinned C o


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PDF IL-101 sfe 5.5 SFE
Not Available

Abstract: No abstract text available
Text: ree basic tra n sfe r modes are o ffe re d ; read , w rite and ve rify A M em ory M a n a g e m e n , sfe rs to pro vid e address status, in struction or o p e rand status, and process status in fo rm a , sfe r. If m ore tim e is needed to com p lete a tra n sfe r, w a it states can be in se rte d by th e , m e m o ry to m em o ry, each tra n sfe r w o rd is te m p o ra rily sto red in th e DM A c o n , p o rary reg ister and and th en tra n sfe r it from th e te m p o rary reg ister to its new lo ca


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PDF MA28137 S10203FDS MAS281 MIL-STD-1750A
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