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sda 5640 datasheet (1)

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SDA5640

Abstract:
Text: VPS Data Line Decoder SDA 5640 MOS 1C Type SDA 5640 Ordering code Q67100-H8087 Package DIP 14 Description of function In conjunction with a video processor (data slicer), the SDA 5640 as , start bit. 289 SDA 5640 From a total of 15 words with 8 bits each, only words 5 and 11 to 14 , while SCL = high). SDA 5640 Description of additional decoder functions 1. Without special , . The DAVN signal indicates whether VPS data is being received by the SDA 5640 . When a data line is


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PDF Q67100-H8087 SDA5640 sda 5232 sda 5640 ADIX sda5232
Not Available

Abstract:
Text: functions of the VPS decoder SDA 5640 and the analog functions of the video processor SDA 5232 on one chip , SIEM ENS 1-Chip-VPS-Decoder SDA 5642 SDA 5642X Preliminary Data MOS IC Features â , input signal level 1 . 2.0 Fpp P-DIP-14-1 P-DSO-20-1 Type Ordering Code Package SDA 5642 Q67100-H8547 P-DIP-14-1 SDA 5642X Q67100-H8637 P-DSO-20-1 Functional Description The MOS circuit SDA 5642 is used to retrieve the required data for the Video Program System (VPS


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PDF 5642X P-DIP-14-1 P-DSO-20-1 Q67100-H8547 Q67100-H8637
Not Available

Abstract:
Text: decoder SDA 5640 and the analog functions of the video processor SDA 5232 on one chip. Together with a , Video input signal level. 1 . 2.0 Vpp Type Ordering Code Package SDA 5642 Q67100-H8547 P-DIP-14 SDA 5642-X Q67100-H8637 P-DSO-20 Functional Description The MOS circuit SDA 5642 , . 280 01.90 SDA 5642 Pin Configuration (top view) P-DSO-20 P-DIP-14 U ^ss : SCL [ SDA Q 1 2 B 14 D 13 ] ' ' do CVBS Ksi I X Vs n 's z N.c. □: 1 2 3 LI


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PDF SDA5642 Q67100-H8547 P-DIP-14 5642-X Q67100-H8637 P-DSO-20
1996 - SDA5640

Abstract:
Text: ARD/ZDF Nr. 8 R 2". This circuit incorporates the digital functions of the VPS decoder SDA 5640 and the analog functions of the video processor SDA 5232 on one chip. Together with a reduced number of , SDA 5642 SDA 5642X 1-Chip-VPS-Decoder SDA 5642 SDA 5642X Preliminary Data MOS IC , P-DIP-14-1 P-DSO-20-1 Type Ordering Code Package SDA 5642 Q67100-H8547 P-DIP-14-1 SDA 5642X Q67100-H8637 P-DSO-20-1 Functional Description The MOS circuit SDA 5642 is used to


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PDF 5642X P-DIP-14-1 P-DSO-20-1 Q67100-H8547 Q67100-H8637 SDA5640 sda 5640 sda 5232 sda5232 SDA5642 h8637 SDA5642X Biphase decoder biphase slicer 5642
2006 - sda 5640

Abstract:
Text: Optoway SPB- 5640 / SPB-5640B / SPB-5640A 1310 nm TX / 1550 nm RX , 3.3V / 622 Mbps Single-Fiber SFP Transceiver FEATURES l l l l l l l l l l l SPB- 5640 , Single +3.3 V Power Supply 0 to 70oC Operating: SPB- 5640 -10 to 85oC Operating: SPB-5640B -40 to 85oC Operating: SPB-5640A Class 1 Laser International Safety Standard IEC 60825 Compliant The SPB- 5640 series , Channel Links ORDER INFORMATION P/No. SPB- 5640 SPB-5640B SPB-5640A Bit Rate (Mb/s) 622 622 622


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PDF SPB-5640 SPB-5640B SPB-5640A SPB-5640 sda 5640 sda 5640a
2005 - Not Available

Abstract:
Text: Optoway SPB- 5640 * SPB- 5640 / SPB-5640B / SPB-5640A 1310 nm TX / 1550 nm RX , 3.3V / 622 Mbps Single-Fiber SFP , * FEATURES DESCRIPTION l l l l l l l l l l l The SPB- 5640 series is small form factor , Operating: SPB- 5640 -10 to 85oC Operating: SPB-5640B -40 to 85oC Operating: SPB-5640A Class 1 Laser , SONET/SDH Equipment Interconnect l Fiber Channel Links ORDER INFORMATION P/No. SPB- 5640 SPB


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PDF SPB-5640 SPB-5640 SPB-5640B SPB-5640A 20-pin
B-213

Abstract:
Text: PARTS V G - R JP = 'D . R AS SCALE GEP 2. | SEE CHARTS SDA - 30 06 9- * * 30069 , . V E R T IC A L HEADER A S S E M B L Y SEE CHARTS. I SDA -30069- » TH IS DM*]« C O N T A , ( 56.40 ) 2.386 (60.60) DIM. D - ENG. NO. EDP. NO. DIM. -A - DIM. -B1 .213 (5.40) .378 , ) 1.031 (26.20) 1.197 (30.40) 1.362 (34.60) 1.528 (38.80) 1.890 (48.00) 2.055 (52.20) 2.220 ( 56.40 ) 2.386 , ) 1.528 (38.80) 1.890 (48.00) 2.055 (52.20) 2.220 ( 56.40 ) 2.386 (60.60) ENG. NO. EDP. NO. DIM. -A


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PDF -30069-20DI -30069-22DI -30069-08D2 -30069-I0D -30069-I2D2 -30069-I4D2 -30069-I8D2 -30069-20D2 -30069-22D2 -30069-24D2 B-213 sda 5640
1998 - Motorola 6800 pin diagram

Abstract:
Text: R/W C68/80 (RD) (WR) Parallel / Serial Interface D7 D6 D5 D4 D3 D2 D 1 D0 ( SDA ) (SCK , 1338.8 1572.6 63 SEG1 -3114.4 564.0 98 SEG36 -1316.0 -1572.6 149 SEG87 3114.4 - 564.0 13 M/S 1244.8 1572.6 64 SEG2 -3114.4 470.0 99 SEG37 , -188.0 106 SEG44 - 564.0 -1572.6 157 SEG95 3114.4 188.0 21 E(RD) 492.8 , 1572.6 75 SEG13 -3114.4 - 564.0 110 SEG48 -188.0 -1572.6 161 SEG99 3114.4


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PDF MC141596A MCC141596A MC141596A 100-Segment 33-Common 6800-series, 8080-series COM32 Motorola 6800 pin diagram 31144 COM16 MC141596AT MCC141596A motorola l6 lcd vs1153
I486

Abstract:
Text: NO. I OF 3 DATE 7/28/94 DR WG. NO. SDA -44482-»»»* ■055t.002 nr a _ 10 9 8 .2641.004 , 1.685 (42.80) 1.898 (48.20) 2.055 (52.20) 22 1.850 (47.00) 2.063 (52.40) 2.220 ( 56.40 ) 24 2.016 (51.20 , ,i MOLEX INCORPORATED PART NO. I DRIIG.NO. SEE CHART I SDA -44482—" IHB MMHG CONTAI« PFOOIATIM , NO. 3 DATE 7/28/94 DR WG. NO. SDA -44482-*» SCALE _ • _ THIS DRAWING CONTAINS INFORMATION


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PDF PS-5556-003. SDES-88 000020/t SDA-44482-* I486 J444 sda 5640 U4093 UCP2003-0387
1999 - motorola l6 lcd

Abstract:
Text: (RD) (WR) MC141598A 2 Parallel / Serial Interface D7 D6 D5 D4 D3 D2 D1 D0 ( SDA )(SCK , V L3 V L2 V DD VF VL6(C4N) C2N C2P C1N C1P C3N VEE VSS D7( SDA ) D6(SCK) D5 D4 D3 D2 , (SCK) D7( SDA ) VSS VEE C3N C1P C1N C2P C2N VL6(C4N) VF VDD VL2 VL3 VL4 VL5 VL6 N/C 1 , VF VL6(C4N) C2N C2P C1N C1P C3N VEE VSS D7( SDA ) D6(SCK) D5 D4 D3 D2 D1 D0 VDD E(RD , SEG1 -2823.0 564.0 98 SEG36 -1316.0 -1572.6 149 SEG87 2823.0 - 564.0 M


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PDF MC141598A MC141598A 100-Segment 33-Common 99-Segment 34-Common 6800-series, 8080-series 145BP, motorola l6 lcd SEG98
1999 - Not Available

Abstract:
Text: Address Inputs NC SCL A10/AP Address Input/Autoprecharge SDA BA0, BA1, (A13, A12) SDRAM , DQ23 VSS DQ24 DQ25 DQ26 DQ27 VDD DQ28 DQ29 DQ30 DQ31 VSS CK2 NC WP SDA SCL VDD 148 , D35 RWE WE: SDRAMs D0 - D35 PLL Termination Serial PD SCL SDA WP A0 47k A1 A2 , configure the SPD EEPROM. SDA Input Output Level - This is a bidirectional pin used to transfer data into or out of the SPD EEPROM. A resistor must be connected from the SDA bus time to VDD to


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PDF IBM13M32734BCD 168-Pin 32Mx72 PC100) 66/100MHz PC100
1998 - MC141598T

Abstract:
Text: /W C68/80 (RD) (WR) MOTOROLA Parallel / Serial Interface D7 D6 D5 D4 D3 D2 D1 D 0 ( SDA , MOTOROLA N/C VL6 VL5 VL4 VL3 VL2 VDD VF VL6(C4N) C2N C2P C1N C1P C3N VEE VSS D7( SDA ) D6 , ( SDA ) VSS VEE C3N C1P C1N C2P C2N VL6(C4N) VF VDD VL2 VL3 VL4 VL5 VL6 N/C 1 2 3 4 , VL4 VL3 VL2 VDD VF VL6(C4N) C2N C2P C1N C1P C3N VEE VSS D7( SDA ) D6(SCK) D5 D4 D3 D2 , SEG86 2823.0 -658.0 1339.0 1572.6 63 SEG1 -2823.0 564.0 98 SEG36


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PDF MC141598 MC141598 100-Segment 33-Common 99-Segment 34Common 6800-series, 8080-series 145BP, MC141598T MC141598T1 MC141598T1R MCC141598 VL616
1999 - motorola l6 lcd

Abstract:
Text: Parallel / Serial Interface RES P/S CS1 CS2 D/C E R/W C68/80 (RD) (WR) D7 D6 D5 D4 D3 D2 D1 D0 ( SDA , L4 V L3 V L2 V DD VF VL6(C4N) C2N C2P C1N C1P C3N VEE VSS D7( SDA ) D6(SCK) D5 D4 D3 D2 D1 D0 V DD E(RD , /S CS1 CS2 C68/80 D/C R/W(WR) E(RD) VDD D0 D1 D2 D3 D4 D5 D6(SCK) D7( SDA ) VSS VEE C3N C1P C1N C2P C2N , COM19 COM18 COM17 COM16 VL6 VL5 VL4 VL3 VL2 VDD VF VL6(C4N) C2N C2P C1N C1P C3N VEE VSS D7( SDA ) D6(SCK , C68/80 D/C R/W(WR) E(RD) VDD D0 D1 D2 D3 D4 D5 D6(SCK) D7( SDA ) VSS VEE C3N C1P C1N C2P C2N VL6(C4N


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PDF MC141598A 100-Segment 33-Common 99-Segment 34-Common 6800-series, 8080-series 145BP, MC141598A motorola l6 lcd SEG98 145BP
sda 5640

Abstract:
Text: SHIFTER MOVIE/ MUSIC + - OFF MOVIE/SIM L-R SCL I2 C BUS DECODER LATCHES SDA DIG , PS3 Lout 7 14 PS4 SDA 8 13 R out SCL 9 12 ADDR 10 11 AGND , TDA7346 TEST CIRCUIT REAR HP1 680nF C16 HP2 0.1µF C17 L-in Lout SCL SDA 6 7 , Voltage IIN Input Current VO Output Voltage SDA Acknowledge 1 3 +5 -5 IO = 1.6mA , interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be


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PDF TDA7346 DIP20 DIP20) TDA7346D TDA7346 100nF 680nF sda 5640 GMOV 106 M1 DIP20 SO20 TDA7346D
2003 - 106 M1

Abstract:
Text: L-R PHASE SHIFTER MOVIE/SIM SCL I2C BUS DECODER LATCHES SDA DIG GND ADDR LPF 9KHz , HP2 LP 5 16 R-in REAR 6 15 PS3 Lout 7 14 PS4 SDA 8 13 , 0.1µF C17 L-in Lout SCL SDA 6 7 9 8 18 LP 5 1.2nF C6 17 R-in , Low Voltage Input High Voltage IIN VO Input Current Output Voltage SDA Acknowledge 1 V , the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to


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PDF TDA7346 DIP20 DIP20) TDA7346D TDA7346 680nF 100nF 106 M1 20K Preset DIP20 latched Phase Shifters SO20 TDA7346D
106 M1

Abstract:
Text: LATCHES MIXING AMP Lout SCL SDA DIGGND ADDR , REAR i Rout December 1994 1/14 This is advanced , 6 15 □ PS3 •-out c 7 14 □ PS4 SDA c 8 13 H Rout SCL c 9 12 □ ADDR DIG GND □ 10 11 3 , 13 -O— Rout 11 ■O 10 o SDA TDA7346 12 o 1 LP 16 19 R-ir I 1.2nF jjZ C6 0.1 hF , Voltage 1 V VlH Input High Voltage 3 V I in Input Current -5 +5 HA Vo Output Voltage SDA , through the 2 wires I C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to


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PDF TDA7346 TDA7346 DIP20 D1P20) TDA7346D 100nF DIP20 106 M1 HA 11745 M1 JH RIN B 75 S020 SO20 TDA7346D
1997 - PS3 transmitter

Abstract:
Text: MOVIE/SIM L-R SCL I2C BUS DECODER LATCHES SDA DIG GND + ADDR LPF 9KHz EFFECT , 5 16 R-in REAR 6 15 PS3 Lout 7 14 PS4 SDA 8 13 Rout SCL , 0.1µF C17 L-in Lout SCL SDA 6 7 9 8 18 LP 5 1.2nF C6 17 R-in , Voltage SDA Acknowledge IO = 1.6mA V +5 µA V V 0.4 0.8 Note: (1) Bass and Treble , place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up


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PDF TDA7346 DIP20 DIP20) TDA7346D TDA7346 100nF 680nF PS3 transmitter 106 M1 DIP20 sda 5640 SO20 TDA7346D
1994 - sda 5640

Abstract:
Text: L-R LPF 9KHz LP 1.2nF + OFF MOVIE/SIM SCL I2 C BUS DECODER LATCHES SDA DIG GND ADDR EFFECT , to +150 Unit V °C °C PIN CONNECTION PS1 VS CREF L-in LP REAR Lout SDA SCL DIG GND 1 2 3 4 5 , 4.7nF C13 CREF 22µF C3 18 6 Lout 7 SCL 9 SDA 8 5 LP 1.2nF C6 R-in LP1 0.1µF 17 16 19 4 C17 10µF , Input Low Voltage Input High Voltage Input Current Output Voltage SDA Acknowledge IO = 1.6mA 3 -5 0.4 , lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As


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PDF TDA7346 TDA7346 DIP20 DIP20) TDA7346D 680nF 100nF sda 5640 TDA7346D 41VRMS phase shifter
1997 - ps3 power supply wires

Abstract:
Text: L-R PHASE SHIFTER MOVIE/SIM SCL I2C BUS DECODER LATCHES SDA DIG GND ADDR LPF 9KHz , HP2 LP 5 16 R-in REAR 6 15 PS3 Lout 7 14 PS4 SDA 8 13 , 0.1µF C17 L-in Lout SCL SDA 6 7 9 8 18 LP 5 1.2nF C6 17 R-in , Low Voltage Input High Voltage IIN VO Input Current Output Voltage SDA Acknowledge 1 V , wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply


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PDF TDA7346 DIP20 DIP20) TDA7346D TDA7346 680nF 100nF ps3 power supply wires 106 M1 DIP20 kc01 PS3 transmitter SO20 TDA7346D
GMOV

Abstract:
Text: LP REAR Lout SDA SCL DIG G N D C C C C C C THERMAL DATA Sym bol R lh j-p in s Description , r SGS-m0MS0N MCROdlLIICUTOIHQCS TDA7346 TEST CIRCUIT SDA HP1 ^ 680nF C16 HP2 0.1|xF I , BUS INPUTS V il VlH Input Low Voltage Input High Voltage Input Current Output Voltage SDA , viceversa takes place through the 2 wires I C BUS interface, consisting of the two lines SDA and SCL , data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the


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PDF TDA7346 DIP20 A7346 DIP20) A7346D GMOV
2005 - Not Available

Abstract:
Text: VSS NC NC VCCQ DQS6 DQ50 DQ51 VSS VCCID DQ56 DQ57 VCC DQS7 DQ58 DQ59 VSS NC SDA SCL PIN 93 94 95 96 97 , # VCC VCCQ VSS VREF VCCSPD SDA SCL SA0-SA2 VCCID NC RESET# Address input (Multiplexed) Bank Select , : SDRAMs WE#: DQRAMs CK0 CK0# PLL DDR SDRAMs REGISTER x 1 SERIAL PD SCL WP SDA A0 A1 A2 SA0 SA1 SA2 V , Current Operating Current IDD5 IDD6 IDD7A 4140 475 5640 4140 475 5640 3980 475 5240 mA mA


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PDF W3EG2128M64ETSR-JD3 2x128Mx64 133MHz 166MHz 166MHz)
phase shifter

Abstract:
Text: HP1 HP2 Vs C CREF C L in C LP C REAR C 3 R-in PS3 PS4 Lout C SDA C SCL C DIG , CIRCUIT REAR Lout SCL SDA ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, Vs = 9V , VlH IIN Vo Input Low Voltage Input High Voltage Input Current Output Voltage SDA Acknowledge lo = , through the 2 wires l2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown in fig. 3, the data on the SDA line must


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PDF TDA7346 680nF phase shifter RIN F 75
Not Available

Abstract:
Text: CHART SDA -44482-* c TITLE 3 PA E ± . 0 1 0 LC 2 PA E ± . 0 1 4 LC _ 1 PA E LC _ , ) 1.890 (48.00) 2.055 (52.20) 2.220 ( 56.40 ) 2.386 (60.60) .1851.004 TYP. (4.701.10) _ , T.P.A SFR1FS | 1 AE DT | 7 /2 8 /9 4 SDA -44482— TISDMCCNA IWRT NTA ISPO IEAYT H MN CT I , /9 4 SDA -44482-*»*»


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PDF SDA-44482-*
2005 - 2128M

Abstract:
Text: DQS6 DQ50 DQ51 VSS VCCID DQ56 DQ57 VCC DQS7 DQ58 DQ59 VSS NC SDA SCL PIN 93 94 95 , VCC DQM6 DQ54 DQ55 VCCQ NC DQ60 DQ61 VSS DQM7 DQ62 DQ63 VCCQ SA0 SA1 SA2 VCCSPD SDA , REGISTER x 1 PLL SDA A0 A1 A2 SA0 SA1 SA2 V CCSPD SPD VCCQ DDR SDRAMS V CC , change only during Active Read or Write commands. 5640 5640 5240 mA April 2005 Rev. 0


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PDF W3EG2128M64ETSR-JD3 2x128Mx64 W3EG2128M64ETSR 128Mx8 133MHz 166MHz 2128M sda 5640 DDR266 DDR333 W3EG2128M64ETSR-JD3
2007 - 2128M

Abstract:
Text: VCCQ DQS6 DQ50 DQ51 VSS VCCID DQ56 DQ57 VCC DQS7 DQ58 DQ59 VSS NC SDA SCL PIN 93 94 95 96 97 98 99 100 , VCCSPD SDA SCL SA0-SA2 VCCID NC RESET# Address input (Multiplexed) Bank Select Address Data Input/Output , : SDRAMs WE#: DQRAMs CK0 CK0# PLL DDR SDRAMs REGISTER x 1 SERIAL PD SCL WP A0 A1 A2 SDA V CCSPD VCCQ , Current IDD5 IDD6 IDD7A 4140 475 5640 4140 475 5640 3980 475 5240 mA mA mA April 2005


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PDF W3EG2128M64ETSR-JD3 2x128Mx64 133MHz 166MHz 166MHz) 2128M
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