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2012 - sbi4.2

Abstract: No abstract text available
Text: include 5 external interrupts, including NMI, 8 timer counters, 3 (MN101EFA5A/A0A: 2 ) types of serial , configuration is suitable for system control microcontroller. With 2 oscillation systems (internal frequency , on the clock dividing fpll, (fpll is generated by original oscillation and PLL), by 2 (fpll/ 2 ), and , ) Machine Cycle:  0.05 ms / fs: 20 MHz (4.0 V to 5.5 V) Oscillation circuit: 2 channel oscillation , Multiplication circuit (PLL Circuit)  PLL circuit output clock (fpll): fosc multiplied by 2 , 3, 4, 5, 6, 8


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PDF MN101EA0/A1/A5/A6 MN101E MN101C MN101EFA6A/A5A/A1A/A0A MN101EFA5A/A0A: sbi4.2
2007 - scl-3b

Abstract: LQFP128-P-1818C sbi4.2
Text: , I2C × 3, Time base timer × 2 , DMA × 12, WDT, A/D, System error, key input, Remote control × 4, CAN × 2 , 32-bit timer) 8-bit timer B × 2 interval timer, event count, square-wave output, simple pulse , , Compare/capture register 2 -ch. Time base timer × 1 Watchdog timer × 2 Serial interface UART , with AEHA (Association for Electric Home Appliances) format CAN controller Number of channels : 2 , , CAN Transfer method : 2 -bus cycle transfer Adressing modes : fixed, increment, decrement Transfer


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PDF MN103SA2 MN103SA2N LQFP128-P-1818C QFP100-P-1818B MN103SFA2N 1024K MN103SFA2R 16-bit scl-3b LQFP128-P-1818C sbi4.2
2008 - MN101EF51A

Abstract: sbi4.2 PX-PRBV101E51-QFP044-P-1010F OSC2P26
Text: internal 2 , 3 , 4 , 5 , 6 , 8 , 10 times oscillation used Interrupts 5 external interrupts. 19 internal interrupts RESET. NMI. External 0 to 4. Timer 0 to 2 . Timer 6. Timer 7 ( 2 systems). Timer 9 (3 systems). Time base. LIN. Serial 0 ( 2 systems). Serial 1 ( 2 systems). Serial 4 ( 2 systems). A/D conversion , . Event count. Added pulse ( 2 -bit) type PWM output. Remote control carrier output. Simple pulse width , -bit cascade connected (timer 0, 1). Timer synchronous output Timer 2 .Timer pulse output


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PDF MN101E51 MN101EF51A QFN044-P-0606A QFP044-P-1010F TQFP048-P-0707B VDD18 OSC2P26 OSC1P25 sbi4.2 PX-PRBV101E51-QFP044-P-1010F
2011 - sbi4.2

Abstract: QP2520 LP2920H LP-2920 AN3106 L6585DE QTC21 L6599 application note LLC resonant full bridge schematic LP2920
Text: . 0.55 * 48 96 µH min 200 max. Class B insulation system: SBI4.2 Hi-pot test: 1.5 kV, N1 to , : Start 7 6 0.3 * 1c AUX 6±0.5 Class B insulation system: SBI4.2 with standing voltage , ±10% DCR (m) Sec.short Class B insulation system: SBI4.2 with standing voltage: 3.0 kV/1 sec , . . . 4 2 Main characteristics and circuit description . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2 /25 Doc ID


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PDF AN3407 L6585DE L6585DE STEVAL-ILL038V1) sbi4.2 QP2520 LP2920H LP-2920 AN3106 QTC21 L6599 application note LLC resonant full bridge schematic LP2920
design of PROCESS CONTROL TIMER

Abstract: AN10 AN11 QFP044-P-1010F TQFP048-P-0707B real life application of PROCESS CONTROL TIMER MN101EF51A
Text: ), TQFP048-P-0707B (Under planning) 50 ns (2.7 V to 5.5 V) 125 ns (1.8 V to 5.5 V) *: at internal 2 , 3 , 4 , RESET. NMI. External 0 to 4. Timer 0 to 2 . Timer 6. Timer 7 ( 2 systems). Timer 9 (3 systems). Time base. LIN. Serial 0 ( 2 systems). Serial 1 ( 2 systems). Serial 4 ( 2 systems). A/D conversion. Low voltage , . Added pulse ( 2 -bit) type PWM output. Remote control carrier output. Simple pulse width measurement , connected (timer 0, 1). Timer synchronous output Timer 2 .Timer pulse output. Event count


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PDF MN101E51 MN101EF51A QFP044-P-1010F TQFP048-P-0707B design of PROCESS CONTROL TIMER AN10 AN11 QFP044-P-1010F TQFP048-P-0707B real life application of PROCESS CONTROL TIMER MN101EF51A
MN101EF52A

Abstract: MN101E52 sbi4.2 f-00109342f UBGA036-P-0404AE TQFP032-P-0707A
Text: ), UBGA036-P-0404AE (Under development) 50 ns (2.7 V to 5.5 V) 125 ns (1.8 V to 5.5 V) *: at internal 2 , 3 , interrupts RESET. NMI. External 0 to 3. External 5. Timer 0 to 2 . Timer 6. Timer 7 ( 2 systems). Timer 9 (3 systems). Time base. LIN. Serial 0 ( 2 systems). Serial 4 ( 2 systems). A/D conversion. Low voltage , . Added pulse ( 2 -bit) type PWM output. Remote control carrier output. Simple pulse width measurement , connected (timer 0, 1). Timer synchronous output Timer 2 .Timer pulse output. Event count


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PDF MN101E52 MN101EF52A TQFP032-P-0707A UBGA036-P-0404AE MN101EF52A sbi4.2 f-00109342f UBGA036-P-0404AE TQFP032-P-0707A
2005 - LQFP128

Abstract: LQFP128-P-1818C MN103SA2N QFP100-P-1818B
Text: ) Interrupts RESET, IRQ × 8, NMI, Timer × 32, SIF × 16, I²C × 3, Time base timer × 2 , DMA × 12, WDT, A/D, System error, key input, Remote control × 4, CAN × 2 Timer Counter 8-bit timer A × 10 Reload-down count, Cascade connection possible (usable as a 16-bit to 32-bit timer) 8-bit timer B × 2 , Up-down count, Input capture function, PWM generating function, Compare/capture register 2 -ch. Time base timer × 1 Watchdog timer × 2 Serial interface UART/synchronous/multi-master I²C interface


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PDF MN103SA2N MN103SFA2N MN103SFA2R 1024K LQFP128-P-1818C QFP100-P-1818B 16-bit LQFP128 LQFP128-P-1818C MN103SA2N QFP100-P-1818B
2008 - MN101EF51A

Abstract: No abstract text available
Text: internal 2 , 3 , 4 , 5 , 6 , 8 , 10 times oscillation used Interrupts 5 external interrupts. 19 internal interrupts RESET. NMI. External 0 to 4. Timer 0 to 2 . Timer 6. Timer 7 ( 2 systems). Timer 9 (3 systems). Time base. LIN. Serial 0 ( 2 systems). Serial 1 ( 2 systems). Serial 4 ( 2 systems). A/D conversion , . Event count. Added pulse ( 2 -bit) type PWM output. Remote control carrier output. Simple pulse width , -bit cascade connected (timer 0, 1). Timer synchronous output Timer 2 .Timer pulse output


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PDF MN101E51 MN101EF51A QFN044-P-0606A QFP044-P-1010F TQFP048-P-0707B
MN101EF51A

Abstract: MN101EF51 PA436 AN10 AN11 QFP044-P-1010F TQFP048-P-0707B
Text: ns (2.7 V to 5.5 V) 125 ns (1.8 V to 5.5 V) *: at internal 2 , 3 , 4 , 5 , 6 , 8 , 10 times oscillation used Interrupts RESET. NMI. External 0 to 4. Timer 0 to 2 . Timer 6. Timer 7 ( 2 systems). Timer 9 (3 systems). Time base. LIN. Serial 0 ( 2 systems). Serial 1 ( 2 systems). Serial 4 ( 2 systems). , .Timer pulse output. Event count. Added pulse ( 2 -bit) type PWM output. Remote control carrier output , . Event count. 16-bit cascade connected (timer 0, 1). Timer synchronous output Timer 2


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PDF MN101E51 MN101EF51A QFP044-P-1010F, TQFP048-P-0707B MN101EF51A MN101EF51 PA436 AN10 AN11 QFP044-P-1010F TQFP048-P-0707B
2006 - Not Available

Abstract: No abstract text available
Text: , I2C × 3, Time base timer × 2 , DMA × 12, WDT, A/D, System error, key input, Remote control × 4, CAN × 2 , 32-bit timer) 8-bit timer B × 2 interval timer, event count, square-wave output, simple pulse , , Compare/capture register 2 -ch. Time base timer × 1 Watchdog timer × 2 Serial interface UART , with AEHA (Association for Electric Home Appliances) format CAN controller Number of channels : 2 , , CAN Transfer method : 2 -bus cycle transfer Adressing modes : fixed, increment, decrement Transfer


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PDF MN103SA2 MN103SA2N LQFP128-P-1818C QFP100-P-1818B MN103SFA2N 1024K MN103SFA2R 16-bit
2006 - Not Available

Abstract: No abstract text available
Text: , I2C × 3, Time base timer × 2 , DMA × 12, WDT, A/D, System error, key input, Remote control × 4, CAN × 2 , 32-bit timer) 8-bit timer B × 2 interval timer, event count, square-wave output, simple pulse , , Compare/capture register 2 -ch. Time base timer × 1 Watchdog timer × 2 Serial interface UART , with AEHA (Association for Electric Home Appliances) format CAN controller Number of channels : 2 , , CAN Transfer method : 2 -bus cycle transfer Adressing modes : fixed, increment, decrement Transfer


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PDF MN103SA2 MN103SA2N LQFP128-P-1818C QFP100-P-1818B MN103SFA2N 1024K MN103SFA2R 16-bit
2005 - MN103SFE4K

Abstract: sbi4.2 f-00109342f
Text: , I2C × 1, SIF × 4, DMA × 12, WDT, System error, USB × 2  Timer Counter 8-bit timer × 4 Reload-down count, Cascade connection possible (usable as a 16-bit to 32-bit timer) 16-bit timer × 2 Up-down count, Input capture function, PWM generating function, Compare/capture register 2 -ch. Watchdog timer × 1  Serial interface multi-master I2C × 1 UART/synchronous interface selective × 2 , transmission/reception facto r , software factor Transfer method : 2 -bus cycle transfer Adressing modes


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PDF MN103) 32-bit TM22IOB VDD33 VDD18 TM14IOA, TM14IOB, TM15IOA, MN103SFE4K sbi4.2 f-00109342f
2002 - QFP208-P-2828A

Abstract: MN103004K MN103016K QFP208-P-2828F
Text: , 1, 2 , 3 Timer counter 4 to 7: 32-bit × 1 (interval timer, event count, toggle output, interrupt , ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter 0, 1, 2 Interrupt source ················ underflow of timer counter 10, 11, 12, 13 Timer counter 14, 15: 16-bit × 2 (interval timer, event count, toggle output, PMW output, interrupt, input capture ( 2 lines), one-shot output , ····················· IOCLK; IOCLK/8; external clock input ( 2 lines); underflow of timer counter 0, 1; 2 -phase encode


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PDF MN103004K MN103016K 64-bit) 32-bit) QFP208-P-2828F QFP208-P-2828A) FLGA239-C-1313 QFP208-P-2828A MN103004K MN103016K QFP208-P-2828F
QFP208-P-2828A

Abstract: QFP208-P-2828F MN103004J MN103004K 2828a SBT7
Text: ; underflow of timer counter Interrupt source ················ underflow of timer counter 0, 1, 2 , 3 Timer , ····················· IOCLK; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter 0, 1, 2 Interrupt source ················ underflow of timer counter 10, 11, 12, 13 Timer counter 14, 15: 16-bit × 2 (interval timer, event count, toggle output, PMW output, interrupt, input capture ( 2 lines), one-shot output , ····················· IOCLK; IOCLK/8; external clock input ( 2 lines); underflow of timer counter 0, 1; 2 -phase encode


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PDF MN103004J MN103004K 64-bit) QFP208-P-2828F QFP208-P-2828A) FLGA239-C-1313 QFP208-P-2828A QFP208-P-2828F MN103004J MN103004K 2828a SBT7
2002 - MN103004K

Abstract: MN103016K QFP208-P-2828A QFP208-P-2828F D1587
Text: counter Interrupt source ················ underflow of timer counter 0, 1, 2 , 3 Timer counter 4 to 7: 32 , ; IOCLK/8; IOCLK/32; external clock input; underflow of timer counter 0, 1, 2 Interrupt source , -bit × 1 Number of channels: 2 Unit of transfer: 8/16/32 bits Max. Transfer cycles: 65535 Staring , conversion finish, software factor Transfer method: 2 -bus cycle transfer Adressing modes: fixed, increment , an ce /D is co nt in Timer counter 14, 15: 16-bit × 2 (interval timer, event count


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PDF MN103004K MN103016K 64-bit) 32-bit) FLGA239-C-1313 QFP208-P-2828F QFP208-P-2828A) MN103004K MN103016K QFP208-P-2828A QFP208-P-2828F D1587
2007 - Not Available

Abstract: No abstract text available
Text: , I2C × 3, Time base timer × 2 , DMA × 12, WDT, A/D, System error, key input, Remote control × 4 , 32-bit timer) 8-bit timer B × 2 interval timer, event count, square-wave output, simple pulse , , Compare/capture register 2 -ch. Time base timer × 1 Watchdog timer × 2 Serial interface UART , request factor, A/D conversion finish, software factor, Remote control data reception Transfer method : 2 , 95 96 97 98 99 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71


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PDF MN103SD3 MN103SD3P LQFP100-P-1414 MN103SFD3R 1024K 16-bit 32-bit KEY15 KEY14
2007 - Not Available

Abstract: No abstract text available
Text: 2 , DMA × 12, WDT, A/D, System error Timer Counter 8-bit timer × 10 Reload-down count, Cascade , function, PWM generating function, Compare/capture register 2 -ch. Time base timer × 1 Watchdog timer × 1 , selective × 2 DMA controller Number of channels : 4 Unit of transfer : 8/16/32 bits Max. Transfer , , software factor Transfer method : 2 -bus cycle transfer Adressing modes : fixed, increment, decrement , , DA1 P26, ADTRG AVDD P32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


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PDF MN103SB9 MN103SB9N TQFP128-P-1414A MN103SFB9R 1024K 16-bit 32-bit MAF00023BEM
2003 - Not Available

Abstract: No abstract text available
Text: -1414 *Pb-free 25.0 ns (at 3.0 V to 3.6 V, 40 MHz) · RESET · IRQ × 8 · NMI · Timer × 28 · SIF × 10 · I 2C × 2 · , function Compare/capture register 2 -ch. Watchdog timer × 1 DMA Controller Number of channels: 4 Unit , request factor, A/D conversion finish, software factor Transfer method: 2 -bus cycle transfer Adressing , UART/synchronous/multi-master I 2 C interface selective: 2 UART/synchronous interface selective: 3 , /A0 P37/WE1 P36/WE0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 MN103S57G


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PDF MN103S57G 64-bit) 32-bit) LQFP100-P-1414 16-bit 32-bit fact40 P03/IRQ2/DREQ0/A19
2002 - MN103004K

Abstract: MN103016K QFP208-P-2828A QFP208-P-2828F
Text: counter Interrupt source ················ underflow of timer counter 0, 1, 2 , 3 Timer counter 4 to 7: 32 , ; external clock input; underflow of timer counter 0, 1, 2 Interrupt source ················ underflow of timer counter 10, 11, 12, 13 Timer counter 14, 15: 16-bit × 2 (interval timer, event count, toggle output, PMW output, interrupt, input capture ( 2 lines), one-shot output, external trigger start , ; external clock input ( 2 lines); underflow of timer counter 0, 1; 2 -phase encode Interrupt source


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PDF MN103004K MN103016K 64-bit) 32-bit) QFP208-P-2828F FLGA239-C-1313 QFP208-P-2828A) MN103004K MN103016K QFP208-P-2828A QFP208-P-2828F
2003 - Not Available

Abstract: No abstract text available
Text: ················ underflow of timer counter 0, 1, 2 , 3 Timer counter 4 to 7: 32-bit × 1 (interval timer, event , ; underflow of timer counter 0, 1, 2 Interrupt source ················ underflow of timer counter 10, 11, 12, 13 Timer counter 14, 15: 16-bit × 2 (interval timer, event count, toggle output, PMW output, interrupt, input capture ( 2 lines), one-shot output, external trigger start, generation of timer synchronous output timing, DMA start) Clock source ····················· IOCLK; IOCLK/8; external clock input ( 2


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PDF MN103004K MN103016K 64-bit) 32-bit) QFP208-P-2828F QFP208-P-2828A) MN103004K MN103016K FLGA239-C-1313
2007 - adm9

Abstract: MN103SF57G
Text: ) MN103SF57G FLASH Interrupts RESET, IRQ × 8, NMI, Timer × 28, SIF × 10, I2C × 2 , DMA × 12, WDT, A/D , function, Compare/capture register 2 -ch. Watchdog timer × 1 Serial interface UART/synchronous/multi-master I2C interface selective × 2 UART/synchronous interface selective × 3 DMA controller Number of , transmission request factor, A/D conversion finish, software factor Transfer method : 2 -bus cycle transfer , 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1 2 3 4 5 6 7 8 9 10 11 12 13


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PDF MN103S57 MN103S57G LQFP100-P-1414A MN103SF57G 16-bit 32-bit ADM15, ADM14, ADM13, adm9
2008 - MN101EF52A

Abstract: MN101E52
Text: ) 125 ns (1.8 V to 5.5 V) *: at internal 2 , 3 , 4 , 5 , 6 , 8 , 10 times oscillation used Interrupts 4 external interrupts. 17 internal interrupts RESET. NMI. External 0 to 3. Timer 0 to 2 . Timer 6. Timer 7 ( 2 systems). Timer 9 (3 systems). Time base. LIN. Serial 0 ( 2 systems). Serial 4 ( 2 systems). A , .Timer pulse output. Event count. Added pulse ( 2 -bit) type PWM output. Remote control carrier output , . Event count. 16-bit cascade connected (timer 0, 1). Timer synchronous output Timer 2


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PDF MN101E52 MN101EF52A SSOP032-P-0300B out00B MAD00076AEM MAD00076AEM VDD18 MN101EF52A
2008 - Not Available

Abstract: No abstract text available
Text: V, 20 MHz) Interrupts RESET. Watchdog. External 0 to 5. Timer 0 to 3. Timer 6. Timer 7 ( 2 systems). Timer A to E. Time base. Serial 0 ( 2 systems). Serial 1 ( 2 systems). Serial 2 . Serial 3 ( 2 systems). Serial 4 ( 2 systems). Automatic transfer finish ( 2 systems). A/D conversion finish. Key , .Square-wave output. Event count. Synchronous output event. 16-bit timer with cascade connection Timer 2 , , 1 can be cascade-connected Timer 0, 1, 2 can be cascade-connected Timer 2 , 3 can be


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PDF MN101E41 MN101EF41N QFP100-P-1818B VDD18 VDD33 VDD33 MAD00067CEM
2003 - MN103S5

Abstract: MN103S53G
Text: × 10 · I2C × 2 · DMA × 6 · WDT · A/D · System error Timer Counter 8-bit timer × 10 , count Input capture function PWM generating function Compare/capture register 2 -ch. Watchdog timer × 1 DMA Controller Number of channels: 2 Unit of transfer: 8/16/32 bits Max. Transfer cycles , Transfer method: 2 -bus cycle transfer Adressing modes: fixed, increment, decrement Transfer modes: word , interface selective: 2 UART/synchronous interface selective: 3 I/O Pins I/O 58 · Common use


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PDF MN103S53G 64-bit) 32-bit) LQFP80-P-1414A 16-bit 32-bit MN103S5 MN103S53G
2008 - MN101EF49N

Abstract: No abstract text available
Text: ) Interrupts RESET. Watchdog. External 0 to 5. Timer 0 to 3. Timer 6. Timer 7 ( 2 systems). Timer A to E. Time base. Serial 0 ( 2 systems). Serial 1 ( 2 systems). Serial 2 . Serial 3 ( 2 systems). Serial 4 ( 2 systems). Automatic transfer finish ( 2 systems). A/D conversion finish. Key interrupt. IEBus* * IEBus is a trademark , .Square-wave output. Event count. Synchronous output event. 16-bit timer with cascade connection Timer 2 , , 1 can be cascade-connected Timer 0, 1, 2 can be cascade-connected Timer 2 , 3 can be


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PDF MN101E49 MN101E49K LQFP100-P-1414 MN101EF49N VDD18 VDD33 VDD33
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