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Part Manufacturer Description Datasheet Download Buy Part
SN65LV1023AMDBREP Texas Instruments Enhanced Product 10:1 Lvds Serdes Transmitter 100-660 Mbps 28-SSOP -55 to 125
SN65LV1224BRHBT Texas Instruments 1:10 LVDS Serdes Receiver 100 - 660Mbps 32-VQFN -40 to 85
SN65LVDS152DA Texas Instruments MuxIt ™ Receiver-Deserializer 32-TSSOP -40 to 85
SN65LVDS310ZQCR Texas Instruments QVGA-HVGA 27-Bit Display Serial Interface Receiver 48-BGA MICROSTAR JUNIOR -40 to 85

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Catalog Datasheet MFG & Type PDF Document Tags
2003 - 70311A

Abstract:
Text: 50 49 48 1 47 2 46 3 45 4 44 5 43 6 42 7 41 8 40 9 39 10 38 11 37 12 36 13 , Recovery (CDR) circuit. CPLL1 CPLL0 10 11 C Loop Filter Capacitor: A loop filter capacitor , 106.25 MHz HP 70311A Clock Source 1/ 10 Ch 1/2 HP 83480A Digital Trigger Communication , Ch 1/2 HP 83480A Digital Trigger 1/ 10 Communication 53.125 MHz Analyzer Figure 7. Setup for Measurement of Deterministic Jitter. 9 2 1/ 10 106.25 MHz N/C O-LVTTL I-LVTTL


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PDF HDMP-0482 HDMP-0482 5988-7140EN 5988-9758EN 70311A HDMP-1636A HP70841B
2001 - HDMP-0482

Abstract:
Text: 50 49 48 1 47 2 46 3 45 4 44 5 43 6 42 7 41 8 40 9 39 10 38 11 37 12 36 13 , Recovery (CDR) circuit. CPLL1 CPLL0 10 11 C Loop Filter Capacitor: A loop filter capacitor , 106.25 MHz HP 70311A Clock Source 1/ 10 Ch 1/2 HP 83480A Digital Trigger Communication , Ch 1/2 HP 83480A Digital Trigger 1/ 10 Communication 53.125 MHz Analyzer Figure 7. Setup for Measurement of Deterministic Jitter. 9 2 1/ 10 106.25 MHz N/C O-LVTTL I-LVTTL


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PDF HDMP-0482 HDMP-0482 5988-4185EN HDMP-1636A HP70841B
2007 - AD8342

Abstract:
Text: PWDN 12 11 COMM 13 EXRB COMM 10 9 8 COMM 7 IFOP RFIN 15 6 IFOM , transformer Typ Max Unit 10 1|0.4 2.4 4.75 dB k|pF V 10 |0.5 VS 5.25 13 k|pF V dBm Internally generated; port must be ac-coupled 10 VS - 1.6 dB V Device , , fRF2 = 461 MHz, fLO = 550 MHz, fIF1 = 90 MHz, fIF2 = 89 MHz, each RF tone - 10 dBm fRF1 = 238 MHz, fRF2 = 239 MHz, fLO = 286 MHz, fIF1 = 48 MHz, fIF2 = 47 MHz, each RF tone - 10 dBm fRF1 = 460 MHz


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PDF AD8342 AD8342ACPZ-REEL7 AD8342ACPZ-R21 AD8342ACPZ-WP1 AD8342-EVALZ1 16-Lead D05352-0-7/09 AD8342 1435d ADL5561 AD8375 AD8370 AD8352 AD8351 AD8342ACPZ-R21 400M TC2-1T
1999 - TMS 3868

Abstract:
Text: Ethernet Transceiver IC. Each of the four transmitters has a 10 -bit wide bus, running up to 136 MHz, which , the clock and data, deserializes it into 10 -bit receive characters, outputs a recovered clock and , of 4 Channels) Rx(0:9) 10 QD Serial to Q Parallel D ÷ 10 QD 0 1 Rx+ Rx- RCX1 RCX0 SYNCx ENCDET PLUP SLPN LPNx Tx(0:9) Comma Detect Loopback Control Clock ÷20 Recovery 4 0 10 , reference frequency provided on the REF input by 10 or 20 to achieve a baud rate clock between 1.05 and 1.36


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PDF VSC7139 1/10th 1/20th G52240-0, TMS 3868 pin diagram Ic 741
2006 - PMC-2060488

Abstract:
Text: 47 2 46 3 45 4 44 5 43 6 42 7 41 8 40 9 39 10 38 11 e3 37 12 36 13 35 14 34 15 33 16 17 18 19 20 21 , 30 36 42 49 55 1 2 10 11 14 Pin Type HS_OUT Pin Description HS_IN Serial Data Inputs , rtm HP 70311A Clock Source 1/ 10 in 106.25 MHz Figure 6. Setup for Measurement of Random , Co nt HP70841B Pattern Generator +/- Data 1/ 10 Ch 1/2 Do wn lo Figure 7 , Trigger 1/ 10 Communication 53.125 MHz Analyzer PMC-Sierra, Inc. - Not Recommended for New Designs co


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PDF HDMP-0421G HDMP-0422G HDMP-0450G HDMP-0451G HDMP-0452G HDMP-0480G HDMP-0482G PMC-2060481* HDMP-1022G 5988-4185EN PMC-2060488
2014 - AD8017

Abstract:
Text: voltage per input peak voltage) slope at 10 GHz Fast envelope bandwidth: 40 MHz Fast output rise time , 25°C −40°C < TA < +85°C, input power (PIN) = + 10 dBm −55°C < TA < +125°C, PIN = + 10 dBm −40°C < TA < +85°C, PIN = − 10 dBm −55°C < TA < +125°C, PIN = − 10 dBm Calibration at −14 dBm and , ˆ’0.2 +0.7/−0,6 +0.9/−1.2 2.2 0.3 dB dB dB dB V/ VPEAK V PIN = + 10 dBm PIN = − 10 dBm Input RFIN to output VOUT 2.2 0.19 V V CW input Three point calibration at −25 dBm, − 10


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PDF ADL6010 7-31-2013-A ADL6010ACPZN-R7 ADL6010SCPZN-R7 ADL6010-EVALZ D11617-0-9/14 AD8017
2007 - Not Available

Abstract:
Text: VPDC PWDN 12 11 COMM 13 EXRB COMM 10 9 8 COMM 7 IFOP RFIN 15 6 , :1 impedance ratio transformer Typ Max Unit 10 1|0.4 2.4 4.75 dB kΩ|pF V 10 |0.5 VS 5.25 13 kΩ|pF V dBm Internally generated; port must be ac-coupled 10 , , fIF1 = 90 MHz, fIF2 = 89 MHz, each RF tone − 10 dBm fRF1 = 238 MHz, fRF2 = 239 MHz, fLO = 286 MHz, fIF1 = 48 MHz, fIF2 = 47 MHz, each RF tone − 10 dBm fRF1 = 460 MHz, fRF2 = 410 MHz, fLO = 550 MHz


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PDF AD8342 AD8342ACPZ-REEL7 AD8342ACPZ-R21 AD8342ACPZ-WP1 AD8342-EVALZ1 16-Lead D05352-0-7/09
2007 - TC2-1T

Abstract:
Text: DIAGRAM VPDC PWDN 12 11 COMM 13 EXRB COMM 10 9 8 COMM 7 IFOP RFIN 15 , Max Unit 10 1|0.4 2.4 4.75 dB k|pF V 10 |0.5 VS 5.25 13 k|pF V dBm Internally generated; port must be ac-coupled 10 VS - 1.6 dB V Device enabled, IF output to 90% of , MHz, fLO = 550 MHz, fIF1 = 90 MHz, fIF2 = 89 MHz, each RF tone - 10 dBm fRF1 = 238 MHz, fRF2 = 239 MHz, fLO = 286 MHz, fIF1 = 48 MHz, fIF2 = 47 MHz, each RF tone - 10 dBm fRF1 = 460 MHz, fRF2 = 410


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PDF AD8342 instrumen-40 AD8342ACPZ-WP1 AD8342-EVALZ1 16-Lead CP-16-3 TC2-1T AD8370 400M AD8342 AD8351 AD8352 AD8369
2003 - disk

Abstract:
Text: 9 39 10 38 11 37 12 36 13 35 14 34 15 33 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 , 30 36 42 49 55 1 2 10 11 14 Pin Type HS_OUT Pin Description Serial Data Outputs: High-speed , +/- Data K28.7 Clock 1062.5 MHz 106.25 MHz 2 HP 70311A Clock Source 1/ 10 Ch 1/2 , MHz 2 HP 70311A Clock Source 1/ 10 Ch 1/2 106.25 MHz HP 83480A Digital Trigger 1/ 10 , result. 10 Package Information HDMP-0482 Thermal Characteristics, TC = 0°C to 85°C, VCC = 3.15V


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PDF HDMP-0482 5988-4185EN 5988-7140EN disk
2006 - Not Available

Abstract:
Text: ± differential outputs goes to :0 10 6 00 • Amplitude valid detection on FM_NODE[7] input â , 3 BYPASS2 2 BYPASS1 1 10 :0 The HDMP-0482G design allows for CDR placement at any , de d oa wn l Do PM 05 9: :0 10 6 00 ,2 RFCM Input The LVTTL RFCM , 00 6 10 BYPASS1 AV FM_NODE(7)_AV 1 ch 0 CDR 3M ar 1 DV FM_NODE[0 , supply or ground 5 10 6 2345670 00 3M ar ch in CPLL0 ABCDEFG ,2


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PDF HDMP-0482G HDMP-0482G 5988-4185EN 5989-3169EN
2004 - AD8351

Abstract:
Text: Active Receive Mixer 400 MHz to 1.2 GHz AD8344 APPLICATIONS 12 11 COMM EXRB 10 , Current Conditions (Pin 15, RFIN and Pin 14, RFCM) Min Max 10 2.6 Internally generated , Typ 4.75 - 10 9|1 VS Internally generated; port must be ac-coupled 0 10 VS - 1.6 , fRF1 = 450 MHz, fRF2 = 451 MHz, fLO = 550 MHz, fIF = 100 MHz, each RF tone = - 10 dBm fRF1 = 890 MHz, fRF2 = 891 MHz, fLO = 1090 MHz, fIF = 200 MHz, each RF tone = - 10 dBm fRF1 = 450 MHz, fRF2 = 500 MHz


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PDF AD8344 MO-220-VEED-2 16-Lead CP-16-3) AD8344ACPZ-REEL71 AD8344ACPZ-WP1, AD8344-EVAL D04826 AD8351 470 UF 50V AD8344 AD8369 BLM18HD601SN1D common base mixer circuit analysis CP-16-3 MO-220-VEED-2
2005 - AD8342

Abstract:
Text: COMM 13 EXRB COMM 10 9 8 COMM 7 IFOP RFIN 15 6 IFOM VPMX 16 5 COMM , MHz Supplied externally Via a 2:1 impedance ratio transformer Typ Max Unit 10 1|0.4 2.4 4.75 dB k|pF V 10 |0.5 VS 5.25 13 k|pF V dBm Internally generated; port must be ac-coupled 10 VS - 1.6 dB V Device enabled, IF output to 90% of its final level , OUTPUT LEAKAGE RF TO IF OUTPUT LEAKAGE IF/2 SPURIOUS 1 Conditions Min 50 60 10 High side


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PDF AD8342 AD8342ACPZ-REEL71 AD8342ACPZ-R21 AD8342ACPZ-WP1 AD8342-EVAL 16-Lead D05352 AD8342 400M 700M AD8351 AD8369
1999 - Not Available

Abstract:
Text: transmitters has a 10 -bit wide bus, running up to 136 MHz that accepts 8B/10B encoded transmit characters and , receiver samples serial receive data, recovers the clock and data, deserializes it into 10 -bit receive , VSC7139 Block Diagram QD Q Serial to Parallel QD D Rx+ 0 Rx–- RCM SEL ÷ 10 /÷20 RCx1 1 ÷ 10 Clock Recovery RCx0 Comma Detect SYNCx ENCDET PLUP Loopback Control SLPN 4 LPNx 0 10 Tx[0:9] DQ Parallel to Serial DQ 1 Tx+ Tx– 4 4 TBCx


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PDF VSC7139 1/10th 1/20th 208-Pin, G52196-0,
1999 - Not Available

Abstract:
Text: transmitters has a 10 -bit wide bus, running up to 136MHz that accepts 8B/10B encoded transmit characters and , receiver samples serial receive data, recovers the clock and data, deserializes it into 10 -bit receive , : www.vitesse.com 1 of 18 VSC7139 Data Sheet VSC7139 Block Diagram 10 Rx[0:9] QD Q Serial to , Detect SEL ÷ 10 /÷20 ÷ 10 Clock Recovery 1 0 10 Tx[0:9] DQ 4 4 TBCx REFT REF+ REF­ RFCM LTCN , synthesizer multiplies the reference frequency, provided on the REF input, by 10 or 20 to achieve a baud rate


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PDF VSC7139 05Gb/s 36Gb/s 1/10th 1/20th 208-Pin, G52196-0,
2004 - 1090MHz balun

Abstract:
Text: Instrumentation VPDC PWDN EXRB 12 11 10 COMM 9 BIAS COMM 13 8 COMM RFCM 14 7 , Max Unit 10 dB Internally generated; Port typically AC coupled, RBIAS = 2.4k, connected , balun TBD VS Return Loss DC Bias Level Typ 4.75 - 10 Internally generated; Port typically AC coupled 0 10 VS ­ 1.6 Device enabled, IF Output to 90% of its final level Device , fRF1 = 890 MHz, fRF2 = 891 MHz, fLO = 1090 MHz, fIF =200 MHz, each RF tone 10 dBm 24 dBm fRF1


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PDF AD8344 AD8344 AD8344ACPZ AD8344-EVAL 16-Lead PR04826-0-3/04 CP-16-3 1090MHz balun 1090mhz oscillator AD8344-EVAL AD8344ACPZ AD8351 AD8369 CP-16-3
AN-20

Abstract:
Text: transmitters has a 10 -bit wide bus, running up to 136 MHz, which accepts 8B/10B encoded transmit characters , into 10 -bit receive characters, outputs a recovered clock and detects "Comma" characters. The VSC7139 , 8/15/00 10 Serial to Q Parallel D QD SEL ÷ 10 / ÷20 QD Rx+ Rx- 0 ÷ 10 1 Clock Recovery Comma Detect Loopback Control 4 0 10 DQ 4 Parallel to Serial , the reference frequency provided on the REF input by 10 or 20 to achieve a baud rate clock between


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PDF VSC7139 1/10th 1/20th G52196-0, AN-20 marking code ta9 pdf of 741 ic VSC7139
SN8P2318

Abstract:
Text: SN8P2318 Series C-type LCD, RFC 8-Bit Micro-Controller SN8P2318 Version 1.0 SN8P2318 , Version 1.0 SN8P2318 Series C-type LCD, RFC 8-Bit Micro-Controller VER 1.0 2010.05 SONiX TECHNOLOGY CO., LTD Page 2 Version 1.0 SN8P2318 Series C-type LCD, RFC 8 , .41 SONiX TECHNOLOGY CO., LTD Page 3 Version 1.0 SN8P2318 Series C-type LCD, RFC 8 , .81 SONiX TECHNOLOGY CO., LTD Page 4 Version 1.0 SN8P2318 Series C-type LCD, RFC 8


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PDF SN8P2318 SN8P2318 SN8P2318F P36R P37R SN8P2318fG lcd 10.1 led cv1 100 1p0 LQFP64 P32R SN8P2308
Not Available

Abstract:
Text: Serial to Q Parallel D QD ÷5 RCi1 RCi0 RSYN SYNi SYNC ÷ 10 QD SIi+ SIi- 0 1 , ) multiplies the reference frequency provided on the RFC input by 10 when RFCM=1, or by 20 when RFCM=0. The , data is converted back into the original 10 -bit wide data and recognizes the presence of the “Commaâ , : Transmit Timing Waveforms 10 bit times TXCT TXi(0:4) Data Valid Data Valid Data Valid TXCV TXCV TC TXS TXH TXS TXH 2x TC Internal Clock 10 -BIT CHAR A SOi+/- TXi7 TXi8


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PDF VSC7185 05Gb/s 36Gb/s 1/10th VSC7185 G52324-0,
Not Available

Abstract:
Text: Ethernet Transceiver IC. Each of the four transmitters has a 10 -bit wide bus, running up to 136 MHz, which , the clock and data, deserializes it into 10 -bit receive characters, outputs a recovered clock and , of 4 Channels) RXi(0:9) 10 QD Serial to Q Parallel D ÷ 10 QD 0 1 Clock Recovery SI+ SI- RCM RCi1 RCi0 SYNi SYNC PLUP SLPN LPNi TXi(0:9) SEL ÷ 10 / ÷20 Comma Detect Loopback Control 4 0 10 DQ 4 4 Parallel to Serial DQ 1 SO+ SO- TCi RFCT RFC+ RFCRFCM LTCN CAP0 CAP1


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PDF VSC7182 1/10th 1/20th HDMP-1682 G52307-0,
2001 - 741 application current source

Abstract:
Text: - RCi1 RCi0 RSYN SYNi SYNC PLUP SLPN 5 ÷ 10 Clock Recovery Unit Comma Detect Loopback Control 0 , Clock Multiplier Unit (CMU) multiplies the reference frequency provided on the RFC input by 10 when RFCM , is converted back into the original 10 -bit wide data and recognizes the presence of the "Comma" , Timing Waveforms 10 bit times TXCT TXi(0:4) Data Valid Data Valid Data Valid TXCV TXCV TC TXS TXH TXS TXH 2x TC Internal Clock 10 -BIT CHAR A 10 -BIT CHAR B TXi0 TXi1 TXi2 SOi+/-


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PDF VSC7185 05Gb/s 36Gb/s 1/10th VSC7185 G52324, 741 application current source
TX33

Abstract:
Text: RCi0 RSYN SYNi SYNC ÷ 10 QD SIi+ SIi- 0 1 Clock Recovery Unit Comma Detect , provided on the RFC input by 10 when RFCM=1, or by 20 when RFCM=0. The RFCT input is TTL, and the REF+/- , =1. The serial data is converted back into the original 10 -bit wide data and recognizes the presence of , Timing Waveforms 10 bit times TXCT TXi(0:4) Data Valid Data Valid Data Valid TXCV TXCV TC TXS TXH TXS TXH 2x TC Internal Clock 10 -BIT CHAR A SOi+/- TXi7 TXi8


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PDF VSC7185 05Gb/s 36Gb/s 1/10th VSC7185 G52324-0, TX33 uA 741 IC data sheet 741 IC data sheet HDMP-1685A internal circuit diagram of IC 741 pdf of 741 ic RC10 uA 741
2001 - 272MHZ

Abstract:
Text: QD ÷5 RCi1 RCi0 RSYN SYNi SYNC ÷ 10 QD SIi+ SIi- 0 1 Clock Recovery Unit , VSC7185 Clock Multiplier Unit (CMU) multiplies the reference frequency provided on the RFC input by 10 , enabled on all channels when SYNC=1. The serial data is converted back into the original 10 -bit wide data , Figure 3: Transmit Timing Waveforms 10 bit times TXCT TXi(0:4) Data Valid Data Valid Data Valid TXCV TXCV TC TXS TXH TXS TXH 2x TC Internal Clock 10 -BIT CHAR A 10


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PDF VSC7185 05Gb/s 36Gb/s 1/10th VSC7185 G52324-0, 272MHZ HDMP-1685A pdf of 741 ic RC10
2004 - MO-220-VEED-2

Abstract:
Text: transmitters Radio links RF Instrumentation FUNCTIONAL BLOCK DIAGRAM VPDC PWDN EXRB 12 11 10 , generated Via a 4:1 balun Min Typ Max 10 2.5 4.75 - 10 9|1 VS Internally generated; port must be ac-coupled 0 10 VS - 1.6 Device enabled, IF output to 90% of its final level , RF tone - 10 dBm fRF1 = 238 MHz, fRF2 = 239 MHz, fLO = 286MHz, fIF = 45MHz, each RF tone - 10 dBm , LO Power = 0 dBm, fRF = 500 MHz, fLO = 600 MHz RF Power = - 10 dBm, fRF = 500 MHz, fLO = 600 MHz RF


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PDF AD8342 MO-220-VEED-2 16-Lead CP-16-3) PR05352-0-1/05 MO-220-VEED-2 AD8342 AD8351 AD8369 CP-16-3 RFC-M
2004 - ad8344

Abstract:
Text: Active Receive Mixer 400 MHz to 1.2 GHz AD8344 APPLICATIONS 12 11 COMM EXRB 10 , Power-Down Current Conditions (Pin 15, RFIN and Pin 14, RFCM) Min Max 10 2.6 Internally , balun Typ 4.75 − 10 9|1 VS Internally generated; port must be ac-coupled 0 10 VS , MHz, fIF = 200 MHz fRF1 = 450 MHz, fRF2 = 451 MHz, fLO = 550 MHz, fIF = 100 MHz, each RF tone = − 10 dBm fRF1 = 890 MHz, fRF2 = 891 MHz, fLO = 1090 MHz, fIF = 200 MHz, each RF tone = − 10 dBm fRF1 =


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PDF AD8344 MO-220-VEED-2 16-Lead CP-16-3) AD8344ACPZ-REEL71 AD8344ACPZ-WP1, AD8344-EVAL D04826â ad8344
2014 - AD8017

Abstract:
Text: voltage per input peak voltage) slope at 10 GHz Fast envelope bandwidth: 40 MHz Fast output rise time , + 10 dBm −55°C < TA < +125°C, PIN = + 10 dBm −40°C < TA < +85°C, PIN = − 10 dBm −55°C < TA < +125°C, PIN = − 10 dBm Calibration at −14 dBm and +5 dBm Calibration at −14 dBm and +5 , dB dB dB dB V/ VPEAK V PIN = + 10 dBm PIN = − 10 dBm Input RFIN to output VOUT 2.2 0.19 V V CW input Three point calibration at −25 dBm, − 10 dBm, and +8 dBm Three point


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PDF ADL6010 7-31-2013-A ADL6010ACPZN-R7 ADL6010SCPZN-R7 ADL6010-EVALZ D11617-0-7/14 AD8017
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