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ATL010A0X43-SR GE Critical Power ATL010A0X43-SR Non-Isolated Power Module 12Vdc, Programmable
ATL010A0X43-SRZ GE Critical Power ATL010A0X43-SR Non-Isolated Power Module 12Vdc, Programmable
AXH010A0X3Z GE Critical Power Austin Lynx SIP Non-isolated Power Module, Programmable
AXH010A0X3 GE Critical Power Austin Lynx SIP Non-isolated Power Module, Programmable
AXA010A0X3-SR GE Critical Power 12V AustinLynx 10A SMT: Non-Isolated DC-DC Power Module,Programmable
AXA010A0X3 GE Critical Power 12V AustinLynx SIP Non-Isolated DC-DC Power Module,Programmable

programmable counter ic Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2011 - Not Available

Abstract: No abstract text available
Text: Radio PLL IC Advance Information (2) Setting divisor The divisor for the programmable counter is , . 10 Programmable counter , DATA CLOCK PERIOD DO2 Programmable counter Register OT_1 Open Drain Output Port , and R3 are all set to “1”.In standby mode, the programmable counter stops, and FM, AM and IFIN , counter The programmable counter section consists of a 1/2 prescaler, a 2 modulus prescaler and a 4bit


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PDF DS-TR1002 TR1002 TR1002-000-16-X 16-pin
1999 - programmable counter ic

Abstract: 20PIN CXA1786N
Text: FIN FC LAT DATA PS 11 CK Programmable Counter 11bits 9 10 15 12 7 Charge Pump 2 Charge Pump 1 DO2 13 6 TEST 14 5 Reference Programmable Counter , Resister 1-bit Shift Resister 18-bit Latch Pulse swallow programmable counter Sony reserves the , counter (reference, programmable ) output to the TEST pin. The signal output which is , reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the


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PDF CXA1786N CXA1786N 20-pin 20PIN SSOP-20P-L01 SSOP020-P-0044 42/COPPER programmable counter ic
1999 - 20PIN

Abstract: CXA1786N
Text: Counter 7bits NC FIN FC LAT DATA PS 11 CK Programmable Counter 11bits 9 , Reference Programmable Counter 14bits P 16 4 NC 17 3 Vp 19 Phase Comparator , -bit Latch 18-bit Shift Resister 1-bit Shift Resister 18-bit Latch Pulse swallow programmable counter , comparator output and the output signals of counter (reference, programmable ) output to the TEST pin , reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the


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PDF CXA1786N CXA1786N 20-pin 20PIN SSOP-20P-L01 SSOP020-P-0044 42/COPPER
2011 - 1/PLL RADIO

Abstract: No abstract text available
Text: . 4 Programmable counter . 4 Setting programmable counter , OSC Circuit X2 Refernce Counter Phase DO Comparator Programmable FMIN counter , counter The programmable counter section consists of 16bit programmable binary counter . Setting programmable counter The divisor for the programmable counter is set as binary data in bits P0~P15.(fig


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PDF DS-TR3001 TR3001 FF00H 150mil TR3001-000-15-X 14-pin 1/PLL RADIO
2011 - PLL 100Mhz MCU

Abstract: TR3002
Text: . Rev 1.1, 2011/12/30 DS-TR3002_E FM Radio PLL IC Advance Information Programmable counter The programmable counter section consists of 16bit programmable binary counter . Setting , . 6 Programmable counter . 7 Setting programmable counter , Programmable counter DA CK Shift Register TR3002 4 Preliminary tenx technology inc. Rev


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PDF DS-TR3002 TR3002 TR3002-000-52-X PLL 100Mhz MCU TR3002
1999 - 20PIN

Abstract: CXA1787N HIGH FREQUENCY COUNTER
Text: Counter 7bits NC FIN FC LAT DATA PS 11 CK Programmable Counter 11bits 9 , Reference Programmable Counter 14bits P 16 4 NC 17 3 Vp 19 Phase Comparator , -bit Latch 18-bit Shift Resister 1-bit Shift Resister 18-bit Latch Pulse swallow programmable counter , comparator output and the output signals of counter (reference, programmable ) output to the TEST pin , reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the


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PDF CXA1787N CXA1787N 20-pin 20PIN SSOP-20P-L01 SSOP020-P-0044 42/COPPER HIGH FREQUENCY COUNTER
1999 - 20PIN

Abstract: CXA1787N
Text: FIN FC LAT DATA PS 11 CK Programmable Counter 11bits 9 10 15 12 7 Charge Pump 2 Charge Pump 1 DO2 13 6 TEST 14 5 Reference Programmable Counter , Resister 1-bit Shift Resister 18-bit Latch Pulse swallow programmable counter Sony reserves the , counter (reference, programmable ) output to the TEST pin. The signal output which is , reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the


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PDF CXA1787N CXA1787N 20-pin 20PIN SSOP-20P-L01 SSOP020-P-0044 42/COPPER
Not Available

Abstract: No abstract text available
Text: comparator output and the output signals of counter (reference, programmable ) output to the TEST pin , be input to the reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the all initializing state in this IC . Every one bit of data is retrieved into the , . The input data is retrieved into the reference counter latch or the pulse swallow programmable , been set. Hereafter, when only the programmable counter data is to be changed, only the latter 19 bits


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PDF CXA1786N CXA1786N 20-pin 20PIN P-20P-L01 020-P
1999 - WB1336TX-TR

Abstract: No abstract text available
Text: Binary 11-Bit Programmable Counter fp1 Phase Detector Charge Pump (8) OSC_IN OSC_OUT (9) (13) LE , 64/65 or 128/129 Binary 7-Bit Swallow Counter Binary 11-Bit Programmable Counter Phase , : Preset ratio of the 11-bit programmable counter (3 to 2047). P: Preset divide ratio of the dual modulus prescaler (64/65 or 128/129). R: Preset ratio of the 15-bit programmable reference counter (3 to 32767). The , FO Programmable Counter bits CNT1 CNT2 A1 A2 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11


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PDF WB1336T 15dBm 20-pin FDS-011 WB1336TX-TR
a35c

Abstract: programmable counter ic
Text: should be Input to the reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the all Initializing state in this IC . Every one bit of data is retrieved into the , . The input data Is retrieved Into the reference counter latch or the pulse swallow programmable counter , time, set the final bit C High. Next, Input the 19 bits of pulse swallow programmable counter data In , . Hereafter, when only the programmable counter data Is to be changed, only the latter 19 bits of programmable


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PDF CXA1786N CXA1786N 20-pln 20PIN SSOP-20P-L01 P020-P-0044 a35c programmable counter ic
2011 - Not Available

Abstract: No abstract text available
Text: . 5 Programmable counter . 5 Setting programmable counter , . BLOCK DIAGRM X1 OSC X2 Refernce Circuit Counter Phase DO Comparator Programmable , . Programmable counter The programmable counter section consists of 16bit programmable binary counter . Setting programmable counter The divisor for the programmable counter is set as binary data in bits P0


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PDF DS-TR1001 TR1001 \TX9972\TDA70882. TR1001-000-15-X 14-pin 150mil
1999 - programmable counter ic

Abstract: No abstract text available
Text: Binary 11-Bit Programmable Counter fp DO Phase Detector Charge Pump (16) BISW (15) FC (20 , the 7-bit swallow counter (0 to 63). B: Preset ratio of the 11-bit programmable counter (3 to 2047). P , -bit programmable reference counter (3 to 16383). The divide ratio N = (P * B) + A. Serial Input PLL with 2.5GHz , Programmable Counter bits CNT A1 A2 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 Bit(s) Name CNT , /65 and high = 32/33. Swallow Counter Divide Ratio: A = 0 to 63. Programmable Counter Divide Ratio: B


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PDF WB1225 20-pin WB1225 WB1225X-TR programmable counter ic
1999 - Not Available

Abstract: No abstract text available
Text: Binary 11-Bit Programmable Counter fp DO Phase Detector Charge Pump (16) BISW (15) FC (20 , (0 to 127). B: Preset ratio of the 11-bit programmable counter (3 to 2047). P: Preset divide ratio of , R8 R9 R10 R11 R12 R13 R14 PRE Programmable Counter bits CNT A1 A2 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 , programming data to reference or programmable counters. Reference Counter Setting Bits: 14 bits, R = 3 to , 0 to 127. Programmable Counter Divide Ratio: B = 3 to 2047 (Note 2). Notes: 1. The MSB is loaded


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PDF WB1215 20-pin WB1215 WB1215X-TR
1999 - Not Available

Abstract: No abstract text available
Text: Binary 11-Bit Programmable Counter fp DO Phase Detector Charge Pump (16) BISW (15) FC (20 , (0 to 127). B: Preset ratio of the 11-bit programmable counter (3 to 2047). P: Preset divide ratio of , R8 R9 R10 R11 R12 R13 R14 PRE Programmable Counter bits CNT A1 A2 A3 A4 A5 A6 A7 B1 B2 B3 B4 B5 , programming data to reference or programmable counters. Reference Counter Setting Bits: 14 bits, R = 3 to , to 127. Programmable Counter Divide Ratio: B = 3 to 2047 (Note 2). Notes: 1. The MSB is loaded in


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PDF WB1220 20-pin WB1220 WB1220X-TR 101Nicholson
HIGH FREQUENCY COUNTER

Abstract: No abstract text available
Text: comparator output and the output signals of counter (reference, programmable ) output to the TEST pin , should be input to the reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the all initializing state in this IC . Every one bit of data is retrieved into the , . The input data is retrieved into the reference counter latch or the pulse swallow programmable , been set. Hereafter, when only the programmable counter data is to be changed, only the latter 19 bits


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PDF CXA1786N CXA1786N 20-pin 20PIN SSOP-20P-L01 SSOP020-P-0044 HIGH FREQUENCY COUNTER
Not Available

Abstract: No abstract text available
Text: reference counter latch and the 18 bis of data to the pulse swallow programmable counter latch to set the , retrieved into the reference counter latch or the pulse swallow programmable counter latch according to the , bit C High. Next, input the 19 bits of pulse swallow programmable counter data in the same way. In , the programmable counter data is to be changed, only the latter 19 bits of programmable counter data , consists of 16 bits for the reference counter and 19 bits for the pulse swallow programmable counter . The


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PDF CXA1787N CXA1787N 20-pin 20PIN SSOP-20P-L01 SSOP020-P-0044
TC9172P

Abstract: Bos 6K IC-413 TC9171P MC33269ST-5.0T3 4D22A-P KL14 diode tc9182p AUTO RADIO TOSHIBA TA TC9182P-1
Text: 19 AMIN AM local oscillator signal input Programmable counter input at AM band. Built-in Amp. C , o PK plii Y1 Y2 Y 4 Y8 Programmable counter dividing type Setting_ HF AIF+ 1 AI F - 1 FM Programmable counter dividing nunfcer setting PO PI P2 P3 Programmable counter dividing number setting P4 P5 P6 P7 Programmable counter dividing nunfoer setting P8 I P9 1 PIO J - Programmable counter , A-STP INI IN 2 IN 3 Programmable counter dividing type setting HF AIF+.l AIF-1 Programmable


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PDF TC9171P/72P/82P-1 TC930IAN/02AF/03AN TC9171P. CI0C17E47 001A2E1 TC9172P, TC9182P-1 T-50-17 TC9172P Bos 6K IC-413 TC9171P MC33269ST-5.0T3 4D22A-P KL14 diode tc9182p AUTO RADIO TOSHIBA TA TC9182P-1
B1332

Abstract: WB1332 PFN1 WB1332X
Text: Binary 11-Bit Programmable Counter f d1 1 - - Phase - Detector - 'F Charge Pump (3) D0 , Binary 11-Bit Programmable Counter Fin2 (15) Binary 4 -Bit Swallow Counter Phase Detector , 127) and the 4-bit swallow counter (0 to 15). B: Preset ratio of the 11 -bit programmable counter (3 , : Preset ratio of the 15-bit programmable reference counter (3 to 32767). The divide ratio N = (P * B) + A , and 510MHz Prescalers Revision 0.8 ill# IC W 0 R K S Table 5 7-Bit Swallow Counter (A) Truth


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PDF WB1332X 510MHz 20-pin B1332 WB1332 PFN1 WB1332X
nsk Crystal osc

Abstract: NSK oscillator 1N1426 WB1333 airtronic capacitor bitek VDO ecu Tekelec airtronic
Text: reference counter . (3 to 32767) B: Preset ratio of the 11 bit programmable counter . (3 to 2047) A: Preset , REFERENCE COUNTER and CONFIGURATION BITS 7 4 5 6 8 9 1 2 3 Cntl Cnt2 RI R2 R3 R4 R3 R6 R7 PROGRAMMABLE , * Programmable counter divide Ratio (N = 3 to 2047) · Swallow counter divide ratio (A = 0 to 127) Control , Troth Table for the 11 bit Programmable Counter (B) Divide Ratio B ll B10 B9 B 0 0 0 0 1 0 0 0 · · · · , of the 11 bit programmable counter . (3 to 2047) A: Preset divide ratio of the 7 bit swallow counter


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PDF WB1333-1 128product nsk Crystal osc NSK oscillator 1N1426 WB1333 airtronic capacitor bitek VDO ecu Tekelec airtronic
Not Available

Abstract: No abstract text available
Text: ratio of the 7-bit swallow counter (0 to 127). B: Preset ratio of the 11 -bit programmable counter (3 to , 15-bit programmable reference counter (3 to 32767). The divide ratio N = (P * B) + A. Dual Serial , Programmable Counter bits CNT1 CNT2 A1 A2 A3 A4 A5 A6 A7 | B1 B2 | B3 B4 B5 B6 B7 B8 B9 B10 B11 PRE PD Bit(s , . A1-A7 B1-B11 Swallow Counter Divide Ratio: A = 0 to 127. Programmable Counter Divide Ratio: B = 3 to , Divider Output PLL2 Programmable Divider Output PLL1 Programmable Divider Output PLL2 Counter Reset PLL1


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PDF WB1336 20-pin FDS-011
WB1305

Abstract: No abstract text available
Text: -Bit Programmable Counter 1 (1) voe2(20) v P 1 (2 ) fo1 1r 1 - 1 - Phase - Detector , # Binary 7-Bit Swallow Counter Binary 11-Bit Programmable Counter Phase Detector Charge Pump , ratio of the 11 -bit programmable counter (3 to 2047). P: Preset divide ratio of the dual modulus prescaler (64/65 or 128/129). R: Preset ratio of the 15-bit programmable reference counter (3 to 32767). The , R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 FC IDO TS LD FO Programmable Counter bits CNT1 CNT2


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PDF WB1305X 550MHz 20-pin B1305 WB1305
1999 - wb1356x

Abstract: No abstract text available
Text: Prescaler 64/65 or 128/129 Binary 7-Bit Swallow Counter Binary 11-Bit Programmable Counter fp1 , Binary 11-Bit Programmable Counter Phase Detector fp2 Charge Pump (18) DOPLL2 (14) GND GND , : Preset ratio of the 11-bit programmable counter (3 to 2047). P: Preset divide ratio of the dual modulus prescaler (64/65 or 128/129). R: Preset ratio of the 15-bit programmable reference counter (3 to 32767). The , CNT1 CNT2 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 FC IDO TS LD FO Programmable Counter


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PDF WB1356 15dBm 20-pin wb1356x
Not Available

Abstract: No abstract text available
Text: programmable frequency synthesizer IC U2781B for uP controlled application is realized with Telefunken advanced , the scaling factors of the programmable counter , the reference counter and the prescaler. A TCXO can , of the programmable counter (C = L) Reference Counter (15-bit shift register) LSB C RO R1 [ R2 R3 , Programmable Counter (18-bit shift register) LSB C SO SI S2 S3 S4 S5 S6 MO Ml M2 M3 M4 M5 M6 M7 M8 M9 MSB M10 , 2047 Total scaling factor Sp of the programmable counter Sp = (Spsc*SM) + Ss Condition: Ss < Sm V


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PDF U2781B-FS U2781B SSO-20) SSO-20 D-74025
b1330

Abstract: No abstract text available
Text: 15). B: Preset ratio of the 11-bit programmable counter (3 to 2047). P: Preset divide ratio of the , . Programmable Counter Divide Ratio: B = 3 to 2047 (Note 2). Notes: 1. The MSB is loaded in first. 2 Low count , -Bit Programmable Reference Counter (for PLL1 and PLL2) Truth Table R15 0 0 R14 0 0 R13 0 0 R12 0 0 R11 0 0 R10 0 0 , (0 to 63) and the 4-bit swallow counter (0 to 15). B: Preset ratio of the 11-bit programmable counter , -bit programmable reference counter (3 to 32767). The divide ratio N = (P * B) + A. Dual Serial Input PLLwith


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PDF WB1330 510MHz 20-pin WB1330 b1330
1999 - Not Available

Abstract: No abstract text available
Text: ) FIN1# (6) Prescaler 32/33 or 64/65 Binary 7-Bit Swallow Counter Binary 11-Bit Programmable , Counter Binary 11-Bit Programmable Counter Phase Detector fp2 Charge Pump DOPLL2 (18) GND , -bit swallow counter (0 to 15). B: Preset ratio of the 11-bit programmable counter (3 to 2047). P: Preset , -bit programmable reference counter (3 to 32767). The divide ratio N = (P * B) + A. Dual Serial Input PLL with , CNT2 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 FC IDO TS LD FO Programmable Counter bits


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PDF WB1330 600MHz 20-pin
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