The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
5962-9054302MQA Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, CDIP40, CERDIP-40
CS82C37A Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, PQCC44
CS82C37A-1296 Intersil Corporation 4 CHANNEL(S), 12.5MHz, DMA CONTROLLER, PQCC44, PLASTIC, MO-047AC, LCC-44
CP82C37A-5 Intersil Corporation 4 CHANNEL(S), 5MHz, DMA CONTROLLER, PDIP40, PLASTIC, DIP-40
MD82C37A/B Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, CDIP40, CERAMIC, DIP-40
CS82C37AZ Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, PQCC44, ROHS COMPLIANT, MO-047AC, PLASTIC, LCC-44

plx 9054 cpld dma vhdl Datasheets Context Search

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2000 - verilog code for pci

Abstract: pci9054 plx 9054 pci master verilog code 9054 bus arbiter pci verilog code PCI 9054-AC50PI
Text: for adapters and embedded systems. The PCI 9054 has Direct Master, DMA and Direct Slave data , . 2 PCI 9054 /PCI 9054 AN v2.0 © 2000 PLX Technology, Inc. All rights reserved. i 1 , CPLD is included. 2. Architecture Shown in Figure 1-1 are two PCI 9054 sharing the same local bus , CPLD asserting LHOLDA_1. Once the PCI 9054 #1 is done with the bus it will negate its LHOLD_1 and the , 9054 #1 or #2 negating their LHOLD. The CPLD asserts LHOLDA_1. The CPLD asserts LHOLDA_2. - 4


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PDF 9054/PCI 33Mhz 9054-PCI verilog code for pci pci9054 plx 9054 pci master verilog code 9054 bus arbiter pci verilog code PCI 9054-AC50PI
2001 - ORCAD

Abstract: 54pin TSOP SDRAM 9054RDK SRAM 54-PIN 2X10-Pin PLX Option Module 1 POM1 54-PIN 48-PIN 44-PIN 240-PIN
Text: Rapid Development Kit Based on the powerful PLX PCI 9054 , the PLX PCI 9054RDK-LITE (RDK-LITE) provides , RDK-LITE is the PLX PCI 9054 I/O Accelerator that supports a 32-bit, 33MHz PCI bus and a 50MHz local bus , Mbytes/second. The PCI 9054 incorporates PLX 's industry leading advanced Data Pipe ArchitectureTM , CPLD PCI 9054 s PCI s PLXMon Windows GUI debug tool for monitoring, debugging , manuals in PDF format PLX SDK-LITE CD-ROM Contents Description PCI 9054 host side API and


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PDF 9054RDK 32-bit, 33MHz 50MHz 128KB 30x25 9054RDK-LITE 9054/LITE-RDK-PB-P1-5 ORCAD 54pin TSOP SDRAM SRAM 54-PIN 2X10-Pin PLX Option Module 1 POM1 54-PIN 48-PIN 44-PIN 240-PIN
2001 - PLX Option Module 1 POM1

Abstract: pci master verilog code 1.5mm pin Header TSOP 54 PIN 54pin TSOP SDRAM TSOP 48 LAYOUT PCI9054 AB50P
Text: PCI form factor PCI 9054 I/O Accelerator PCI 9054 Rapid Development Kit Based on the powerful PLX PCI 9054 , the PLX PCI 9054RDK-LITE (RDK-LITE) provides a low-cost development environment for PCI 9054 embedded application designs. At the heart of the RDK-LITE is the PLX PCI 9054 I/O Accelerator that , implementation enabling burst transfers up to 132 Mbytes/second. The PCI 9054 incorporates PLX 's industry leading , in PDF format PLX SDK-LITE CD-ROM Contents PCI 9054 host side API and object code libraries


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PDF 9054RDK 9054RDK-LITE 32-bit, 33MHz 50MHz 9054/LITE-RDK-PB-P1-5 862-PCI9054RDK-LITE PCI9054RDK-LITE PLX Option Module 1 POM1 pci master verilog code 1.5mm pin Header TSOP 54 PIN 54pin TSOP SDRAM TSOP 48 LAYOUT PCI9054 AB50P
2001 - orcad components footprints

Abstract: pci verilog code ORCAD block code error management, verilog source code 54-PIN pci schematics SOIC EEPROM 48-PIN 44-PIN verilog code for EEPROM Controller
Text: .2 compliant PCI form factor s PLX PCI 9056 I/O Accelerator Rapid Development Kit For PCI 9056 Generic Local Bus Designs ­ 32-bit, 66MHz PCI bus operation s CPLD Local Bus memory controller and 128KB SRAM s PLX Option Module (POM) expansion connector s 33 surface mount , Materials (BOM) s OrCAD layout source with Gerber output files s CPLD memory controller , Windows Host API and object code library An Invaluable Development Aid The PLX PCI 9056RDK


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PDF 9056RDK-LITE 32-bit, 66MHz 128KB 30x25 9056/LITE-RDK-PB-P1-1 orcad components footprints pci verilog code ORCAD block code error management, verilog source code 54-PIN pci schematics SOIC EEPROM 48-PIN 44-PIN verilog code for EEPROM Controller
2001 - pci plx 9656

Abstract: verilog code for pci pci verilog code PCI 9656 schematic flash controller verilog code pci footprints PCI 9656 verilog aa66bi footprint plcc 208 44-PIN
Text: Generic Local Bus Designs ­ Supports 64-bit, 66MHz PCI bus operation s CPLD Local Bus memory controller and 128KB SRAM s PLX Option Module (POM) expansion connector s 32 surface mount , Materials (BOM) s OrCAD layout source with Gerber output files s CPLD Memory controller , Windows Host API and object code library An Invaluable Development Aid The PLX PCI 9656RDK , also includes the PLX Software Development Kite Lite Edition (SDK-LITE) CD, which provides a complete


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PDF 9656RDK-LITE 64-bit, 66MHz 128KB 30x25 9656/LITE-RDK-PB-P1-1 pci plx 9656 verilog code for pci pci verilog code PCI 9656 schematic flash controller verilog code pci footprints PCI 9656 verilog aa66bi footprint plcc 208 44-PIN
1999 - hitachi sh3

Abstract: 9080RDK-RC32364 MPC860 RC32364 Hitachi DSA0092 pci plx 9080
Text: and host embedded systems. The PLX PCI 9080 includes two high performance DMA channels, programmable , Burst Management­Directly supports PCI Target, PCI Initiator and DMA s IDT RC32364 32 , schematics, CPLD AHDL code, and hardware reference manual s Sample PCI 9080 and Data Book PCI SDK , the PLX PCI 9080 Bus Master I/O Accelerator Chip and the IDT RC32364TM microprocessor, the PLX PCI , designs based on the MIPS® architecture. At the heart of the RDK is the PLX PCI 9080 Bus Master I/O


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PDF 9080RDK-RC32364 RC32364 32-bit 133MHz RC32364 9080RC64-RPB-010 hitachi sh3 9080RDK-RC32364 MPC860 Hitachi DSA0092 pci plx 9080
2001 - lattice lsi 2064 programming

Abstract: verilog code for pci pci master verilog code PLX TECHNOLOGY MPC860 flash controller verilog code lsi 2064
Text: Swap adapter board based on the powerful PLX PCI 9054 Bus Master I/O Accelerator Hot Swap Friendly , Kit Based on the powerful combination of the PLX PCI 9054 Bus Master I/O Accelerator Chip and the , Motorola MPC860 processor. At the heart of the RDK is the PLX PCI 9054 Bus Master I/O Accelerator which , /second. The PCI 9054 incorporates PLX 's industry leading advanced Data Pipe ArchitectureTM technology , processor s Complete OrCAD schematics, CPLD Verilog code and Hardware Reference Manual s


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PDF 9054RDK-860 MPC860 50MHz MPC860MH MPC860 CPCI9054/860-RDK-PB-PI-4 lattice lsi 2064 programming verilog code for pci pci master verilog code PLX TECHNOLOGY flash controller verilog code lsi 2064
1999 - Hitachi SH3 80MHz

Abstract: hitachi sh3 HD64461 pci schematics MPC860 SH7709 Hitachi DSA0092 EFB810-3/4-3/Hitachi SH3 80MHz
Text: embedded systems. The PLX PCI 9080 includes two high performance DMA channels, programmable burst modes , PCI Target, PCI Initiator, and DMA s Hitachi SH7709 80MHz (internal) RISC processor s Complete OrCAD schematics, CPLD ABEL code, and hardware reference manual s Sample PCI 9080 and , C H N O L O G Y ® Based on the powerful combination of the PLX PCI 9080 Bus Master I/O Accelerator Chip and the Hitachi SuperHTM SH-3 microprocessor, the PLX PCI 9080RDK-SH3 Reference Design Kit


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PDF 9080RDK-SH3 SH7709 80MHz Hitachi SH3 80MHz hitachi sh3 HD64461 pci schematics MPC860 Hitachi DSA0092 EFB810-3/4-3/Hitachi SH3 80MHz
1999 - 21152 digital

Abstract: PCI9054 CPLD PLX PCI9054 plx 9054 cpld dma vhdl 12v relay interface with cpld in vhdl vhdl HDB3 hint hb1 Intel 21152 schematic motherboard architectur 96F8740
Text: Total LED 3.3V TDK78P2241 Intel PCI21152 PLX PCI9054 Xilinx CPLD Pericom 8-bit Driver , PCI 9054 . 18 4.4.1 POWER SUPPLY . 18 4.4.2 CPLD , DS3 LIU REFERENCE DESIGN 5.4 5.5 PCI 9054 CONFIGURATION , 12 APPENDIX C: VHDL CODE FOR GLUE LOGIC . 48 PROPRIETARY AND


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PDF PM7380 FREEDM-32P672 PMC-1991724 FREEDM-32P672 PM7380 21152 digital PCI9054 CPLD PLX PCI9054 plx 9054 cpld dma vhdl 12v relay interface with cpld in vhdl vhdl HDB3 hint hb1 Intel 21152 schematic motherboard architectur 96F8740
plx 9054

Abstract: optocoupler substitute book hcpl3700 HCPL-3700-300 PCI 9054 Detailed Technical Specifications HCPL-3700
Text: in the PLX 9054 device. Instead, they reside in a CPLD device that interfaces to the PLX 9054 through the Local bus. For the PLX 9054 the Local bus is configured in one of three ways: 1. M mode 2. C , Web: www.PICMG.ORG For a detailed explanation of the PLX PCI 9054 PCI Interface Chip and its characteristics, refer to the PCI 9054 Data Book (order No. 1030-54000-DTB) from: PLX Technology 390 Potrero Ave , versions of the PLX 9054 family and to ensure compatibility with future enhancements, write 0 to all unused


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PDF VMICPCI-1120 800-240-SRVC plx 9054 optocoupler substitute book hcpl3700 HCPL-3700-300 PCI 9054 Detailed Technical Specifications HCPL-3700
plx 9054

Abstract: logo PLC cables pin diagram siemens IL410 IL420 ejector header connector with diagram 10B5 4 channel triac opto optocoupler substitute book manual fuses fast triac burst control ic
Text: , the VMICPCI-2140 Channel Status registers do not reside in the PLX 9054 device. Instead, they reside in a CPLD device that interfaces to the PLX 9054 through the Local bus. For the PLX 9054 the Local , Web: http://www.PICMG.ORG For a detailed explanation of the PLX PCI 9054 Interface IC, refer to the PCI 9054 Data Book Version 1.0 Order Number: 1030-54000-DTB from: PLX Technology, INC. 390 Potrero , PCI requirements. The Base Address of the PLX 9054 is located at offset $10 (Base Address 0) of the


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PDF VMICPCI-2140 800-240-SRVC plx 9054 logo PLC cables pin diagram siemens IL410 IL420 ejector header connector with diagram 10B5 4 channel triac opto optocoupler substitute book manual fuses fast triac burst control ic
2004 - plx 9054 fpga dma vhdl

Abstract: 8114RDK vhdl code for pci 9056 mpc 9700 plx vhdl code PCI9080-3 plx 9030 plx 9052 PCI 6140-AA33PC G PCI 9656 schematic
Text: PLX Technology The Leading Supplier of Standard I/O Interconnect Silicon PRODUCT GUIDE/LINECARD VERSION 2.0, 2004 PLX Technology, Inc. (www.plxtech.com), is the leading supplier of standard I/O , . Offering the industry's most extensive I/O interconnect product line, PLX has a solution for your every , 32-bit 33/66MHz; 64-bit 33/66MHz; 64-bit 133MHz and beyond. PLX ® has added to its portfolio new high performance switches and bridges based on the PCI ExpressTM architecture. And, PLX offers a


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PDF 32-bit 33/66MHz; 64-bit plx 9054 fpga dma vhdl 8114RDK vhdl code for pci 9056 mpc 9700 plx vhdl code PCI9080-3 plx 9030 plx 9052 PCI 6140-AA33PC G PCI 9656 schematic
2001 - verilog code for EEPROM Controller

Abstract: verilog code 16 bit processor eeprom 2064 orcad flash controller verilog code MPC860 pci schematics PICMG 2.0 R3.0 SRAM controller verilog code for Flash controller
Text: ­ Supports 32-bit, 50MHz PowerQUICC bus EEPROM, 8.5 MB Flash, and 64MB SDRAM s CPLD Local , ports s PLX Option Module (POM) expansion connector s MPC860 BDM development port s , s CPLD memory controller Verilog source code s All hardware manuals in PDF format , Development Aid The PLX CompactPCI 9056RDK-860 RDK provides a comprehensive PCI 9056 design and development , combination. The CompactPCI 9056RDK-860's software and hardware registers are backward-compatible with PLX


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PDF 9056RDK-860 32-bit, 66MHz 50MHz 512KB RS-232 MPC860 9056/860-RDK-PB-P1-1 verilog code for EEPROM Controller verilog code 16 bit processor eeprom 2064 orcad flash controller verilog code MPC860 pci schematics PICMG 2.0 R3.0 SRAM controller verilog code for Flash controller
1998 - MPC860

Abstract: PCI9054
Text: /second. The PCI 9054 incorporates PLX 's industry leading Data Pipe ArchitectureTM including DMA , 9054 provides an advanced Data Pipe ArchitectureTM with two DMA engines, an enhanced direct-connect , , the PCI 9054 also offers Hot Plug compatibility, power management and incorporates PLX 's proven , MPC860 MEM IDMA 2 PCI 9054 I/O Accelerator Local Bus DMA 0 DMA 1 PCI Bus s , control of the IDMA handshake protocol. 2 At the same time, the PCI 9054 Data Pipe ArchitectureTM DMA


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PDF 32-bit 33MHz 132Mbytes/second MPC860 9054-SIL-PB-0-1 PCI9054
2001 - verilog code 16 bit processor

Abstract: PCI 9656 schematic flash controller verilog code PCI 9656 verilog eeprom 2064 MPC860 MPC860T verilog code for Flash controller 9656RDK-860
Text: ­ Supports 32-bit, 50MHz PowerQUICC bus EEPROM, 8.5 MB Flash, and 64MB SDRAM s CPLD Local , ports s PLX Option Module (POM) expansion connector s MPC860 BDM development port s , s CPLD Memory controller Verilog source code s All hardware manuals in PDF format , Development Aid The PLX CompactPCI 9656RDK-860 RDK provides a comprehensive PCI 9656 design and development , with PLX 's CompactPCI 9054RDK-860, allowing designers to migrate their existing 32-bit, 33MHz PCI bus


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PDF 9656RDK-860 64-bit, 66MHz 32-bit, 50MHz 512KB RS-232 MPC860 9656/860-RDK-PB-P1-1 verilog code 16 bit processor PCI 9656 schematic flash controller verilog code PCI 9656 verilog eeprom 2064 MPC860 MPC860T verilog code for Flash controller 9656RDK-860
LAD1 12v 8 pin relay

Abstract: 23a1ad relay lad1 lad1 12v relay CJD1 lm 5532 Intel i960J Conversion from PCI 9054 AB to AC
Text: Features PCI 9054 Data Book In te rn a l R e g is te rs PCI C onfig. Local C onfig. R u ntim e DMA , /G athe r U n alig ned X fe r PCI 9054 Internal Block Diagram © PLX Technology, Inc., 1998 , .2 implementation enabling Burst transfers up to 132 MB/second. The PCI 9054 incorporates the industry leading PLX , IDMA handshake protocol. At the same time, the PCI 9054 Data Pipe Architecture technology DMA can be , End of Transfer (EOT) mode. The PCI 9054 supports Demand Mode DMA for DMA Channel 0. PCI Host


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PDF 176-pin 225-pin MPC850 MPC860 PPC401 32-bit 32-bit, 33-MHz LAD1 12v 8 pin relay 23a1ad relay lad1 lad1 12v relay CJD1 lm 5532 Intel i960J Conversion from PCI 9054 AB to AC
1999 - PPC401

Abstract: Nippon capacitors radial book
Text: PCI 9054 T E C H N O L O G Y ® © 1999 PLX Technology, Inc. All rights reserved. PLX , have minor variations to this publication, known as errata. PLX assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of PLX products. PLX Technology and the PLX logo are registered trademarks of PLX Technology, Inc. Other brands and names are the property of their respective owners. Order Number: 1030-54000-DTB Printed in the USA/0499 PCI 9054


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PDF 1030-54000-DTB USA/0499 PPC401 Nippon capacitors radial book
2001 - MPC860

Abstract: No abstract text available
Text: advanced and highest performance PCI-to-Local bus devices, PLX is offering the PCI 9054 Bus Master I/O , to 132Mbytes/second. The PCI 9054 incorporates PLX 's industry leading Data Pipe ArchitectureTM , , the PCI 9054 Data Pipe ArchitectureTM DMA can be operated bi-directionally, with the PCI 9054 as the , I 2O. The PCI 9054 is fully compatible with PLX 's PCI SDK and I 2O SDK software development kits , PCI 9054 PCI Bus Master I/O Accelerator Chip Highlights s PCI v2.2 compliant 32-bit 33MHz


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PDF 32-bit 33MHz 132Mbytes/second MPC860 9054-SIL-PB-P2-2
2001 - MPC860

Abstract: No abstract text available
Text: advanced and highest performance PCI-to-Local bus devices, PLX is offering the PCI 9054 Bus Master I/O , to 132Mbytes/second. The PCI 9054 incorporates PLX 's industry leading Data Pipe ArchitectureTM , , the PCI 9054 Data Pipe ArchitectureTM DMA can be operated bi-directionally, with the PCI 9054 as the , PCI 9054 PCI Bus Master I/O Accelerator Chip Highlights s PCI v2.2 compliant 32-bit 33MHz , Purpose Bus Master Interface featuring an advanced Data Pipe ArchitectureTM which includes two DMA


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PDF 32-bit 33MHz 132Mbytes/second MPC860 9054-SIL-PB-P2-2
93CS66L

Abstract: LAD1 12v 8 pin relay PLX PCI9054 SD card V2.0 Physical Layer Spec MC 9080 ali 3511 plx 9054 relay lad1 PCI 9054-AC50PI pci 9054
Text: PCI 9054 Data Book v2.0 © PLX , Enables (J PCI 9054 Data Book v2.0 © PLX , -4 PCI 9054 Data Book v2.0 © PLX Technology, Inc. All rights reserved. xi PCI 9054 Data Book v2 , 9054 Data Book v2.0 © PLX Technology, Inc. All rights reserved. xiii Figures 5-6. PCI Target PCI v2 , (Underside View).14-6 xiv PCI 9054 Data Book v2.0 © PLX Technology


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PDF 9054-SIL-DB-P1-2 USA/0899 32-bit, 33-MHz 176-pin 225-pin 9054-AB50PI 225-pin 9054-AB50BI 93CS66L LAD1 12v 8 pin relay PLX PCI9054 SD card V2.0 Physical Layer Spec MC 9080 ali 3511 plx 9054 relay lad1 PCI 9054-AC50PI pci 9054
2005 - PCI9054-AC50PI

Abstract: PCI 9054-AC50PI PCI9054-AC50VPI pci9054ac50pif PCI9054-AC50PIF PCI9054-AC50-PIF pci9054-ac50pi f PCI9054-AC PCI9054AC-50 PCI9054AC50VPI
Text: 9054 Data Book v2.1 © PLX Technology, Inc. All rights reserved. v Contents 2.2.4. Wait State , 4-1 4-1 4-1 4-1 4-1 4-2 4-2 4-2 4-2 4-2 PCI 9054 Data Book v2.1 © PLX Technology, Inc. All rights , . 6-1 6-1 6-1 6-2 6-2 6-2 6-2 6-3 6-3 6-3 6-3 6-3 6-3 6-4 6-4 PCI 9054 Data Book v2.1 © PLX , PCI 9054 Data Book PCI 9054 Data Book Version 2.1 January 2000 Website: http://www.plxtech.com Email: apps@plxtech.com Phone: 408 774-9060 800 759-3735 FAX: 408 774-2169 2000 PLX


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PDF 9054-SIL-DB-P1-2 AC50PI QFP21) 9054AC-SIL-AD-P0-2 PCI9054-AC50PI PCI 9054-AC50PI PCI9054-AC50VPI pci9054ac50pif PCI9054-AC50PIF PCI9054-AC50-PIF pci9054-ac50pi f PCI9054-AC PCI9054AC-50 PCI9054AC50VPI
2000 - plx 9054

Abstract: 93CS66L NM93CS56L nand32 PPC401 NM93CS66L MPC860 MPC850 93CS56L LAD14
Text: PCI 9054 Data Book v2.1 © PLX Technology, Inc. All rights reserved. 2-1 2-1 2-1 2-1 2-1 2-2 , 3-7 PCI 9054 Data Book v2.1 vi © PLX Technology, Inc. All rights reserved. Contents 3.4.2 , 5-6 5-6 5-8 5-8 5-9 5-9 5-9 PCI 9054 Data Book v2.1 viii © PLX Technology, Inc. All , . . . . . . . . PCI 9054 Data Book v2.1 © PLX Technology, Inc. All rights reserved. 6-1 6-1 , PCI 9054 Data Book v2.1 x © PLX Technology, Inc. All rights reserved. Contents 11


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PDF 9054-SIL-DB-P1-2 Index-24 plx 9054 93CS66L NM93CS56L nand32 PPC401 NM93CS66L MPC860 MPC850 93CS56L LAD14
plx 9054

Abstract: plxtechnology tp 9054 333CJ PLX PCI9054 pci 9054 PC19054 MPC8S RELAY lad1 eeprom d4x
Text: 9054 Internal Block Diagram © PLX Technology, Inc., 1998 Page 2 Version 1.0 This Material , 9054 I/O Accelerator 1. COMPANY AND PRODUCT BACKGROUND PLX Technology, Inc., the world leader in , incorporates the industry leading PLX Data Pipe Architecture™ technology, including DMA engines, programmable , Architecture technology DMA can be operated bidirectionally, with the PCI 9054 as the Master for both buses, to , be used during PCI 9054 PCI Bus Master operation ( DMA , Direct Master). PCI Hot Plug and CompactPCI


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PDF 32-bit, 33-MHz 32-bit 176-pin 225-pin 9054-AA50PI 225-pin 9054-AA50BI plx 9054 plxtechnology tp 9054 333CJ PLX PCI9054 pci 9054 PC19054 MPC8S RELAY lad1 eeprom d4x
2001 - PCI 9054-AB50PI

Abstract: MPC860 pci schematics
Text: PCI 9054RDK-860 PCI 9054 and MPC860 Rapid Development Kit Features s PCI v2.2 compliant PCI adapter board based on the powerful PLX PCI 9054 Bus Master I/O Accelerator chip with direct connect , for the Motorola MPC860 Based on the powerful combination of the PLX PCI 9054 Bus Master I/O , MPC860 processor. At the heart of the RDK is the PLX PCI 9054 Bus Master I/O Accelerator which supports , implementation enabling burst transfers up to 132 Mbytes/second. The PCI 9054 incorporates PLX 's industry


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PDF 9054RDK-860 MPC860 MPC860 50MHz 9054/860-RDK-PB-PI-4 PCI 9054-AB50PI pci schematics
2001 - backplane design pci

Abstract: PCI 9656 schematic MPC8260 9610s pci plx 9656 motorola PCI 3 modem schematics
Text: incorporates PLX 's industry leading Data Pipe Architecture technology, featuring DMA engines, programmable , 528 MB/sec s 4 DMA Channels ­ Block Mode ­ Scatter/Gather transfers ­ DMA descriptor ring , -bit, 66MHz direct-connect interface to the MPC8260, an advanced Data Pipe ArchitectureTM with four DMA , ever increasing I/O demands of leading edge embedded systems, PLX continues to provide leading edge , the industry-leading PCI 9054 , the PCI 9610 offers a variety of technological advances designed to


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PDF 64-bit, 66MHz 603e/740/750-compatible 416-ball, 9610-SIL-PB-P1-3 backplane design pci PCI 9656 schematic MPC8260 9610s pci plx 9656 motorola PCI 3 modem schematics
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