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Part Manufacturer Description Datasheet Download Buy Part
LTC2938HDE#PBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: DFN; Pins: 12; Temperature Range: -40°C to 125°C
LTC2939HMS#PBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: -40°C to 125°C
LTC2938CMS#TRPBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 12; Temperature Range: 0°C to 70°C
LTC2939CMS#TRPBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: 0°C to 70°C
LTC2938CMS#PBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 12; Temperature Range: 0°C to 70°C
LTC2939CMS#PBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: 0°C to 70°C

pin configuration of 7474 ic Datasheets Context Search

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pin DIAGRAM OF IC 7474

Abstract: ic 7474 pin diagram 7474 ic pin configuration IC 7474 pin configuration pin IC 7474 logic ic 7474 pin diagram 74s74n pin configuration of 7474 ic ic 7474 IC 7474 flipflop
Text: delay time for reliable operation. T Y PE 7474 74L S 74A 74S 74 NOTE: T Y P IC A L f , AX 25M H z 33M , and -0 .4 m A i|L PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) 4 10 Roi I , Signetics 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification Logic , e t (R D) are asynchro nous active-LO W inputs and operate independently of the Clock input. Infor m ation on the D ata (D) input is trans ferred to th e Q output on th e LO W -toH IG H transition of the


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PDF LS74A, 500ns 1N916, 1N3064, pin DIAGRAM OF IC 7474 ic 7474 pin diagram 7474 ic pin configuration IC 7474 pin configuration pin IC 7474 logic ic 7474 pin diagram 74s74n pin configuration of 7474 ic ic 7474 IC 7474 flipflop
2012 - 7474 14 PIN

Abstract: 7474 pin configuration 7474 7474 PIN DIAGRAM
Text: , Aeronautics & Aerospace  Harsh Environments Package and Pin Configuration DIL14 Q1 5 10 , RN1 6 C1 16 1 4 D1 1 Symbol 2 Rn1 Pin D2 Input of D-flip-flop 2 , -080211 V03.2 WWW.CISSOID.COM 3 of 11 1-Oct-12 Contact CHT- 7474 DATASHEET : Gonzalo Picún , WWW.CISSOID.COM ns ns ns ns ns MHz 5 of 11 1-Oct-12 Contact CHT- 7474 DATASHEET , WWW.CISSOID.COM 7 of 11 1-Oct-12 Contact CHT- 7474 DATASHEET : Gonzalo Picún (+32-10-489214)Oct. 12


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PDF CHT-7474 1-Oct-12 CDIL14) CSOIC16) DS-080211 7474 14 PIN 7474 pin configuration 7474 7474 PIN DIAGRAM
7474 D flip-flop circuit diagram

Abstract: 7474 D flip-flop 7474 LS 7474 ls 7474 74S74 74ls74a
Text: (h and -0.4m A l|L. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) "D 1 OE D, OE , Signetjcs 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification Logic , e t (R D) are asynchro nous active-L O W inputs and operate independently of the Clock input. Infor m ation on the D ata (D) input is trans ferred to the Q output on the LO W -toH IG H transition of , transition of the clock pulse betw een the 0 .8 V and 2 .0 V levels should be equal to or less than the


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PDF LS74A, 1N916, 1N3064, 500ns 500ns 7474 D flip-flop circuit diagram 7474 D flip-flop 7474 LS 7474 ls 7474 74S74 74ls74a
TTL 7474

Abstract: 7474 pin out diagram 7474 D flip-flop circuit diagram 7474 D flip-flop 7474 pin diagram of 7474 74LS74A pin out configuration 7474 j-k flip flop 7474 pin configuration pin configuration of d flip flip 7474
Text: 74LS unit load (LSul) is 20jja l,H and -0.4mA l,L PIN CONFIGURATION LOGIC SYMBOL s», m jH'cc d , (SD) and Reset (RD) are asynchronous active-LOW inputs and operate independently of the Clock input. Information on the Data (D) input is transferred to the Q output on the LOW-to-HIGH transition of the clock , predictable operation. Although the Clock input is level-sensitive, the positive transition of the clock pulse , reliable operation. 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification TYPE TYPICAL


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PDF LS74A, 1N916, 1N3064, 500ns TTL 7474 7474 pin out diagram 7474 D flip-flop circuit diagram 7474 D flip-flop 7474 pin diagram of 7474 74LS74A pin out configuration 7474 j-k flip flop 7474 pin configuration pin configuration of d flip flip 7474
7474 pin out diagram

Abstract: TTL 7474 7474 D flip-flop circuit diagram 74LS74A pin out configuration specifications 7474 7474 7474 ttl Flip-Flops 7474 7474 pin configuration 7474 D flip-flop
Text: .4 m A In. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) *o i OE D iH cM J *oi , Signetics 7474 , LS74A, S74 Flip-Flops Dual D-Type Flip-Flop Product Specification Logic , asynchro nous active-LOW inputs and operate independently of the Clock input. Infor mation on the Data (D) input is trans ferred to the Q output on the LOW-toHIGH transition of the clock pulse. The D inputs must , . Although the Clock input is level-sensitive, the positive transition of the clock pulse between the 0.8V


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PDF LS74A, 500ns 500ns 1N916, 1N3064, 7474 pin out diagram TTL 7474 7474 D flip-flop circuit diagram 74LS74A pin out configuration specifications 7474 7474 7474 ttl Flip-Flops 7474 7474 pin configuration 7474 D flip-flop
TTL 7474

Abstract: 7474 pin configuration 7474 D flip-flop circuit diagram pin diagram of 7474 7474 7474 PIN DIAGRAM LS74A 8XC660 7474 D flip-flop 74574
Text: 74LS unit load (LSul) is 20jjA I!h and -0.4mA l,L. PIN CONFIGURATION LOGIC SYMBOL "oí n 33 vcc , (3d) and Reset (RD) are asynchronous active-LOW inputs and operate independently of the Clock input. Information on the Data (D) input is transferred to the Q output on the LOW-to-HIGH transition of the clock , predictable operation. Although the Clock input is level-sensitive, the positive transition of the clock pulse , reliable operation. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 7474 , LS74A, S74 Flip-Flops Dual D-Type


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PDF 1N916, 1N3064, 500ns TTL 7474 7474 pin configuration 7474 D flip-flop circuit diagram pin diagram of 7474 7474 7474 PIN DIAGRAM LS74A 8XC660 7474 D flip-flop 74574
2003 - 7474 14 PIN

Abstract: Am29BDD160GB
Text: generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin , changed Persistent Sector Protection - A command sector protection method to lock combinations of , combinations of individual sectors and sector groups to prevent program or erase operations within that sector , performance processor - Modes of Burst Read Operation: - Linear Burst: 4 double words (x32), 8 words (x16 , operations Data# Polling and toggle bits - Provides a software method of detecting program or erase


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PDF Am29BDD160G 16-Bit/512 32-Bit) 7474 14 PIN Am29BDD160GB
2002 - 7474

Abstract: 98P03ABK
Text: generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin , changed Persistent Sector Protection - A command sector protection method to lock combinations of , combinations of individual sectors and sector groups to prevent program or erase operations within that sector , performance processor - Modes of Burst Read Operation: - Linear Burst: 4 double words (x32), 8 words (x16 , method of detecting program or erase operation completion Single power supply operation - Optimized


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PDF Am29BDD160G 16-Bit/512 32-Bit) 7474 98P03ABK
2003 - 25091

Abstract: No abstract text available
Text: generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin , changed Persistent Sector Protection - A command sector protection method to lock combinations of , combinations of individual sectors and sector groups to prevent program or erase operations within that sector , performance processor - Modes of Burst Read Operation: - Linear Burst: 4 double words (x32), 8 words (x16 , operations Data# Polling and toggle bits - Provides a software method of detecting program or erase


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PDF Am29BDD160G 16-Bit/512 32-Bit) 20anged 25091
2003 - am29f 512 K x 16-bit

Abstract: JC42
Text: . Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and Fujitsu. Continuity of Specifications There is no change to this datasheet as a result of offering the device as a Spansion product. Any changes that have been made are the result of normal datasheet improvement and are noted in the document , be noted in a revision summary. Continuity of Ordering Part Numbers AMD and Fujitsu continue to


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PDF Am29BDD160G am29f 512 K x 16-bit JC42
2004 - Not Available

Abstract: No abstract text available
Text: overshoot VSS to ­2.0 V for periods of up to 20 ns. See Figure 13. Maximum DC input voltage on pin A9 and OE , the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and Fujitsu. Continuity of Specifications There is no change to this datasheet as a result of offering the device as a Spansion product. Any changes that have been made are the result of normal datasheet improvement and are noted in the document revision summary


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PDF Am29BDD160G
1999 - 7474 D flip-flop

Abstract: 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram ICL7103A zestron reed relay 7474 for shift register 2N2007 shift register by using D flip-flop 7474 application notes 74121 7474 D flip-flop circuit diagram zestron 278
Text: anode pin of its respective 7 segment display. The position of the zero bit in the shaft register and , auto-ranging is necessary. 6 The 7474 D flip-flop controls the 3 1/2 - 4 1/2 digit mode of the ICL7103A , errors to the system. The development of LSI A/D converters has carved the pathway for a new category of low cost, accurate digital panel meters (DPM) and digital multimeters (DMM). The ICL7103A and ICL8052A A/D pair represents an excellent example of this new breed of converter products available today


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PDF ICL7103A/ICL8052A AN028 ICL7103A ICL8052A 7474 D flip-flop 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram zestron reed relay 7474 for shift register 2N2007 shift register by using D flip-flop 7474 application notes 74121 7474 D flip-flop circuit diagram zestron 278
2012 - 7474 truth table

Abstract: 7474 applications capacitor 1.8ghz 100pF 0402 gsm antenna switch
Text: 0.9GHz, PIN =+35dBm, CW1 1.8GHz, PIN =+33dBm, CW1 0.9GHz, PIN =+35dBm, CW1 1.8GHz, PIN =+33dBm, CW1 10% to 90% RF and 90% to 10% RF, PIN =0dBm 50% to 90% RF and 50% to 90% RF, PIN =0dBm 0.9GHz, PIN =+35dBm, VCTRL =0V to 2.7V 1.8GHz, PIN =0dBm, VCTRL =0V to 2.7V 0.01 0.01 12 1.3 Note: 1Measured , TOTAL RADIOTM and UltimateBlueTM are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by , trademarks are the property of their respective owners. ©2012, RF Micro Devices, Inc. DS120621 7628


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PDF FMS2028 FMS2028 DS120621 FMS2028-000 FMS2028-000SQ FMS2028-000S3 7474 truth table 7474 applications capacitor 1.8ghz 100pF 0402 gsm antenna switch
2012 - Not Available

Abstract: No abstract text available
Text: -70 dBc 1.8GHz, PIN =+33dBm, CW1 -70 -65 dBc 0.9GHz, PIN =+35dBm, CW1 -72 55 45 55 55 0.9GHz, PIN =+35dBm, CW1 -65 dBc 1.8GHz, PIN =+33dBm, CW1 Switching Speed 0.3 s 10% to 90% RF and 90% to 10% RF, PIN =0dBm Control Current s A 50% to 90% RF and 50% to 90% RF, PIN =0dBm 0.9GHz, PIN =+35dBm, VCTRL =0V to 2.7V A 1.8GHz, PIN , „¢ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc


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PDF FMS2028 FMS2028 DS120621 FMS2028-000 FMS2028-000SQ FMS2028-000S3
2001 - Multiplexer 74157 application

Abstract: 7474 D flip-flop circuit diagram circuit diagram of ddr ram 74157 RAM circuit diagram ELPIDA DDR manual 74157 pin diagram E0124N sdram controller ELPIDA SDRAM User Manual
Text: those of FPM DRAM, instead of SDRAM, which has different package pin configuration and interface. If , to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin , .21 Table 1-5. List of Pin Functions , , since EDO DRAM and FPM DRAM are compatible DRAM that have packages with the same pin configuration , EDO , capable of operation at higher operating frequency than EDO DRAM is. SDRAM, however, has package pin


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PDF E0124N10 M12394EJ2V2AN00) Multiplexer 74157 application 7474 D flip-flop circuit diagram circuit diagram of ddr ram 74157 RAM circuit diagram ELPIDA DDR manual 74157 pin diagram E0124N sdram controller ELPIDA SDRAM User Manual
melody chip

Abstract: 7474 PIN DIAGRAM pin diagram of 7474 pin diagram 7474 7474 chip the happy organ transistor organ c5481 SONG11 piezo modulator circuit diagram
Text: capable of generating a maximum of 16 songs with 3 instrument effects: piano, organ and mandolin, which , Pre-amplifier •9 PA1 PA2 PIN DESCRIPTION Symbol Description ENV Enveloped song effect can be adjusted by connecting external RC circuit to this pin . OSCI OSC2 A resistor is connected across these pins to adjust the , end of play. NS Plays one for input high and all songs for input low. NC For testing only, left open for normal operation. SL Change to the next song when a rising edge is applied to this pin . REP The


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PDF C5481 melody chip 7474 PIN DIAGRAM pin diagram of 7474 pin diagram 7474 7474 chip the happy organ transistor organ SONG11 piezo modulator circuit diagram
2008 - 7474 truth table

Abstract: CW-37 7474 applications MIL-HDBK-263
Text: Harmonic Level 0.9 GHz, Pin = +35 dBm, CW (2) 1.8 GHz, Pin = +33 dBm, CW (2) -100 -100 -80 -80 -70 -70 dBc dBc 3rd Harmonic Level 0.9 GHz, Pin = +35 dBm, CW (2) 1.8 GHz, Pin = , % RF and 90% to 10% RF, Pin = 0 dBm 50% control to 90% RF and 50% control to 90% RF, Pin = 0 dBm ­­ ­­ 0.3 µs ­­ ­­ 1 µs Vctrl = 0 / 2.7 V, Pin = 35 dBm, 0.9 GHz Vctrl = 0 / 2.7 V, Pin = 0 dBm, 1.8 GHz 0.01 0.01 12 1.3 40 10 µA µA Control Current Note 1


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PDF FMS2028 FMS2028 FMS2028-000-FF FMS2028-000-WP FMS2028-000-EB 7474 truth table CW-37 7474 applications MIL-HDBK-263
1999 - ICL7103A

Abstract: zestron reed relay 2N2007 ICL7103 7474 D flip-flop application notes 74121 7474 D flip-flop circuit diagram 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram shift register by using D flip-flop 7474 74121 application as pulse generator
Text: anode pin of its respective 7 segment display. The position of the zero bit in the shaft register and , auto-ranging is necessary. 6 The 7474 D flip-flop controls the 3 1/2 - 4 1/2 digit mode of the ICL7103A , errors to the system. The development of LSI A/D converters has carved the pathway for a new category of low cost, accurate digital panel meters (DPM) and digital multimeters (DMM). The ICL7103A and ICL8052A A/D pair represents an excellent example of this new breed of converter products available today


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PDF ICL7103A/ICL8052A AN028 ICL7103A ICL8052A zestron reed relay 2N2007 ICL7103 7474 D flip-flop application notes 74121 7474 D flip-flop circuit diagram 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram shift register by using D flip-flop 7474 74121 application as pulse generator
Not Available

Abstract: No abstract text available
Text: . Phase Input: The phase input terminal, pin 18, controls the direction of the current through the motor , terminal ( pin 11) provides a means of continuously varying the cur­ rent for situations requiring , determined by the reference voltage together with the value of the external sense resistor Rs ( pin 16). , until a current reverse command is given. By reversing the logic level of the phase input ( pin 8 , Schottky Commutating Diodes Wide Range of Current Control 5-1000mA Wide Voltage Range 10-45V Designed


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PDF UC1717 UC3717 5-1000mA 0-45V UC3717 UC3717S -r-001
ic 7483 BCD adder

Abstract: 9N01 ic 7483 full adder IC 7490 pin configuration function of ic 7490 9N03 TIC 8213 7401 ic configuration pin configuration of ic 7492 Fairchild 9311
Text: operation is perform ed on the negative going edge o f the clock pulse. LOG IC SY M B O L 4 10 3 11 LOG IC D IA G R A M 93176/54176, 74176 Pin nu m b ers are show n fo r D IP o n ly . CO , PHILIPS FAIRCHILD PIN FOR PIN REPLACEMENT 9N74, 7474 9390,7490 9391,7491 9375,7475 9N76, 7476 9393,7493 , Function Type No. Description Number of Bits t pd ns 9380 9304 93H183 9382 9383 9340 93 L 40 9341 93S41 , divide-by-tw o and divide-by-five configuration , or in the bi-quinary mode. The 9 3 1 77/54177, 74177 can be


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PDF 93H183 93S41 93S42 93L24 93S62 93H87 8-20LENT 9N107, FJH101 FJH111 ic 7483 BCD adder 9N01 ic 7483 full adder IC 7490 pin configuration function of ic 7490 9N03 TIC 8213 7401 ic configuration pin configuration of ic 7492 Fairchild 9311
2006 - 7474 truth table

Abstract: 65X65 MIL-HDBK-263 MICRO TX1 capacitor 1.8ghz 100pF 0402
Text: 0.9GHz, CW -70 dB dB dB dB dB dB dB dB dB dB dB dBm dBc -70 dBc 1.8GHz, PIN =+33dBm, CW1 -70 -65 dBc 0.9GHz, PIN =+35dBm, CW1 -72 55 45 55 55 0.9GHz, PIN =+35dBm, CW1 -65 dBc 1.8GHz, PIN =+33dBm, CW1 Switching Speed 0.3 s 10% to 90% RF and 90% to 10% RF, PIN =0dBm Control Current s A 50% to 90% RF and 50% to 90% RF, PIN =0dBm 0.9GHz, PIN =+35dBm, VCTRL =0V to 2.7V A 1.8GHz, PIN =0dBm, VCTRL =0V to 2.7V 0.01 12 1


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PDF FMS2028 FMS2028 FMS2028-000 DS090519 FMS2028-000SQ FMS2028-000S3 7474 truth table 65X65 MIL-HDBK-263 MICRO TX1 capacitor 1.8ghz 100pF 0402
7474 truth table

Abstract: MIL-HDBK-263
Text: 2nd Harmonic Level 0.9 GHz, Pin = +35 dBm, CW (2) 1.8 GHz, Pin = +33 dBm, CW (2) -100 -100 -80 -80 -70 -70 dBc dBc 3rd Harmonic Level 0.9 GHz, Pin = +35 dBm, CW (2) 1.8 GHz, Pin , % RF and 90% to 10% RF, Pin = 0 dBm 50% control to 90% RF and 50% control to 90% RF, Pin = 0 dBm ­­ ­­ 0.3 µs ­­ ­­ 1 µs Vctrl = 0 / 2.7 V, Pin = 35 dBm, 0.9 GHz Vctrl = 0 / 2.7 V, Pin = 0 dBm, 1.8 GHz 0.01 0.01 12 1.3 40 4 µA µA Control Current Note 1


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PDF FMS2028 FMS2028 FMS2028-000-FF FMS2028-000-WP FMS2028-000-EB 7474 truth table MIL-HDBK-263
Not Available

Abstract: No abstract text available
Text: V oltage ( Pin 1, 15) Output Stage: The output stage consists of four Dar­ lington transistors , , pin 18, controls the direction of the current through the motor winding. The Schmidt-Trigger input , the timing terminal ( pin 2). The reference terminal ( pin 11) provides a means of continuously varying , of the external sense resistor Rs ( pin 16). Single-Pulse Generator: The pulse generator is a , logic level of the phase input ( pin 8), both active transistors are being turned off and the opposite


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PDF UC3717 5-1000mA 0-45V UC1717SP UC3717 T34flSn DD132T3
ttl 7474 sine wave

Abstract: 74590 INTERFACING OF SEVEN SEGMENT DISPLAY WITH 8051 74ls221 circuits diagram frequency counter using 8051 voltage frequency table ad654 ICM7208 74ls04 hex inverter 74LS04* hEX INVERTER MC6801
Text: divides the 1.2288MHz signal by 214, which results in a 75Hz signal being fed into Pin 3 of the 7474 . The , Pin 3 and Pin 5 waveforms sketched in Figure 3 show that the width of either the high-level or low-level output appearing at Pin 5 is the same as one period of the AD650 output frequency. Note also that , set via software. Thus, connecting the "Q" output of the SN7474 to the INTO pin on the 8051 will , in software being set in the middle of a high-level edge at the INTO pin . In this case. Timer 0 would


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PDF AN-276 ttl 7474 sine wave 74590 INTERFACING OF SEVEN SEGMENT DISPLAY WITH 8051 74ls221 circuits diagram frequency counter using 8051 voltage frequency table ad654 ICM7208 74ls04 hex inverter 74LS04* hEX INVERTER MC6801
C2717

Abstract: 7474 pin out diagram 7474 pin configuration L298 H-bridge motor drive pin diagram of 7474 Stepper Motors START-STOP circuit Stepping Motors diagram three phase pulse generator wind continental acceleration sensor
Text: Input: The phase input terminal, pin 18, controls the direction of the current through the motor winding , voltage together with the value of the external sense resistor Rs ( pin 16). Single-Pulse Generator: The , reverse command is given. By reversing the logic level of the phase input ( pin 8), both active transistors , Constant Current Motor Drive Built-in Fast Recovery Schottky Commutating Diodes Wide Range of Current , 3717 DESCRIPTION The UC3717 has been designed to control and drive the current in one winding of a


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PDF 5-1000mA 0-45V UC3717 UC3717s UC3717N UC1717J UC1717SP UC1717 UC2717 UC3717 C2717 7474 pin out diagram 7474 pin configuration L298 H-bridge motor drive pin diagram of 7474 Stepper Motors START-STOP circuit Stepping Motors diagram three phase pulse generator wind continental acceleration sensor
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