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    DSA0059723.pdf

    • Alliance Semiconductor
    • April 2001 AS4LC4M4E1 ® 4Mx4 CMOS DRAM (EDO)3.3V Family Features · Refresh - 2048 refresh cycles, 32 ms refresh interval - RAS-only or CAS-before-RAS refresh or self-refresh · TTL-compatib
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