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    DSA005573.pdf

    • PhaseLink
    • PLL500-17 Low Phase Noise VCXO (17MHz to 36MHz) FEATURES · · VCXO output for the 17MHz to 36MHz range Low phase noise (-130 dBc @ 10kHz offset at 35.328MHz). CMOS output with OE tri-state co
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    DSA005573.pdf preview Download Datasheet

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    F MARKING 6PIN marking 6pin PS P500-17 PLL500-17 PLL500-17DC PLL500-17SC PLL500-17SC-R PLL500-17SCL PLL500-17SCL-R PLL500-17TC PLL500-17TC-R PLL500-17TCL
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