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    DSAIH00011755.pdf

    • Alliance Semiconductor
    • February 2001 Advance Information AS4LC4M4E0 AS4LC4M4E1 ® 4Mx4 CMOS DRAM (EDO) Family Features • Refresh - 4096 refresh cycles, 64 ms refresh interval for AS4LC4M4E0 - 2048 refresh cyc
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