DSA0058126.pdf
-
Cypress Semiconductor
-
CY7C335
Universal Synchronous EPLD
-- 2-ns input set-up and 9-ns output register clock to
output
Features
· 100-MHz output registered operation
· Twelve I/O macrocells, each having:
-- Regi
-
Original
-
Part pricing, stock, data attributes from Findchips.com