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Part Manufacturer Description Datasheet Download Buy Part
ISL55001IBZ-T7A Intersil Corporation High Supply Voltage 220MHz Unity-Gain Stable Operational Amplifier; SOIC8; Temp Range: -40° to 85°C
X5001S8IZ-4.5A Intersil Corporation CPU Supervisor; PDIP8, SOIC8; Temp Range: See Datasheet
X5001PIZ Intersil Corporation CPU Supervisor; PDIP8, SOIC8; Temp Range: See Datasheet
X5001S8Z-2.7A Intersil Corporation CPU Supervisor; PDIP8, SOIC8; Temp Range: See Datasheet
EL5001IREZ Intersil Corporation 6-Channel Clock Driver; TSSOP20; Temp Range: -40° to 85°C
X5001PIZ-2.7 Intersil Corporation CPU Supervisor; PDIP8, SOIC8; Temp Range: See Datasheet

nexus 5001 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1999 - IEEE-ISTO

Abstract: IEEE-ISTO 5001TM NEXUS5001 173298-1 5001TM-1999 A13dC NEXUS CONNECTOR telephone plug Nexus S nexus 5001 BWD0
Text: IEEE-ISTO 5001TM-1999 The Nexus 5001 ForumTM Standard for a Global Embedded Processor Debug , ://www.ieee-isto.org/ IEEE-ISTO 5001TM-1999 The Nexus 5001 ForumTM Standard for a Global Embedded Processor , group also changed its name to the Nexus 5001 ForumTM to reflect the submission of Version 1.0 of their , , The Nexus 5001 ForumTM Standard for a Global Embedded Processor Debug Interface. Abstract: A , Association. IEEE-ISTO 5001 and Nexus 5001 Forum are trademarks of the IEEE-ISTO. IEEE-ISTO 5001TM-1999


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PDF 5001TM-1999 1a-1993) IEEE-ISTO IEEE-ISTO 5001TM NEXUS5001 173298-1 5001TM-1999 A13dC NEXUS CONNECTOR telephone plug Nexus S nexus 5001 BWD0
1999 - MPC566

Abstract: IEEE-ISTO MPC565 calram mpc555 die MPC566 "pin compatible" NEXUS J1850 QADC64 MPC565 MPC500
Text: OVERVIEW Rev. 15 Oct 2000 MOTOROLA 1-12 The Nexus 5001 Forum, a program of the IEEE-ISTO The Nexus 5001 ForumTM, a Program of the IEEE-ISTO The Nexus 5001 ForumTM, formerly known as the Global , Nexus 5001 ForumTM Standard for a Global Embedded Processor Debug Interface is an open industry , processors. Members of the Nexus 5001 Forum may download IEEE-ISTO 5001TM -1999 from this site at no charge. The Nexus 5001 ForumTM c/o IEEE-ISTO 445 Hoes Lane PO Box 1331 Piscataway, NJ 08855-1331, USA


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PDF MPC565 MPC566 QADC64, MPC500 5001TM Nexus5001-info IEEE-ISTO MPC565 calram mpc555 die MPC566 "pin compatible" NEXUS J1850 QADC64
2008 - LQFP-64 footprint

Abstract: e200z0h stepper motor color code LQFP-176 footprint MPC5604S MPC5602S nexus 5001 MPC560xS MPC5606s LQFP 144 footprint
Text: be also features a high-performance Nexus 5001 the need for more headroom arise. The , scale your designs to fit your performance needs. · JTAG and Nexus 5001 interfaces · CAN and LIN , -pin MPC560xS has Nexus 5001TM debug access $150 · Software-controlled clock gating of peripherals ·


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PDF 32-bit MPC560xS MPC560XSFAMFS MPX560xS LQFP-64 footprint e200z0h stepper motor color code LQFP-176 footprint MPC5604S MPC5602S nexus 5001 MPC5606s LQFP 144 footprint
2010 - MPC5600

Abstract: AN3970 e200z4RM e200z446 Nexus S IEEE-ISTO e200z4 NEXUS e200z7 e200z759
Text: Nexus XBAR Slave SRAM Trace Client There are three versions of the IEEE-ISTO 5001 standard , Class 4 Advanced Debug features. In the Nexus 5001 standard, some features are optional but most , e200z4 and e200z7 cores support the 2010 version of the Nexus 5001 standard. 10. Data Acquisition , Support for the MPC5500 and MPC5600 Families IEEE-ISTO 5001-1999 The Nexus 5001 ForumTM Standard for a , IEEE-ISTO 5001-2003 The Nexus 5001 ForumTM Standard for a Global Embedded Processor Debug Interface


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PDF AN4088 MPC5500/MPC5600 MPC5500 MPC5600 5001TM AN3970 e200z4RM e200z446 Nexus S IEEE-ISTO e200z4 NEXUS e200z7 e200z759
2005 - MPC5602S

Abstract: e200z0h sram ecc xPC56XX motherboard service guide MPC5604S wVGA TFT LCD driver nexus 5001 MPC5606S eeprom emulation
Text: similar tools as Freescale's · JTAG and Nexus 5001 interfaces Qorivva MPC5500 products, offering a widespread, established network of tools and software vendors. It also features a highperformance Nexus 5001


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PDF 32-bit MPC560xS MPX560xS MPC560XSFAMFS MPC5602S e200z0h sram ecc xPC56XX motherboard service guide MPC5604S wVGA TFT LCD driver nexus 5001 MPC5606S eeprom emulation
2011 - Tms 3871

Abstract: LA-3736 Lauterbach LA-3500 la 7630 TMS 3834 LA7610 LA-7630 la7630 LA7636 MPC5744P
Text: References (continued) Document Title Availability IEEE-ISTO 5001-1999 The Nexus 5001 Forumâ , The Nexus 5001 Forum™ Standard for a Global Embedded Processor Debug Interface, Version 2.0 IEEE-ISTO 5001-2012 The Nexus 5001 Forum™ Standard for a Global Embedded Processor Debug Interface , (Instruction) Trace, Class 3 Data Trace, and Class 4 Advanced Debug features. In the Nexus 5001 standard, some , MPC57xx Nexus Trace Tools Including both parallel and serial (Aurora) trace protocols by: Randy


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PDF AN4591 MPC57xx Tms 3871 LA-3736 Lauterbach LA-3500 la 7630 TMS 3834 LA7610 LA-7630 la7630 LA7636 MPC5744P
2004 - MPC562

Abstract: MPC566 nexus 5001 MPC565 MPC564 freescale Automotive MPC555 MPC500 Motorola MPC555 IEEE-ISTO 5001TM
Text: offer MCUs that comply with the IEEE-ISTO Nexus 5001TM standard for Class 2- and Class 3-compliant devices. The Nexus Peripherals Members of the MPC500 Family also 5001 debug and calibration , handle complex at full speed. The Nexus 5001 specification is develop a set of intelligent


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2004 - Nexus S JTAG pins

Abstract: AN1983 AN1981 Super10 AN1982 NEXUS CONNECTOR nexus 5001 IEEE-ISTO 5001TM ST10 NEXUS JTAG CONNECTOR
Text: Signals Description The table below describes shortly each signal required in the Nexus 5001 ForumTM , a bidirectionnal pin. The Nexus 5001 ForumTM Standard advise tools vendors to implement (on the , STMicroelectronics. [8] The Nexus 5001TM Forum Standard for a Global Embedded Processor Debug Interface , NEXUS CLASS 1 COMPLIANT CONNECTOR . 7 , debug. ­ Embedded " Nexus " OCE based debug. (Refer to [8]). These solutions allow different levels of


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PDF AN1983 Super10 16-bit Nexus S JTAG pins AN1983 AN1981 AN1982 NEXUS CONNECTOR nexus 5001 IEEE-ISTO 5001TM ST10 NEXUS JTAG CONNECTOR
2008 - WPC8769LDG

Abstract: wpc8765ldg Nuvoton WPC8769L winbond wpc8769ldg WPC8769 WPC8765L WPC8769LA0DG voton CR16CPLUS
Text: to debugger via Nexus 5001 interface Physical connection using JTAG On-board Debug mode with


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PDF WPC8765L WPC8769L WPC8765L/WPC8769L CR16CPlus 16-bit WPC8769LDG wpc8765ldg Nuvoton winbond wpc8769ldg WPC8769 WPC8769LA0DG voton
2007 - WPC8768LDG

Abstract: WPC8769LDG winbond wpc8769ldg WPC8768L CR16Cp WPC8769 CR16CPLUS PC01 WPC8769L touch pad mouse
Text: Nexus 5001 interface Physical connection using JTAG Digital-to-Analog Converter (DAC) - Four


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PDF WPC8768L, WPC8769L WPC8768L WPC8768L/WPC8769L CR16CPlus 16-bit WPC8768LDG WPC8769LDG winbond wpc8769ldg CR16Cp WPC8769 PC01 touch pad mouse
2007 - WPC8769LDG

Abstract: No abstract text available
Text: – Development Support — Interface to debugger via Nexus 5001 interface ❏ Physical connection using JTAG


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PDF WPC8768L, WPC8769L WPC8768L event22F, WPC8769LDG
2004 - NEXUS JTAG CONNECTOR

Abstract: LA-3723 14 pin JTAG CONNECTOR e200z4 NEXUS CONNECTOR LA-3725 CON-JTAG14-MICTOR MPC555x e200z7 Mictor 38 connecter
Text: conform to the Nexus 5001 standard and may not be supported. 3. Not supported on all devices. This use of , MPC553x, MPC555x, and MPC556x Family Nexus Interface Connector MICTOR-38, Robust, and JTAG Connector , 5001TM-2003 Nexus standard (referred to as the Nexus standard) interface is an industry standard that crosses , address bus. The Nexus standard defines a minimum feature set that must be implemented. To simplify , requirements are divided into four classes. · Nexus Class 1 defines basic run control capabilities that must


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PDF AN2614 18/March/2010 MPC553x, MPC555x, MPC556x MICTOR-38, 5001TM-2003 NEXUS JTAG CONNECTOR LA-3723 14 pin JTAG CONNECTOR e200z4 NEXUS CONNECTOR LA-3725 CON-JTAG14-MICTOR MPC555x e200z7 Mictor 38 connecter
2013 - e200z7

Abstract: MPC57xx instruction set e200z420n3 MPC5777M freescale mpc5777M MPC5744P MPC5775 MPC5775K
Text: package to allow it to be accessed. Nexus Class support - The IEEE-ISTO 5001 standard supports , ". Nexus Timestamp Support - The IEEE-ISTO 5001 standard allows Nexus messages to have timestamps appended , memory options, and cache options) • Core debug options ( Nexus class, timestamp option, trace port width, and whether it has the fixed JTAG Nexus register access sequence) The tables in the following , options is then explained. DQM DQTAG packet type Machine Reset JTAG Nexus State Nexus Port


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PDF AN4802 MPC57xx e200zx e200z7 MPC57xx instruction set e200z420n3 MPC5777M freescale mpc5777M MPC5744P MPC5775 MPC5775K
2005 - MPC5554

Abstract: ESP car stability MPC5554 GPIO ERCOS MPC5500 MPC500 MC56F8300 56F8323 56F8322 MPC566
Text: intervention Direct memory access (DMA) controller Nexus Class IEEE-ISTO 5001 three multi-core debug , ! ! ! Nexus Debugger - VisionCLICK ! ! ! Nexus Debugger - SingleStep with , ! ! ! ! ! ! ! ! ! ! ! Lauterbach BDM Debugger Trace32 Nexus Debugger , Code Trace ( Nexus ) ! ! ! ! ! ! ! Low-Cost Evaluation Board ! ! , TPU ! Ashling Microsystems BDM Debugger - Opella, Genia, and Vitra Nexus Debugger - Vitra (w


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PDF SG2031 June2005 MPC5554 ESP car stability MPC5554 GPIO ERCOS MPC5500 MPC500 MC56F8300 56F8323 56F8322 MPC566
2006 - ISTO-5001

Abstract: nexus 5001 NEXUS FLASH ERASE AM29LV008B Micron Q-Flash memory eZ802 29LV008
Text: Introduction The Nexus Forum 5001 standard is an open industry standard that provides a general-purpose , the IEEE ISTO- 5001 Nexus Standard TAL. The IEEE ISTO- 5001 Nexus Standard is available from the IEEE , . Communication language used between the host PC and a debug tool. Nexus ­ IEEE ISTO- 5001 Standard eZ80 ­ , Z8 Encore!®, eZ80Acclaim!®, and ZNEOTM ZiLOG Nexus Interface API Reference Manual RM004502 , : 408.558.8300 · www.ZiLOG.com Nexus Interface API Reference Manual This publication is subject to


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PDF eZ80Acclaim! RM004502-0506 RM004501-0405 ISTO-5001 nexus 5001 NEXUS FLASH ERASE AM29LV008B Micron Q-Flash memory eZ802 29LV008
2002 - nexus 5001

Abstract: PPC Products MPC500 MPC555 MPC561 MPC562 MPC564 MPC566 QADC64
Text: NEXUS debug port (class 3) ­ IEEE-ISTO 5001 - 1999 · Dual Time Processor Units (Type 3) · Three , application. Additionally, with the industry-standard interface READI ( NEXUS ) module, you have the


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PDF MPC561 MPC500 32-BIT MPC561 22-timer MPC561, nexus 5001 PPC Products MPC500 MPC555 MPC562 MPC564 MPC566 QADC64
2004 - MPC500

Abstract: MPC561 MPC555 MPC562 MPC564 MPC566 QADC64
Text: rights reserved. MPC561FACT/D · NEXUS debug port (class 3) ­ IEEE-ISTO 5001 - 1999 · Dual Time , application. Additionally, with the industry-standard interface READI ( NEXUS ) module, you have the


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PDF MPC561 MPC500 32-BIT MPC561 MPC561FACT/D 22-timer MPC500 MPC555 MPC562 MPC564 MPC566 QADC64
2009 - dts block diagram

Abstract: e200z4 VUINT32 mpc564XA e200zx XBAR ST191 AN2614 nexus 5001 C004
Text: 5001-2010 Nexus standard. The IEEE-ISTO 5001 Nexus data acquisition is also supported on the e200z4 and , and DMA cannot clear any bit in this register. Only a tool access via Nexus read/write access through , DTS_Semaphore register is set. The DTO signal connects to one of the EVTO inputs of the Nexus port controller (NPC). The other EVTO inputs to the NPC are connected to the other Nexus modules in the device. NOTE When the DTS module is enabled (DTS_ENABLE[DTS_EN]=0b1), the Nexus EVTO function of the EVTO pin is


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PDF AN4048 31/August/2010 MPC564xA MPC564xA dts block diagram e200z4 VUINT32 e200zx XBAR ST191 AN2614 nexus 5001 C004
2003 - Nexus S JTAG pins

Abstract: NEXUS JTAG SOCKET NEXUS CONNECTOR glenair connector pinout NEXUS FLASH ERASE Micro-D connectors MR7580 motorola h24 VDD-26 APPLICATIONS of ic 4051
Text: Interface Connector Options (AN2002). 1 Nexus Connector Options The 5001-Nexus standard defines , Semiconductor, Inc. Nexus Interface Connector Options for MPC56x Devices Randy Dees TECD Applications The Nexus interface is a new industry standard that crosses CPU boundaries and allows , without external data and address buses. An IEEE-ISTO 5001TM-1999 1 Nexus Class 3 interface is included on the MPC56x family of microcontrollers. The Nexus standard, as implemented on the MPC56x, is


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PDF AN2298/D MPC56x Nexus S JTAG pins NEXUS JTAG SOCKET NEXUS CONNECTOR glenair connector pinout NEXUS FLASH ERASE Micro-D connectors MR7580 motorola h24 VDD-26 APPLICATIONS of ic 4051
2004 - glenair connector pinout

Abstract: NEXUS CONNECTOR NEXUS JTAG SOCKET MR7580 Tms 1300 Microcontroller NEXUS JTAG CONNECTOR NEXUS FLASH ERASE MPC561 IEEE-ISTO 5001TM MR758
Text: Interface Connector Options (AN2002). 1 Nexus Connector Options The 5001-Nexus standard defines , , Inc. Nexus Interface Connector Options for MPC56x Devices Randy Dees TECD Applications The Nexus interface is a new industry standard that crosses CPU boundaries and allows , without external data and address buses. An IEEE-ISTO 5001TM-1999 1 Nexus Class 3 interface is included on the MPC56x family of microcontrollers. The Nexus standard, as implemented on the MPC56x, is


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PDF AN2298/D MPC56x glenair connector pinout NEXUS CONNECTOR NEXUS JTAG SOCKET MR7580 Tms 1300 Microcontroller NEXUS JTAG CONNECTOR NEXUS FLASH ERASE MPC561 IEEE-ISTO 5001TM MR758
2000 - BBC DSDI 35

Abstract: FC01 MPC500 MPC561 MPC563 1PE1R 0b00111
Text: capabilities for RCPU-based MCUs in compliance with the IEEE-ISTO 5001 - 1999. This module provides , the bit numbering in the register definitions of tool mapped registers follows the NEXUS IEEE-ISTO 5001 - 1999 bit numbering convention of MSB = Bit 31 and LSB = Bit 0, unlike the PowerPC standard MSB = Bit 0 and LSB = Bit 31. The bit description tables list the PowerPC bit numbering and Nexus bit , to provide development support as per the IEEE-ISTO 5001 - 1999. The development features supported


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PDF MPC561/MPC563 BBC DSDI 35 FC01 MPC500 MPC561 MPC563 1PE1R 0b00111
2000 - BBC DSDI 35

Abstract: MPC566 FC01 MPC500 MPC565 btm 110 module jtag mpc565
Text: capabilities for RCPU-based MCUs in compliance with the IEEE-ISTO 5001 - 1999. This module provides , the bit numbering in the register definitions of tool mapped registers follows the Nexus IEEE-ISTO 5001 - 1999 bit numbering convention of MSB = Bit 31 and LSB = Bit 0, unlike the PowerPC standard MSB = Bit 0 and LSB = Bit 31. The bit description tables list the PowerPC bit numbering and Nexus bit , to provide development support as per the IEEE-ISTO 5001 - 1999. The development features supported


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PDF MPC565/MPC566 BBC DSDI 35 MPC566 FC01 MPC500 MPC565 btm 110 module jtag mpc565
2006 - MAC7242

Abstract: freescale JTAG header MAC7242 ARM7 Application Notes NEXUS FLASH ERASE mac7242 MAC7241 cqf 871 0M19G ARMv6 Architecture Reference Manual IC 741 OPAMP DATASHEET ic 814
Text: .20 Nexus Port Selection , [9] / PCS[3] / NEX1EVTI - Port A I/O Pin, External Databus, DSPI_B and Nexus Primary , PB[0] / SDA / NEX1MCKO - Port B I/O Pin, IIC and Nexus Primary .41 PB[1] / SCL / NEX1EVTO - Port B I/O Pin, IIC and Nexus Primary .41 PB[2] / SIN_A / NEX1MSEO - Port B I/O Pin, DSPI_A and Nexus Primary.41 PB[3] / SOUT_A / NEX1RDY - Port B I/O Pin


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PDF MAC7200RM MAC7200 PAC7202 PAC7212 MAC7242 PAC7201 PAC7211 MAC7241 MAC72x2 0M34A, MAC7242 freescale JTAG header MAC7242 ARM7 Application Notes NEXUS FLASH ERASE mac7242 MAC7241 cqf 871 0M19G ARMv6 Architecture Reference Manual IC 741 OPAMP DATASHEET ic 814
2008 - e200z0

Abstract: e200z0h CORE i3 ARCHITECTURE e200z0 Power Architecture Core Reference Manual IEEE-ISTO 5001TM 219L1 8211 cpa SPR-62 A-18 instruction set e200z0
Text: ISTO 5001 and 1149.1 are registered trademarks of the Institute of Electrical and Electronics , 6 Power Management 7 Debug Support 8 Nexus 2+ Module 9 Register Summary A , Core Complex Interfaces 7 Power Management 8 Debug Support 9 Nexus 2+ Module A , . 1-6 Nexus 2+ Features , ) . 6-26 Debug/Emulation ( Nexus 1/OnCE) Support Signals


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PDF e200z0 e200z0 e200z0h e200z0CORERM EL516 e200z0h CORE i3 ARCHITECTURE e200z0 Power Architecture Core Reference Manual IEEE-ISTO 5001TM 219L1 8211 cpa SPR-62 A-18 instruction set e200z0
2006 - MAC7242

Abstract: freescale JTAG header MAC7242
Text: .20 Nexus Port Selection , ] / DATA[9] / PCS[3] / NEX1EVTI — Port A I/O Pin, External Databus, DSPI_B and Nexus Primary , PB[0] / SDA / NEX1MCKO — Port B I/O Pin, IIC and Nexus Primary .41 PB[1] / SCL / NEX1EVTO — Port B I/O Pin, IIC and Nexus Primary .41 PB[2] / SIN_A / NEX1MSEO — Port B I/O Pin, DSPI_A and Nexus Primary.41 PB[3] / SOUT_A / NEX1RDY — Port B I/O Pin


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PDF MAC7200RM MAC7200 PAC7202 PAC7212 MAC7242 PAC7201 PAC7211 MAC7241 MAC72x2 0M34A, MAC7242 freescale JTAG header MAC7242
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