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Top Results (6)

Part ECAD Model Manufacturer Description Datasheet Download Buy Part
SN74HC132ANSR SN74HC132ANSR ECAD Model Texas Instruments Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs
SNJ54S132W SNJ54S132W ECAD Model Texas Instruments Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CFP -55 to 125
SN74LVC1G132DCKR SN74LVC1G132DCKR ECAD Model Texas Instruments Single 2-Input NAND Gate with Schmitt-Trigger Input 5-SC70 -40 to 125
74LVC2G132DCURE4 74LVC2G132DCURE4 ECAD Model Texas Instruments Dual 2-Input NAND Gate with Schmitt-Trigger Inputs 8-VSSOP -40 to 125
SN74HCS00BQAR SN74HCS00BQAR ECAD Model Texas Instruments Quadruple 2-input NAND gates with Schmitt-trigger inputs
SN74LV132ADGVR SN74LV132ADGVR ECAD Model Texas Instruments Quadruple Positive-Nand Gates With Schmitt-Trigger Inputs 14-TVSOP -40 to 125

nand schmit trigger Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
89551

Abstract: 5962-95726 54ACT273 54ATC04 5962-87756 5962-87699 HCTS273 UTMC 54ACT86 54ACT14
Text: UT54ACTS08 Triple 3-Input NAND Gates UT54ACS10 UT54ACTS10 Triple 3-Input AND Gates UT54ACS11 UT54ACTS11 Hex Inverter Schmit Trigger UT54ACS14 UT54ACTS14 Dual 4-Input NAND Gates UT54ACS20 UT54ACTS20 , Quadruple 2-Input NAND Gates Intersil Part Number SMD Number National Part Number SMD Number , Flip-Flops UT54ACS109 UT54ACTS109 Quadruple 2-Input NAND Schmitt Triggers UT54ACS132 UT54ACTS132 3 , 5962-96571 HCS244MS HCTS244MS 5962-95731 5962-95744 Schmitt Trigger Octal Bus Transceivers w


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PDF 54AC00 54ACT00 54AC02 54AC04 54AC08 54AC10 54AC11 54AC14 89551 5962-95726 54ACT273 54ATC04 5962-87756 5962-87699 HCTS273 UTMC 54ACT86 54ACT14
smd cross reference

Abstract: 89551 5962-95681 95811 UT54ACS04 nand schmit trigger 54ac74 diode cross reference UT54ACS00 UT54ACS02
Text: -Input NAND Gates 5962-87699 UT54ACTS11 Hex Inverter Schmit Trigger 5962-87549 54ACT00 UT54ACTS10 Triple 3-Input AND Gates 54AC00 5962-95637 UT54ACTS08 Triple 3-Input NAND Gates , RadHard MSI Logic SMD Cross Reference Description Part Number Quadruple 2-Input NAND Gates , Preset Dual J-K Flip-Flops Quadruple 2-Input NAND Schmitt Triggers 3-Line to 8-Line Decoders , 54ACT244 5962-87760 Schmitt Trigger Octal Bus Transceivers w/Three-State Outputs UT54ACS245S


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PDF HCS02MS 54AC02 HCTS02MS UT54ACS04 HCS04MS 54AC04 HCTS04MS UT54ACS08 HCS08MS 54AC08 smd cross reference 89551 5962-95681 95811 UT54ACS04 nand schmit trigger 54ac74 diode cross reference UT54ACS00 UT54ACS02
KTC-FC1203N

Abstract: I8032 KTC-FC1203 FC1203N toshiba flash card HD11 TQFP100 ide 2.5 DASP nand flash socket DATABUS10
Text: . The controller support up to 16 Toshiba/Samsung NAND type Flash without any additional circuit. The , . Support Samsung / Toshiba 16Mbits~8Gbits NAND type flash memories. 8-bit Flash Data I/O. Two-Port Flash , Request. IDE: Host Interrupt Request. Host Address Bus 7 Host Address Bus 6 Host Reset.( Schmit ) Host , .3 Flash B-Port Enable: Flash B-Port ALE/SC Chip Reset. ( Schmit ) Ground Flash Ready/Busy- ( Schmit , Pull , NAND : Flash Read Enable NAND : Flash Write Protect P.6 KTC-FC1203N ATA Flash Controller 78 79


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PDF KTC-FC1203N FC1203N TQFP100-1 TQFP100-2 I8032 KTC-FC1203 FC1203N toshiba flash card HD11 TQFP100 ide 2.5 DASP nand flash socket DATABUS10
smd cross reference

Abstract: logic gates cross reference
Text: UT54ACS85 UT54ACTS85 UT54ACS86 UT54ACTS86 Description Quadruple 2-Input NAND Gates Quadruple 2 -Input NOR Gates Hex Inverters Quadruple 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Hex Inverting Schmit Trig gers Dual 4-Input NAND Gates Triple 3-Input NOR Gates Hex Noninverting Buffers 4 , Description Dual J-K Flip-Flops Quadruple 2-Input NAND Schmitt Triggers 3-Line to 8-Line Decoders


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PDF UT54ACS00 UT54ACTSOO UT54ACS02 UT54ACTS02 UT54ACS04 UT54ACTS04 UT54ACS08 UT54ACTS08 UT54ACS10 UT54ACTS10 smd cross reference logic gates cross reference
1997 - 74HC132

Abstract: PIN DIAGRAM 74hct132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54/74HC132, CD54/74HCT132 Data sheet acquired from Harris Semiconductor SCHS145A High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised May 2000 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve


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PDF HC132 HCT13 CD54/74HC132, CD54/74HCT132 SCHS145A HC132 HCT132 74HC132 PIN DIAGRAM 74hct132
1997 - CD54HC132

Abstract: CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132 HC132 HCT132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132
2007 - phison

Abstract: No abstract text available
Text: 3.0 3.3 3.6 V 4.5 5.0 5.5 V Schmit Trigger Pin: I = Input O = Output Pin , interface: 133MB/s (UDMA6) 2. Build-In NAND Flash Memory Interface(support Individual mode, Dual mode and , cell) and MLC(Multi level cell) NAND Flash Memory Support 512B per page, 2KB per page, 4KB per page NAND Flash Memory 3. Build-In 1T RISC uP8051: 4. Build-In Oscillator: 5. Build-In Low Voltage , Junction Temperature -40 25 125 °C Vt- Schmitt Trigger Negative Going threshold voltage


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PDF PS3006 PS3006 85pin TQFP100 BGA85 phison
1997 - nand schmit trigger

Abstract: application circuits of ic 74hc132
Text: - Revised December 2002 High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device , Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation Delay: 10ns at , Quad 2-Input NAND Schmitt Trigger DEVICE STATUS: ACTIVE PARAMETER NAME CD54HC132 Voltage Nodes (V) 6 , ) Product Folder: CD54HC132, High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger q q q q q q Live


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PDF CD54/74HC132, CD54/74HCT132 SCHS145B HC132 HCT132 HC132 HCT13 59628984502CA CD54HC132F3A 5962View nand schmit trigger application circuits of ic 74hc132
1997 - HC132

Abstract: nand schmit trigger CD74HCT132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD74HC132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145 High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 Features at VCC = 5V · Typical Propagation Delay: 10ns at VCC = 5V, CL = 15pF, TA = 25oC · HCT Types - 4.5V to 5.5V , CD74HC132, CD74HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device


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PDF HC132 HCT13 CD74HC132, CD74HCT132 SCHS145 CD54HC132F3A CD54HCT1customer HC132 nand schmit trigger CD74HCT132
2004 - Not Available

Abstract: No abstract text available
Text: trigger the 16-bit reload and set EXF2. The auto-reload mode is illustrated in Standard Serial Interface


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PDF HMS91C8232 HMS97C8232
2004 - Not Available

Abstract: No abstract text available
Text: added feature that a 1-to-0 transition at external input T2EX will also trigger the 16-bit reload and


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PDF HMS91C8132 HMS97C8132
FC1306T

Abstract: KTC-FC1306T KTC-FC1306 ktc fc1306t SSF-8020i FC1306 mmc micro SD socket KTC-FC130 ata smartmedia mmc UDMA SDIO
Text: . Support Samsung / Toshiba 16/32/64/128/256/512/1024/2048 Mbits NAND type flash memories. Support Hitachi , : PC Card ATA Address 6 Host Reset.( Schmit ) Micro-processor Address Bus 8 Host PCMCIA: PC Card ATA , FAD4 ATD4 MS_SD1 KTC Confidential I/O Ground Flash A-Port Ready/Busy- ( Schmit , Pull up 50K , Bus 0 NAND : Flash A-Port Read Enable AND: Flash A-Port Output Enable ATA-Port: IO read strobe NAND , : IO write strobe. NAND : Flash Command Latch Enable AND: Flash Command Data Enable Micro-processor


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PDF KTC-FC1306T FC1306T KTC-FC1306 FC1306T ktc fc1306t SSF-8020i FC1306 mmc micro SD socket KTC-FC130 ata smartmedia mmc UDMA SDIO
1997 - 74ALS283

Abstract: 74ALS148 74ALS194 0-99 counter by using 4 dual jk flip flop 004887 ATL60 TTL109 TTL138 TTL139 TTL148
Text: 0.01443 0.01442 0.01424 NAN2 2 input NAND A->O B->O 0.22284 0.18043 0.15245 0.19513 0.05579 0.05596 0.04131 0.04155 NAN2D Dual 2 input NAND A0->O0 A1->O1 B0->O0 B1->O1 , 0.22783 0.23824 0.02793 0.02797 0.02803 0.02898 0.02902 0.02908 4 input NAND A->O B->O , 0.05584 0.05589 0.05598 0.07482 0.07483 0.07488 0.07493 NAN4H 4 input NAND - high drive A , 0.02796 0.02796 0.02793 0.02793 0.03745 0.03745 0.03743 0.03743 NAN5 5 input NAND A->O


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PDF ATL50 ATL60 DP32x36) 74ALS283 74ALS148 74ALS194 0-99 counter by using 4 dual jk flip flop 004887 ATL60 TTL109 TTL138 TTL139 TTL148
1997 - Not Available

Abstract: No abstract text available
Text: CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E August 1997 - Revised March 2004 High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the , Speed CMOS Logic Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation


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PDF CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 HC132 HCT13
1997 - Not Available

Abstract: No abstract text available
Text: CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E August 1997 - Revised March 2004 High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the , Speed CMOS Logic Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation


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PDF CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 HC132 HCT13
1997 - Not Available

Abstract: No abstract text available
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description • Unlimited Input Rise and Fall Times The ’HC132 and ’HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132
1997 - CD54HC132

Abstract: CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132 HC132 HCT132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132
1997 - CD54HC132

Abstract: CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132 HC132 HCT132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132
1997 - CD74HCT132

Abstract: HC132 HCT132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 CD74HCT132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132
1997 - Not Available

Abstract: No abstract text available
Text: CD54/74HC132, CD54/74HCT132 Data sheet acquired from Harris Semiconductor SCHS145B August 1997 - Revised December 2002 High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power , Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation Delay: 10ns at


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PDF CD54/74HC132, CD54/74HCT132 SCHS145B HC132 HCT132 HC132 HCT13
1997 - CD74HCT132

Abstract: CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 HC132 HCT132
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145D High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised August 2003 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145D HC132 HCT132 CD74HCT132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132
1997 - CD74HC132

Abstract: No abstract text available
Text: CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E August 1997 - Revised March 2004 High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the , Speed CMOS Logic Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation


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PDF CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 HC132 HCT13 CD74HC132
1997 - CD74HCT132

Abstract: No abstract text available
Text: CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E August 1997 - Revised March 2004 High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the , Speed CMOS Logic Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation


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PDF CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 HC132 HCT13 CD74HCT132
1997 - Not Available

Abstract: No abstract text available
Text: CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E August 1997 - Revised March 2004 High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger Description The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the , Speed CMOS Logic Quad 2-Input NAND Schmit · Exceptionally High Noise Immunity · Typical Propagation


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PDF CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 HC132 HCT13
1997 - CD74HCT132

Abstract: SCHS145E hc132 CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 HCT132 CD74HCT132E
Text: [ /Title (CD74 HC132 , CD74 HCT13 2) /Subject (High Speed CMOS Logic Quad 2-Input NAND Schmit CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 Data sheet acquired from Harris Semiconductor SCHS145E High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 - Revised March 2004 Features Description · Unlimited Input Rise and Fall Times The 'HC132 and 'HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic device utilizes silicon


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PDF HC132 HCT13 CD54HC132, CD74HC132, CD54HCT132, CD74HCT132 SCHS145E HC132 HCT132 CD74HCT132 SCHS145E CD54HC132 CD54HC132F3A CD54HCT132 CD54HCT132F3A CD74HC132 CD74HCT132E
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