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Part Manufacturer Description Datasheet Download Buy Part
MLV0402-120-E120 (RF0108-000) TE Connectivity Ltd Radial-leaded Metal Oxide Varistor ( ROV ); MLV0402-120-E120 ( Raychem )
ROV05-101K-S-2 (E41275-000) TE Connectivity Ltd Radial-leaded Metal Oxide Varistor ( ROV ); ROV05-101K-S-2 ( Raychem )
ROV05-180M-2 (E46817-000) TE Connectivity Ltd Radial-leaded Metal Oxide Varistor ( ROV ); ROV05-180M-2 ( Raychem )
ROV05-201K-S-2 (D97467-000) TE Connectivity Ltd Radial-leaded Metal Oxide Varistor ( ROV ); ROV05-201K-S-2 ( Raychem )
ROV05-241K-2 (A24147-000) TE Connectivity Ltd Radial-leaded Metal Oxide Varistor ( ROV ); ROV05-241K-2 ( Raychem )
ROV05-271K-S-2 (C27715-000) TE Connectivity Ltd Radial-leaded Metal Oxide Varistor ( ROV ); ROV05-271K-S-2 ( Raychem )

mov rdn Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1995 - TNT4882

Abstract: TNT4882AQ pal 013b P87C52 DS1204U TNT4882-AQ ESP-488TL PAL 011a 74F332 TNT4882C
Text: RESETN RESET WRN WRN RDN RDN Vcc ABUSN BBUSN PAGED Figure 1. P87C52 and TNT4882 , Vcc and BBUSN to ground to use the lower byte lane for data accesses. TNT4882 RDN , WRN Signals , buses when RDN asserts during read accesses. The processor generates RDN and WRN signals as needed during external data memory accesses. TNT4882 RDN and WRN connect directly to the CPU RDN and WRN , . *; ;*; ORG $007D MAIN: MOV SP,#$80 ;Initialize stack pointer ACALL CFG_uP ;Configure microprocessor


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PDF TNT4882 8051-Family-Microcontroller-Based 8051-family 8051-family P87C52 TNT4882-AQ 16-bit TNT4882AQ pal 013b DS1204U TNT4882-AQ ESP-488TL PAL 011a 74F332 TNT4882C
1999 - 16550 uart timing diagram

Abstract: 0/National Semiconductor PC16550D UART LSI402Z LSI402ZX PC16550D 0xF802 0xf801
Text: bi-directional External Data Bus RDN Output Read Strobe WR0N Output Write Strobe , used with 16 bit devices. The RDN signal is used as the read strobe. This signal is low when the , VALID VALID CSN tCSRW tRWPW tRWCS tOFF tCSRW tRWPW tRWCS WR0N tRS RDN , Address CSN RDN DATA Figure 3 ADDR VALID VALID Double Store Address Order High , # Intel 28F200BV-60 RSTN RP# ADDR[16:0] A[16:0] RDN OE# WR0N WE# ICS0N CE


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PDF LSI402Z/ZX PC16550D 0xF807, 16550 uart timing diagram 0/National Semiconductor PC16550D UART LSI402Z LSI402ZX 0xF802 0xf801
2010 - n80c152jb1

Abstract: GA27-3093-04 IA80C152JD IA80C152JC IA80C152JB IA80C152JA IA80C152 equivalent IA80C152 c8051 microcontroller N80C152jd1
Text: P2.4 (A12) 44 (A/D4) P0.4 45 33 25 N.C. Vss ( RDn ) P3.7 32 P2.5 (A13 , . (INT1n) P3.3 (T0) P3.4 N.C. N.C. N.C. (T1) P3.5 (WRn) P3.6 ( RDn ) P3.7 N.C. (A/D0) P0.0 (A/D1 , . N.C. N.C. N.C. P1.7 P4.0 P4.1 P4.2 P4.3 P4.4 P4.5 P4.6 P4.7 PSENn ( RDn ) P3.7 RESETn , ) ( RDn ) P3.7 25 45 P2.4 (A12) N.C . 26 44 P2.3 (A11) 27 28 29 30 31 , .1 (INT0n) P3.2 P5.0 (INT1n) P3.3 (T0) P3.4 P5.1 P5.2 P5.3 (T1) P3.5 (WRn) P3.6 ( RDn ) P3.7 N.C


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PDF IA80C152 IA211040524-06 IA80C152 n80c152jb1 GA27-3093-04 IA80C152JD IA80C152JC IA80C152JB IA80C152JA IA80C152 equivalent c8051 microcontroller N80C152jd1
Not Available

Abstract: No abstract text available
Text: . 32 ( RDn ) P3.7 XTAL1 P2.5 (A13) 31 46 XTAL2 24 30 (WRn) P3.6 (A/D3) P0 , .0 (TXD) P3.1 (INT0n) P3.2 N.C. (INT1n) P3.3 (T0) P3.4 N.C. N.C. N.C. (T1) P3.5 (WRn) P3.6 ( RDn , ( RDn ) P3.7 RESETn (RXCn) P1.4 (RXD) P3.0 (T0) P3.4 (T1) P3.5 (TXCn) P1.3 (TXD) P3.1 VDD Vss , .6 24 46 P2.5 (A13) ( RDn ) P3.7 25 45 P2.4 (A12) N.C . 26 44 P2.3 (A11 , .0 (TXD) P3.1 (INT0n) P3.2 P5.0 (INT1n) P3.3 (T0) P3.4 P5.1 P5.2 P5.3 (T1) P3.5 (WRn) P3.6 ( RDn


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PDF IA80C152 IA211040524-06 IA80C152
2007 - p80c152ja1

Abstract: N80C152JA1 N80C152JB N80C152JC1 P80C152JA BCRH N80C152JD1 P80C152JA-1 N80C152JC-1 N80C152JA
Text: .7 RESETn (RXD) P3.0 (TXD) P3.1 (INT0n) P3.2 (INT1n) P3.3 (T0) P3.4 (T1) P3.5 (W Rn) P3.6 ( RDn ) P3.7 (A / D0 , . (INT1n) P3.3 (T0) P3.4 N.C. N.C. N.C. (T1) P3.5 (WRn) P3.6 ( RDn ) P3.7 N.C. (10) (11) (12) (13) (14 , .2 P5.0 (INT1n) P3.3 (T0) P3.4 P5.1 P5.2 P5.3 (T1) P3.5 (WRn) P3.6 ( RDn ) P3.7 N.C. (10) (11) (12) (13 , P3.5 - T1, Timer 1 External Input P3.6 - WRn, External Data Memory Write Strobe P3.7 - RDn , External , ACALL addr11 ORL C, bit JMP @A+DPTR MOV A,#data MOV direct,#data MOV @R0,#data MOV @R1,#data MOV


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PDF IA80C152 80C152 IA80C152JA/JCPDW48I IA80C152JA/JCPDW48I-R IA80C152JB/JD-PLC68I IA80C152JB/JDPLC68I-R p80c152ja1 N80C152JA1 N80C152JB N80C152JC1 P80C152JA BCRH N80C152JD1 P80C152JA-1 N80C152JC-1 N80C152JA
2000 - GA27-3093-04

Abstract: c8051 microcontroller 48-Pin TSOP Type 1, CPL IA82510 48-Pin TSOP - Type 1, CPL 8051 opcode hexadecimal with mnemonic sheet C8051 GA27-3093 IA80C152JB 80C152
Text: ) P3.5 (15) (34) P2.5 (A13) (WRn) P3.6 (16) (33) P2.4 (A12) ( RDn ) P3.7 (17 , ) (WRn) P3.6 (24) (46) P2.5 (A13) ( RDn ) P3.7 (25) (45) P2.4 (A12) N.C. (26 , ) (WRn) P3.6 (24) (46) P2.5 (A13) ( RDn ) P3.7 (25) (45) P2.4 (A12) N.C. (26 , ADD A,R3 ADD A,R4 ADD A,R5 ADD A,R6 ADD A,R7 MOV DPTR,#data16 ACALL addr11 MOV bit,C Table 7 , rel ACALL addr11 ORL C,direct JMP @A+DPTR MOV A,#data MOV direct,#data MOV @R0,#data MOV @R1


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PDF IA80C152 80C152 GA27-3093-04 c8051 microcontroller 48-Pin TSOP Type 1, CPL IA82510 48-Pin TSOP - Type 1, CPL 8051 opcode hexadecimal with mnemonic sheet C8051 GA27-3093 IA80C152JB 80C152
2003 - P80C152JA1

Abstract: n80c152jb1 mov rdn N80C152JA1 N80C152A IA80C152JD IA80C152JC IA80C152JB/JDPLC68IR1 IA80C152JA IA80C152
Text: ) P2.5 (A13) (WRn) P3.6 (16) (33) P2.4 (A12) ( RDn ) P3.7 (17) (32) P2.3 (A11 , ) P2.2 (45) (42) (25) (A9) P2.1 P2.5 (A13) ( RDn ) P3.7 (41) (46) (A8) P2 , ) P3.6 (24) (46) P2.5 (A13) ( RDn ) P3.7 (25) (45) P2.4 (A12) N.C. (26) (44 , Memory Write Strobe P3.7 - RDn , External Data Memory Read Strobe P4.0 P4.1 P4.2 P4.3 P4.4 Port 1 , JMP @A+DPTR MOV A,#data MOV direct,#data MOV @R0,#data MOV @R1,#data MOV R0.#data MOV R1.#data


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PDF IA80C152 N80C152A N80C152JA N80C152JA1 N80C152JC N80C152JC1 IA80C152JA/JC-PDW48I P80C152A P80C152JA P80C152JA1 P80C152JA1 n80c152jb1 mov rdn N80C152JA1 N80C152A IA80C152JD IA80C152JC IA80C152JB/JDPLC68IR1 IA80C152JA IA80C152
2000 - 8344AH

Abstract: RUPI-44 SMD A7H 8744 8044AH 80C51 C8051 IA8044 IA8344 IA8X44
Text: Transfer Mnemonic Description MOV A,Rn Move register to accumulator MOV A,direct Move direct byte to accumulator MOV A,@Ri Move indirect RAM to accumulator MOV A,#data Move immediate data to accumulator MOV Rn,A Move accumulator to register MOV Rn,direct Move direct byte to register MOV Rn,#data Move immediate data to register MOV direct,A Move accumulator to direct byte MOV direct,Rn Move register to direct byte MOV direct,direct Move direct byte to direct byte MOV direct,@Ri Move indirect


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PDF IA8X44 16-Bit 8344AH RUPI-44 SMD A7H 8744 8044AH 80C51 C8051 IA8044 IA8344 IA8X44
2001 - P8344AH

Abstract: N8344AH TN8344AH p8044ah TP8044AH N8044AH p8044 P8044AHR0117 p8044ah-r0117 RUPI-44
Text: Description MOV A,Rn Move register to accumulator MOV A,direct Move direct byte to accumulator MOV A,@Ri Move indirect RAM to accumulator MOV A,#data Move immediate data to accumulator MOV Rn,A Move accumulator to register MOV Rn,direct Move direct byte to register MOV Rn,#data Move immediate data to register MOV direct,A Move accumulator to direct byte MOV direct,Rn Move register to direct byte MOV direct,direct Move direct byte to direct byte MOV direct,@Ri Move indirect RAM to direct byte MOV


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PDF IA8044/IA8344 16-Bit IA8044-PDW40I-00 IA8044-PLC44I-00 IA8344-PDW40I-00 IA8344-PLC44I-00 IA8044-PLC44I IA8044-PDW40I IA8344-PLC44I P8344AH N8344AH TN8344AH p8044ah TP8044AH N8044AH p8044 P8044AHR0117 p8044ah-r0117 RUPI-44
1996 - CD Mode

Abstract: 7476 counter 80C152 270645 057d embedded controller handbook C152 80C51BH johnson controls C082
Text: according to the previously given formula For instance MOV BAUD 0 selects a baud rate of 1 8 the oscillator frequency or MOV BAUD 1 selects a baud rate of 1 16 the oscillator frequency at the other extreme MOV BAUD 0FFH selects a baud rate of 1 2048 the oscillator frequency (7 2K , GSC is under CPU control This is because the Receive Done bit ( RDN ) which signifies the end of a , interrupt be assigned a higher priority than any of the other interrupts Since the RDN bit will be set


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PDF AP-429 83C152 CD Mode 7476 counter 80C152 270645 057d embedded controller handbook C152 80C51BH johnson controls C082
1999 - mov rdn 240

Abstract: AD73311 MOV RDN 240/ 20 pc 525 1109PHCT-ND ic 7408 AND GATE IC WORKING C57A marking L6A SMD 3825 LED LM338AT
Text: -232 U3 DATA 12 16 16 2 WRN, RDN 16 16 5 RDN ICS2N 1 1 EPROM SEL PGM SRAM , ] SRAMSEL Vcc 2 DATA SRAM U5 64 K x 16 Hardware Overview 8 WRN, RDN , PCS0 ADDRESS 16 16 H8 16 16 WRN, 2 RDN 16 DRAMEN Switch S2 J21 5 LEDs L1­L4 4 9.8 MHz , T1IN RTSN T3IN XIN CTSN R2OUT ENN RDN T1OUT ADM561JR RS-232 U3 INTRPT MR


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PDF EB401 DB15-000130-00, 0xe806 mov rdn 240 AD73311 MOV RDN 240/ 20 pc 525 1109PHCT-ND ic 7408 AND GATE IC WORKING C57A marking L6A SMD 3825 LED LM338AT
1999 - LSI402Z

Abstract: LSI402ZX MT58L32L32P
Text: bi-directional External Data Bus RDN Output Read Strobe WR0N Output Write Strobe, Lower Word , RDN signal is used as the read strobe. This signal is low when the processor is executing a read , . Figure 2 Simple Read and Write Cycles MEMCLK CSN ADSN RDN WRN ADDR VALID VALID , Read and a Pipelined Write MEMCLK CSN ADSN RDN WRN ADDR VALID1 VALID2 DATA , Access Behavior MEMCLK CSN ADSN RDN WRN ADDR VALID0 VALID2 DATA VALID0 STATE


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PDF LSI402Z/ZX LSI402Z DB06-000268-00 LSI402Z LSI402ZX MT58L32L32P
2000 - Not Available

Abstract: No abstract text available
Text: Logic Corporation. All rights reserved. Table 1 Instruction MIN MIN.E MOV MOV MOV MOV MOV MOVH MOVH , Interfaces ADDR[17:0] ADSN DATA[31:0] DCS0N HOLD HOLDA ICS0N MEMCLK PCS0N RDN RDY WR0N WR1N S0DI S0DO S0IBF , ]) Table 2 Signal ADDR[17:0] ADSN DATA[31:0] DCS0N HOLD HOLDA ICS0N MEMCLK PCS0N RDN RDY WR0N WR1N 1 , Read (4-Cycle Wait State) t1 ADDR [17:0] t3 ADSN t5 xCSxN t6 RDN t7 t2 Valid Address t4 WR0N, WR1N , LOW to RDN LOW RDN HIGH to xCSxN HIGH Data Valid to xCSxN HIGH Data Hold Time 1. T is the processor


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PDF LSI403LP 16-bit, ZSP400 DB08-000179-00
2008 - TS80C186XL12

Abstract: ADC 0800 interfacing with 8086 and programming
Text: rd_n /qsmd_n wr_n/qs1 bhe_n a19/s6 a18/s5 a17/s4 a16/s3 ® ENG211080711-01 UNCONTROLLED WHEN , 20 Name ad15 n.c. a16/s3 a17/s4 a18/s5 a19/s6 bhe_n wr_n/qs1 rd_n /qsmd_n ale/qs0 n.c. vss vss n.c , 10 11 12 13 14 15 16 17 18 19 20 Name a15 n.c. a16/s3 a17/s4 a18/s5 a19/s6 rfsh_n wr_n/qs1 rd_n , a19/s6 n.c. bhe_n wr_n/qs1 rd_n /qsmd_n ale/qs0 vss vss x1 x2 reset n.c. clkout ardy s2_n s1_n s0_n Pin , a16/s3 a17/s4 a18/s5 a19/s6 n.c. rfsh_n wr_n/qs1 rd_n /qsmd_n ale/qs0 vss vss x1 x2 reset n.c. clkout


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PDF IA186XL/IA188XL 16-Bit ENG211080711-01 IA186XL IA188XL TS80C186XL12 ADC 0800 interfacing with 8086 and programming
2000 - LSI403Z

Abstract: ZSP400 PQFP 176
Text: (Extended Precision) MOV Move Control Register to Operand Register MOV Move Immediate to Operand Register MOV Move Operand Register to Control Register MOV Move Operand Register to Operand Register MOV Move to PC MOVH Move Immediate to Higher Byte of Control Register (Sheet 3 of 6 , ICS0N MEMCLK PCS0N RDN RDY WR0N WR1N S0DI S0DO S0IBF S0OBE S0RCLK S0RFS S0XCLK S0XFS , Peripheral Chip Select RDN Output Read Strobe RDY Input Reserved1 WR0N Output


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PDF 403zds LSI403Z 16-bit, ZSP400 PQFP 176
2000 - Not Available

Abstract: No abstract text available
Text: DMUL.B IMUL.A IMUL.B LD LDDU LDU LDX LDXU MAC.A MAC.B MAC2.A MAC2.B MACN.A MACN.B MAX MAX.E MIN MIN.E MOV MOV MOV MOV MOV MOVH ZSP Instruction Set (Cont.) Description Multiplication (Extended Precision , Interfaces ADDR[17:0] ADSN DATA[31:0] DCS0N HOLD HOLDA ICS0N MEMCLK PCS0N RDN RDY WR0N WR1N S0DI S0DO S0IBF , RDN RDY WR0N WR1N Table 2, "External Memory Interface Unit (MXU) Signals," on page 15 Table 3 , [17:0] t3 ADSN t5 xCSxN t6 RDN t7 t2 Valid Address t4 WR0N, WR1N RDY t8 t9 DATA [31:0] Valid Data


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PDF LSI403Z 16-bit, ZSP400 R15012 DB08-000130-01
1999 - 2510-6002UB connector

Abstract: elektronik DDR D3318
Text: instruction that specifies a postincrement that causes r15 > %cb1_end. Figure 2.2 lda mov mov mov add , */ /* end address */ mov %cb1_end, r4 /* Initialize the end address of cb1 */ bits %smode, 0x2 /* Enable cb1


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PDF LSI402ZX R14021 DB15-000153-01, D-33181 2510-6002UB connector elektronik DDR D3318
1999 - Db06

Abstract: mov rdn 240 elektronik DDR D3318 haar transform
Text: instruction that specifies a postincrement that causes r15 > %cb1_end. Figure 2.2 lda mov mov mov add , */ /* end address */ mov %cb1_end, r4 /* Initialize the end address of cb1 */ bits %smode, 0x2 /* Enable cb1


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PDF LSI402ZX R14021 DB15-000153-02, D-33181 Db06 mov rdn 240 elektronik DDR D3318 haar transform
1999 - ande RY 192

Abstract: ande RY 228 ande RY 227 mov rdn 240 DB14-000121-00
Text: 4.7.1 MOV ­ Move Register to Register and Immediate to Register 4-23 Memory Reference Instructions 4-24 , with Update 4-26 Synthetic Instructions and NOP 4-26 4.9.1 LDA ­ Load Address 4-26 4.9.2 MOV ­ , instruction that specifies a post increment that causes r15 > %cb1_end. Figure 2.5 lda mov mov mov add , */ /* end address */ mov %cb1_end, r4/* Initialize the end address of cb1 */ bits %smode, 0x2/* Enable cb1


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PDF LSI402Z R14014 DB15-000131-02, ande RY 192 ande RY 228 ande RY 227 mov rdn 240 DB14-000121-00
1999 - motorola T316

Abstract: T308 t314 t308 equivalent LSI402Z t103 ci t314
Text: ) MOV Move To PC MOV Move Operand Register To Control Register MOV Move Control Register To Operand Register MOV Move Operand Register To Operand Register MOV Move Immediate To , [17:0] DATA[31:0] PCSN[3:0] HOLD HOLDA DCSN[3:0] ICSN[3:0] RDN WRN1 WRN0 RDY XDMAEN7 , Peripheral Chip Select RDN Output Read Strobe RDY Input Reserved. Tie this pin HIGH for , t136 RDN WRN RDY t137 t138 Valid Data DATA Table 9 External Instruction or Data


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PDF LSI402Z 16-bit motorola T316 T308 t314 t308 equivalent t103 ci t314
2009 - en80c188eb20

Abstract: es80c188eb20 EN80C188EB13 EE80C188EB25 es80C188 EN80C188EB-20 YW80C186EB25 EN80C186EB13 circuit diagram TN80C188EB20 IA211080314-08
Text: error_n rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n hlda hold test_n/busy lock_n dt/r_n nmi , 11 12 13 14 15 16 17 18 19 20 21 Name Vcc Vss Not Connected rd_n wr_n ale rfsh_n , a18 a19/once_n Vss Vcc Vss rd_n wr_n ale bhe_n s2_n Pin 41 42 43 44 45 46 47 48 , a19/once_n Vss Vcc Vss rd_n wr_n ale rfsh_n s2_n Pin 41 42 43 44 45 46 47 48 49 , rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n http://www.Innovasic.com Customer Support


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PDF IA186EB/IA188EB 8-Bit/16-Bit IA211080314-08 IA188EB 80C186EB, en80c188eb20 es80c188eb20 EN80C188EB13 EE80C188EB25 es80C188 EN80C188EB-20 YW80C186EB25 EN80C186EB13 circuit diagram TN80C188EB20 IA211080314-08
2011 - ia188eb

Abstract: No abstract text available
Text: 21 Name Vcc Vss error_n rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n hlda hold test_n , 13 14 15 16 17 18 19 20 21 Name Vcc Vss Not Connected rd_n wr_n ale rfsh_n s2_n , ad14 ad7 ad15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n ale bhe_n s2_n Pin 41 42 , ad7 a15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n ale rfsh_n s2_n Pin 41 42 43 , Vss rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n http://www.Innovasic.com Customer Support


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PDF IA186EB/IA188EB 8-Bit/16-Bit IA211080314-11 1-888-824-EB IA188EB
2011 - en80c188eb20

Abstract: ia188eb TS80L188EB16 EG80C186EB25 EE80C188EB ia186eb EN80C188EB13 EE80C188EB25 InnovASIC tn80c186
Text: error_n rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n hlda hold test_n/busy lock_n dt/r_n nmi ready p1.7/gcs7_n , 11 12 13 14 15 16 17 18 19 20 21 Name Vcc Vss Not Connected rd_n wr_n ale rfsh_n s2_n s1_n s0_n den_n , rd_n wr_n ale bhe_n s2_n Pin 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Name s1_n s0_n , 35 36 37 38 39 40 Name ad4 a12 ad5 a13 ad6 a14 ad7 a15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n , ad7 ad15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n IA211080314


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PDF IA186EB/IA188EB 8-Bit/16-Bit IA211080314-13 IA186EB IA188EB en80c188eb20 TS80L188EB16 EG80C186EB25 EE80C188EB EN80C188EB13 EE80C188EB25 InnovASIC tn80c186
2011 - Not Available

Abstract: No abstract text available
Text: 20 21 Name Vcc Vss error_n rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n hlda hold , 13 14 15 16 17 18 19 20 21 Name Vcc Vss Not Connected rd_n wr_n ale rfsh_n s2_n , ad14 ad7 ad15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n ale bhe_n s2_n Pin 41 42 , ad7 a15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n ale rfsh_n s2_n Pin 41 42 43 , /once_n Vss Vcc Vss rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n http://www.Innovasic.com


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PDF IA186EB/IA188EB 8-Bit/16-Bit IA211080314-10 1-888-82EB IA188EB
2009 - EN80C188EB20

Abstract: N80C188
Text: 10 11 12 13 14 15 16 17 18 19 20 21 Name Vcc Vss error_n rd_n wr_n ale bhe_n s2_n s1_n s0_n den_n , Vcc Vss Not Connected rd_n wr_n ale rfsh_n s2_n s1_n s0_n den_n hlda hold test_n lock_n dt/r_n nmi , rd_n wr_n ale bhe_n s2_n Pin 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Name s1_n s0_n , 35 36 37 38 39 40 Name ad4 a12 ad5 a13 ad6 a14 ad7 a15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n , 79 80 Name ad13 ad6 ad14 ad7 ad15 a16 a17 a18 a19/once_n Vss Vcc Vss rd_n wr_n ale bhe_n s2_n s1_n


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PDF IA186EB/IA188EB 8-Bit/16-Bit IA211080314-02 IA186EB IA188EB EN80C188EB20 N80C188
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