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Part Manufacturer Description Datasheet Download Buy Part
LM2657MTC/NOPB Texas Instruments Dual Synchronous Buck Regulator Controller 28-TSSOP -40 to 125
LM2657MTC Texas Instruments DUAL SWITCHING CONTROLLER, 500kHz SWITCHING FREQ-MAX, PDSO28, TSSOP-28
LM2657MTCX Texas Instruments DUAL SWITCHING CONTROLLER, 500kHz SWITCHING FREQ-MAX, PDSO28, TSSOP-28
LM2657MTCX/NOPB Texas Instruments Dual Synchronous Buck Regulator Controller 28-TSSOP -40 to 125
PMP2657 Texas Instruments 13-110Vin 12Vout 500mA

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1996 - C500

Abstract: C509-L LT 637
Text: features. All operations are unsigned integer operations. The arithmetic unit (further on also called MDU , factor 5 to 10. The MDU is handled by seven registers, which are memory mapped as special function , concurrently to and independent of the CPU's activity. Table 6-8 describes the four general operations the MDU is able to perform: Table 6-8 MDU Operation Characteristics Operation Result Remainder , 6 shifts per machine cycle 6.4.1 MDU Register The seven SFRs of the MDU consist of


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PDF C509-L C509-L 32-bit 16-bit C500 LT 637
MDU-2-10

Abstract: MDU-2-15
Text: DATA DELAY DEVICES INC E3E D ■Sb443fi5 □□□□571 1 mT"Hl'(3 Multiple Digital Delav Units SERIES: MDU ~2 uuiuy umto (14 pins DIP) TTL Interfaced MDU -2-5 5 MDU -2-10 10 MDU -2-15 15 MDU -2-20 20 MDU -2-25 25 MDU -2-30 30 MDU -2-35 35 MDU -2-40 40 MDU -2-45 45 MDU -2-50 50 MDU -2-60 60 MDU -2-75 75 MDU -2-100 100 MDU -2-125 125 MDU -2-150 150 MDU -2-200 200 MDU -2-250 250 Other delay times available on


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PDF Sb443fi5 MDU-2-10 MDU-2-15 MDU-2-20 MDU-2-25 MDU-2-30 MDU-2-35 MDU-2-40 MDU-2-45 MDU-2-50
MDU-12H-100

Abstract: No abstract text available
Text: Multiple Digital Delay Unit« SERIES: MDU -12H W,M 10 (16 pins DIP) 10KH ECL Interfaced data , Part No. (ns) MDU -12H-3 3 ± 1 MDU -12H-4 4 ± 1 MDU -12H-5 5 ± 1 MDU -12H-10 10 ± 1 MDU -12H-15 15 ± 1 MDU -12H-20 20 ± i MDU -12H-25 25 ± 2 MDU -12H-30 30 ± 2 MDU -12H-35 35 ± 2 MDU -12H-40 40+2 MDU -12H-45 45 ± 2.2 MDU -12H-50 50 ± 2.5 MDU -12H-60 60+3 MDU -12H-75 75 ± 3.7 MDU -12H-100 100 ± 5 MDU -12H-125 125 ± 6.2 MDU -12H-150 150 ± 7 MDU -12H-200 200 ± 10 MDU -12H-250 250 ± 12.5


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PDF MDU-12H ECL-10KH MDU-12H-10 MDU-12H-15 MDU-12H-20 MDU-12H-25 MDU-12H-30 MDU-12H-35 MDU-12H-40 MDU-12H-45 MDU-12H-100
1999 - IC CD4011

Abstract: CDP1855CE CDP1855CDX CDP1855CD CDP1855C CDP1855 CDP1802 CDP1800 mdu ceramic CD4011 PINOUT
Text: . MDU ADDRESSED AS I/O DEVICE CAUTION: These devices are sensitive to electrostatic discharge; follow , Functional Description The CDP1855 is a multiply-divide unit ( MDU ) designed to be compatible with CDP1800 , lines are used in conjunction with the RA lines to determine the exact MDU response (See "CONTROL TRUTH TABLE"). When multiple MDU 's are cascaded, the loading of each register is done sequentially. For , by internal counters on each MDU which are decremented by STB during each register selection. When


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PDF CDP1855, CDP1855C 32-Bit CDP1855 CDP1855C CDP1800-series IC CD4011 CDP1855CE CDP1855CDX CDP1855CD CDP1802 CDP1800 mdu ceramic CD4011 PINOUT
FA 12-125

Abstract: No abstract text available
Text: Multiple Digital Delay Unite SERIES: mdu -12 viiito (16 pjns D|Pj J0KH ECL Interfaced data , TYP. .010 TYP. □ 1 16 15 14 I □ □ O □ O □ 5 6 8 Delay Per Line Part No. (NS) MDU -12-5 5 MDU -1 2-1 0 10 MDU -12-15 15 MDU -1 2-20 20 MDU -1 2-25 25 MDU -1 2-30 30 MDU -1 2-35 35 MDU -1 2-40 40 MDU -1 2-45 45 MDU -1 2-50 50 MDU -1 2-60 60 MDU -1 2-75 75 MDU -1 2-1 00 100 MDU -1 2-1 25 125 MDU -12-150 150 MDU -12-200 200 MDU -12-250 250 — .300 -.350- • .700 - Vcc OUT, OUT2 16 15 14


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PDF mdu-12 MDU-12-5 MDU-12-15 MDU-12-150 MDU-12-200 MDU-12-250 FA 12-125
Not Available

Abstract: No abstract text available
Text: Multiple Digital Delay Unite W lllto SER|ES: MDU -12 ECl |ntertaced (16 pjns D|P) 10KH , €”5.2V and Ta= 25 C Part No. D elay P er Line (N S ) MDU -1 MDU -1 MDU -1 MDU -1 MDU -1 2-5 2-10 2-1 5 2- 20 2-25 5 10 15 20 25 MDU -1 MDU -1 MDU -1 MDU -1 MDU -1 2- 30 2-35 2-40 2-45 2-50 30 35 40 45 50 MDU -1 MDU -1 MDU -1 MDU -1 2-60 2-75 2-1 00 2- 125 60 75 100 125 MDU -12-150 MDU -12-200 MDU -12-250 150 200 250 O th e r de lay times on request


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PDF MDU-12 MDU-12-150 MDU-12-200 MDU-12-250
Not Available

Abstract: No abstract text available
Text: JFast Logic Multiple Digital Delay Units SERIES: MDU -2F (14 pins DIP) TTL Interfaced data delay devices; inc. Features: ■Auto-insertable ■Completely interfaced for TTL & DTL , Nicket-ircn alloy 42 Delay Per Line Part No. (NS) MDU -2F-5 5 MDU -2 F-1 0 10 MDU -2F-15 15 MDU -2 F-20 20 MDU -2 F-25 25 MDU -2 F-30 30 MDU -2F-35 35 MDU -2F-40 40 MDU -2F-45 45 MDU -2 F-50 50 MDU -2 F-60 60 MDU -2 F-75 75 MDU -2 F-1 00 100 MDU -2 F-1 25 125 MDU -2 F-1 50 150 MDU -2 F-200 200 MDU -2 F


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PDF MDU-2F-15 MDU-2F-35 MDU-2F-40 MDU-2F-45 F-200 F-250
2002 - CDP1802CE

Abstract: CD4011 PINOUT FUNCTIONAL DIAGRAM OF CD4011 CDP1855 IC CD4011 high level language programming of 8085 microprocessor IC cd4011 for pin function 8085 assembly language mdu ceramic cd40111
Text: . MDU ADDRESSED AS I/O DEVICE CAUTION: These devices are sensitive to electrostatic discharge; follow , Description The CDP1855 is a multiply-divide unit ( MDU ) designed to be compatible with CDP1800 series , RD/WE and STB lines are used in conjunction with the RA lines to determine the exact MDU response (See "CONTROL TRUTH TABLE"). When multiple MDU 's are cascaded, the loading of each register is done , by internal counters on each MDU which are decremented by STB during each register selection. When


Original
PDF CDP1855, CDP1855C 32-Bit CDP1855 CDP1855C CDP1800-series CDP1802CE CD4011 PINOUT FUNCTIONAL DIAGRAM OF CD4011 IC CD4011 high level language programming of 8085 microprocessor IC cd4011 for pin function 8085 assembly language mdu ceramic cd40111
MDU3-60

Abstract: MDU-3-40 MDU 3-40
Text: DATA DELAY DEVICES INC 23E D ■2b443flS DO DOS 73 S ■T^^/^/S Multiple Digital Dplav llnit^ SERIES: MDU -3 UCIdy UIIIIÒ (14p,nsDinTTLinterfaced MDU -3-5 5 MDU -3-10 10 MDU -3-15 15 MDU -3-20 20 MDU -3-25 25 MDU -3-30 30 MDU -3-35 35 MDU -3-40 40 MDU -3-45 45 MDU -3-50 . 50 MDU -3-60 60 MDU -3-75 75 - MDU -3-100 100 -.820 MAX.- t or case Stand-offe Other delay times available on request. 3 Mt


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PDF 2b443flS MDU-3-10 MDU-3-15 MDU-3-20 MDU-3-25 MDU-3-30 MDU-3-35 MDU-3-40 MDU-3-45 MDU-3-50 MDU3-60 MDU 3-40
Not Available

Abstract: No abstract text available
Text: SERIES: MDU -14 o .400 Oetay Per Une (ns) 1.300 MDU -14-2 MDU -14-2.5 MDU -14-3 MDU -14-4 MDU -14-5 MDU -14-6 MDU -14-7 MDU -14-8 MDU -14-9 MDU -14-10 MDU -14-12.5 MDU -14-1 5 MDU -14-20 MDU -14-25 t .530 Part


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PDF ECL-100K MDU-14 MDU-14-2 MDU-14-3 MDU-14-4 MDU-14-5 MDU-14-6 MDU-14-7 MDU-14-8
17 mdu 002

Abstract: SM59R04 SM59R04A2 mdu DATASHEET 0x00080001 mdu application note
Text: MDU Application Note MDU (Multiplication Division Unit) 1 SM59R04A2 / SM59R03A2/SM59R02A2 2 MDU 2.1 MCU 1T MDU 1T 12T 8051 2.2 (32/16-bit & 16/16-bit division)(16*16-bit multiplication)(32-bit shift) (normalize, ) 2.3 2.4 ARCON[7:0] MDU MD5~MD0 2.5 SM59Rxx MDU C Keil C " #pragma mdu_r515 " (Assembly) MDU MDU 2.6 MCU Conditional 1T with MDU 1T without MDU 12T without MDU 0x0000FFFF / 0x00FF 4.560 33.88 280.0 0xFFFFFFFF


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PDF SM59R04A2 SM59R03A2/SM59R02A2 32/16-bit 16/16-bit 16-bit 32-bit SM59Rxx 0x0000FFFF 0x00FF 17 mdu 002 SM59R04 mdu DATASHEET 0x00080001 mdu application note
MDU2-60

Abstract: MDU-2-10 MDU-2-15
Text: Multiple Digital Delav Units series: mdu -2 vviuy vim« (14 pins DIP) TTL Interlaced data delay devices? inc. Features: ■Completely interfaced for TTL & DTL application. ■P.C. board , : 500 mw max. Daisy Per Line Part No. (ns) MDU -2-5 5 MDU -2-10 10 MDU -2-15 15 MDU -2-20 20 MDU -2-25 25 MDU -2-30 30 MDU -2-35 35 MDU -2-40 40 MDU -2-45 45 MDU -2-50 50 MDU -2-60 60 MDU -2-75 75 MDU -2-100 100 MDU -2-125 125 MDU -2-150 150 MDU -2-200 200 MDU -2-250 250 Test Conditions: ■Input Pulse


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PDF MDU-2-10 MDU-2-15 MDU-2-20 MDU-2-25 MDU-2-30 MDU-2-35 MDU-2-40 MDU-2-45 MDU-2-50 MDU-2-60 MDU2-60
Not Available

Abstract: No abstract text available
Text: Multiple Digital Delay UnitS SERIES: MDU -14 (24 pins DIP) 100K ECL Interfaced data delay devices^ inc. Features: ■Input & output buffered. ■4 delay lines/package. ■Compatible with , [ .015 TYP. 100 TYP.-^j Delay Per Line Part No. (NS) MDU -1 4-2 2 MDU -1 4-2.5 2.5 MDU -1 4-3 3 MDU -1 4-4 4 MDU -1 4-5 5 MDU -1 4-6 6 MDU -1 4-7 7 MDU -1 4-8 8 MDU -1 4-9 9 MDU -1 4-1 0 10 MDU -1 4-1 2.5 12.5 MDU -1 4-1 5 15 MDU -14-20 20 MDU -1 4-25 25 T .400 i 1.300 " MAX. " Vee OUT, OUT2


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PDF MDU-14 MDU-14-20
Not Available

Abstract: No abstract text available
Text: loads. DC parameters: See ECL-100K Logic Table on Page 6. SERIES: MDU -14 (24 pins DIP) 1 0OK ECL Interfaced mm 1 0 0 TYP.-*- ±_ K .015 TYP. Part No. MDU -14-2 MDU -14-2.5 MDU -14-3 MDU -14-4 MDU -14-5 MDU -14-6 MDU -14-7 MDU -14-8 MDU -14-9 MDU -14-10 MDU -14-12.5 MDU -14-15 MDU -14-20 MDU -14-25 Delay Per


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PDF ECL-100K MDU-14 MDU-14-2 MDU-14-3 MDU-14-4 MDU-14-5 MDU-14-6 MDU-14-7 MDU-14-t
3F60

Abstract: No abstract text available
Text: zFast Logic Multiple Digital llaloii Unite SERIES: MDU -3F ucidy UIII IS (14 pins DIP) TTL Interfaced data delay \C devices? inc. Features: ■Auto-insertable. ■Completely interfaced for TTL , taps. U- 230 — p max Delay Per Line Part No. (NS) MDU -3F-5 5 MDU -3 F-1 0 10 MDU -3F-1 5 15 MDU -3F-20 20 MDU -3F-25 25 MDU -3F-30 30 MDU -3F-35 35 MDU -3F-40 40 MDU -3F-45 45 MDU -3 F-50 50 MDU -3F-60 60 MDU -3 F-75 75 MDU -3 F-1 00 100 Other delay times available on request. 3 Mt. Prospect Avenue


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PDF MDU-3F-20 MDU-3F-25 MDU-3F-30 MDU-3F-35 MDU-3F-40 MDU-3F-45 MDU-3F-60 3F60
Not Available

Abstract: No abstract text available
Text: HCMOS - Logic I II SERIES: "A Delay Units MDU -28C (8p sdip) in data delay devicesYinc. Features: ■■■■■■Auto-insertabie. Low cost. Completely interfaced for CMOS. Low profile. Fits standard 8 pins DIP socket. 2 equal delay units/package , > MDU -28C-10 MDU -28C-12 MDU -28C-16 MDU -28C-20 MDU -28C-30 MDU -28C-35 10 12 16 20 30 35 MDU -28C-40 MDU -28C-45 MDU -28C-50 MDU -28C-60 MDU -28C-75 MDU -28C-100 40 45 50 60 75 100


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PDF MDU-28C MDU-28C-10 MDU-28C-12 MDU-28C-16 MDU-28C-20 MDU-28C-30 MDU-28C-35 MDU-28C-40 MDU-28C-45 MDU-28C-50
Not Available

Abstract: No abstract text available
Text: Multiple Digital Delay Units (16 SERIES: MDU -12 pins DIP) 10KH ECL Interfaced Features: Input & output buffered. 2 delay lines/package. Fits in Standard 16 Pins DIP. Specifications: Total Delay , 25°C. Part No. M D U -12-5 MDU -1 2-10 MDU -1 2-1 5 M D U -1 2-2 0 MDU -1 2-25 M D U -12-30 MDU -1 2-35 MDU -1 2-40 MDU -1 2-45 MDU -1 2-50 MDU -1 MDU -1 MDU -1 MDU -1 2-60 2-75 2-1 00 2-1 25 Delay Per Line (ns) 5 10 15 20 25 30 35 40 45 50 60 75 100 125 150 200 250 MDU -12-150 MDU -12-200 MDU -12-250 O


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PDF MDU-12 ECL-10KH MDU-12-150 MDU-12-200 MDU-12-250
MDU-3-60

Abstract: MDU-3-40 MDU 3-40
Text: Multiple Digital nplau Unit« series: MDU -3 IJGIdy UIIIU> (14 pins DIP) TIL interfaced data delay devicesYinc. Features: ■Completely interfaced for TTL & DTL application. ■P.C. board , Vcc= 5V; Ta= +25" C, no loads on taps. Delay Per Line Part No. (NS) MDU -3-5 5 MDU -3-1 0 10 MDU -3-1 5 15 MDU -3-20 20 MDU -3-25 25 MDU -3-30 30 MDU -3-35 35 MDU -3-40 40 MDU -3-45 45 MDU -3-50 50 MDU -3-60 60 MDU -3-75 75 MDU -3-1 00 100 Vcc OUT ! 14 12 OUT 3 I Other delay times available


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PDF MDU-3-20 MDU-3-25 MDU-3-30 MDU-3-35 MDU-3-40 MDU-3-45 MDU-3-50 MDU-3-60 MDU-3-75 MDU 3-40
28C45

Abstract: 018-TYP 28C10
Text: H CMOS - Logic SERIES: MDU -28C Delay Units is pins dip) delay devices; inc. Features: ■Auto-insertable. ■Low cost. ■Completely interfaced for CMOS. ■Low profile. ■Fits standard 8 pins , – DC parameters: See HCMOS Logic Table on Page 6. Delay Por Line Part No. (ns) MDU -28C-10 10 MDU -28C-12 12 MDU -28C-16 16 MDU -28C-20 20 MDU -28C-30 30 MDU -28C-35 35 MDU -28C-40 40 MDU -28C-45 45 MDU -28C-50 50 MDU -28C-60 60 MDU -28C-75 75 MDU -28C-100 100 Other delay times available on


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PDF MDU-28C MDU-28C-10 MDU-28C-12 MDU-28C-C-20 MDU-28C-30 MDU-28C-35 MDU-28C-40 MDU-28C-45 MDU-28C-50 MDU-28C-60 28C45 018-TYP 28C10
"8-Bit Microprocessors"

Abstract: 8085 microprocessor pin configuration
Text: . MDU ADDRESSED AS I/O DEVICE CAUTION: These devices are sensitive to electrostatic discharge. Users , Functional Description The CDP1855 is a multiply-divide unit ( MDU ) designed to be compatible with CDP1800 , in conjunction with the RA lines to determine the exact MDU response (See "CONTROL TRUTH TABLE"). When multiple MDU 's are cascaded, the loading of each reg ister is done sequentially. For example, the , on each MDU which are decremented by STB during each register selection. When the counter matches the


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PDF CDP1855, CDP1855C CDP1855 CDP1855C CDP1800-series "8-Bit Microprocessors" 8085 microprocessor pin configuration
2f30

Abstract: MDU2F100 2f150 MDU-2F-15
Text: EFasf Logic Multiple Digital S ER IES : MDU -2F Delay Units (14 pins DIP) T T L Interfaced Features: Auto-insertable Completely interfaced for TTL & DTL application. P.C. board space economy , taps. Delay Par Line Part No. (TO) MDU -2F-5 MDU -2F-10 MDU -2F-15 MDU -2F-20 MDU -2F-25 MDU -2F-30 MDU -2F-35 MDU -2F-40 MDU -2F-45 MDU -2F-50 MDU -2F-60 MDU -2F-75 MDU -2F-100 MDU -2F-125 MDU -2F-150 MDU -2F-200 MDU -2F-250 5 10 15 20 as 30 35 40 45 50 60 76 100 125 150 200 250 O ther delay tim es


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PDF MDU-2F-10 MDU-2F-15 MDU-2F-20 MDU-2F-25 MDU-2F-30 MDU-2F-35 MDU-2F-40 MDU-2F-45 MDU-2F-50 MDU-2F-60 2f30 MDU2F100 2f150
Not Available

Abstract: No abstract text available
Text: EFasf Logic Multiple Digital n _- u e ia y u m is Features: iB . . - ¡ i - SERIES: MDU -3F (14 pins DIP) T I L Interfaced Auto-insertable. Completely interfaced for TTL& DTL , : See TTL-Fast Schottky Logic Table on Page 6. Part No. Delay Per Line (ns) 5 to 15 MDU -3F-5 MDU -3F-10 MDU -3F-15 MDU -3F-20 MDU -3F-25 MDU -3F-30 MDU -3F-35 MDU -3F-40 MDU -3F-45 MDU -3F-50 MDU -3F-60 MDU -3 F-75 MDU -3 F-100 20 25 30 35 40 45 50 60 75 100 w1 O ther delay tim es available on


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PDF MDU-3F-10 MDU-3F-15 MDU-3F-20 MDU-3F-25 MDU-3F-30 MDU-3F-35 MDU-3F-40 MDU-3F-45 MDU-3F-50 MDU-3F-60
3F40

Abstract: 3F-40
Text: zFast Logic Multiple Digital nAi«. unit» series: MDU -3F lieiay UlllIS (14 pins DIP) TTL Interfaced data V&Q delay devices: i inc. Features: ■Auto-insertable. ■Completely interfaced for , Material: Nickel-iron aNoy42 TIN PLATE Delay Per Line Part No. (ns) MDU -3F-5 5 MDU -3F-1 0 10 MDU -3F-1 5 15 MDU -3F-20 20 MDU -3F-25 25 MDU -3F-30 30 MDU -3F-35 35 MDU -3F-40 40 MDU -3F-45 45 MDU -3F-50 50 MDU -3F-60 60 MDU -3F-75 75 MDU -3F-1 00 100 T .29C MAX L_L r .015 TYP. . .350 _J r~ MAX


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PDF aNoy42 MDU-3F-20 MDU-3F-25 MDU-3F-30 MDU-3F-35 MDU-3F-40 MDU-3F-45 MDU-3F-50 MDU-3F-60 MDU-3F-75 3F40 3F-40
Not Available

Abstract: No abstract text available
Text: Multiple Digital Delay UllitS S R S MDU -14 E IE: (24 pins DIP) 100K ECL Interfaced data delay inc. devicesY Features: ■In p u t & o u tp u t b u ffe re d . ■4 d e la y lin e s /p a , . MDU -1 4-2 MDU -1 4-2.5 MDU -1 4-3 MDU -1 4-4 MDU -1 4-5 .0 1 5 TYP. ji f-*- D elay P er L ine (N S ) 2 2.5 3 4 5 MDU -1 MDU -1 MDU -1 MDU -1 MDU -1 4-6 4-7 4-8 4-9 4-1 0 MDU -1 MDU -1 MDU -1 MDU -1 4-1 2.5 4-1 5 4 -2 0 4-25 Vee o u t, O 3 18 6 7 8 9 10


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PDF MDU-14
Not Available

Abstract: No abstract text available
Text: HCMOS - Logic Multiple Digital Delay Units SERIES: MDU -3C (14 pins DIP) data delay inc. devices; Features: ■Auto-insertable. ■Completely interfaced for CMOS application. ■P.C. board space economy achieved. ■Fits standard 14 pins DIP socket. ■3 equal delay units/package , Number Delay Par Line (ns) MDU -3C-10 MDU -3C-15 MDU -3C-20 MDU -3C-25 MDU -3C-30 10 15 20 25 30 MDU -3C-40 MDU -3C-50 MDU -3C-60 MDU -3C-75 MDU -3C-100 40 50 60 75 100 Other


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PDF MDU-3C-10 MDU-3C-15 MDU-3C-20 MDU-3C-25 MDU-3C-30 MDU-3C-40 MDU-3C-50 MDU-3C-60 MDU-3C-75 MDU-3C-100
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