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2003 - Not Available

Abstract: No abstract text available
Text: ) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring , 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS BP43/INT3/SD BP42/T2O , I/O Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ , density. Figure 3 . MARC4 Core MARC4 CORE Reset Program memory Reset Clock PC Instruction , -bit TOS CCR Interrupt controller ALU I/O bus On-chip peripheral modules 3 4701A­4BMCU­04


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PDF T48C893 SSO20) ATAR090-D
2004 - t2d1

Abstract: ATAM893 ATAR090-D BP23 BP40 SSO20 marc4
Text: ) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring , 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS BP43/INT3/SD BP42/T2O , I/O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected ­ , without any loss of efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE Reset Program , peripheral modules 3 4701C­4BMCU­12/04 Components of MARC4 Core The core contains ROM, RAM, ALU


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PDF ATAM893 SSO20) 4701C t2d1 ATAR090-D BP23 BP40 SSO20 marc4
2004 - ATAM893

Abstract: ATAR090-D BP23 BP40 SSO20 t2d1
Text: ) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring , 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS BP43/INT3/SD BP42/T2O , Input BP53 I/O Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input , language programming without any loss of efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE , /O bus On-chip peripheral modules 3 4701B­4BMCU­03/04 Components of MARC4 Core The


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PDF ATAM893 SSO20) 4701B ATAR090-D BP23 BP40 SSO20 t2d1
2004 - NT71C

Abstract: No abstract text available
Text: Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring Inclusive , 19 BP43/INT3/SD BP53/INT1 3 18 BP42/T2O BP52/INT1 4 17 BP41/VMI/T2I , external interrupt input 3 Input NC ­ Not connected ­ 9 ­ NC ­ Not , language programming without any loss of efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE , I/O bus On-chip peripheral modules 3 4675C­4BMCU­02/04 Figure 4. ROM Map 1F8h 1F0h


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PDF ATAM893 SSO20) ATAR080 4675C NT71C
2004 - K1247

Abstract: M1406
Text: Supply-voltage Range (1.8 V to 6.5 V) Very Low Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 , . Pinning SSO20 VDD 1 20 VSS BP40/INT3/SC 2 19 BP43/INT3/SD BP53/INT1 3 18 , Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected , density. Figure 3 . MARC4 Core MARC4 CORE Reset Program PC memory Reset X Y SP RP , -bit TOS CCR Interrupt controller ALU I/O bus On-chip peripheral modules 3 4676C­4BMCU­02


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PDF ATAM893 SSO20) ATAR080-D 4676C K1247 M1406
2004 - Not Available

Abstract: No abstract text available
Text: 6.5 V) Very Low Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and , . Pinning SSO20 VDD BP40/INT3/SC BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 OSC1 NRST/OSC2 NC NC 1 2 3 4 5 6 , NRST (mask option) or external clock input Pin No. SSO20 1 20 10 11 13 14 15 16 2 17 18 19 6 5 4 3 9 12 , efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE Reset Program memory PC X Y SP RP RAM 256 x 4 , System clock Sleep On-chip peripheral modules 3 4676C­4BMCU­02/04 Components of MARC4 Core


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PDF ATAM893 SSO20) ATAR080-D 4676C
2003 - t2d1

Abstract: pulse position modulation demodulation SM-14J NTE cross
Text: Range (1.8 V to 6.5 V) Very Low Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 , 256 x 4 bit SSI BP20/NTE BP21 RAM 4 K x 8 bit BP10 Timer 3 8-bit timer / counter , 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS BP43/INT3/SD BP42/T2O , INT1 external interrupt input 3 Input BP60 I/O Bi-directional I/O line of Port 6.0 T3O Timer 3 output 9 Input BP63 I/O Bi-directional I/O line of Port 6.3 T3I Timer 3


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PDF T48C893 SSO20) ATAR092-D t2d1 pulse position modulation demodulation SM-14J NTE cross
2004 - ATAM893

Abstract: ATAM894 ATAR080 ATAR090 ATAR092 ATAR890 ATAR892 T48C510
Text: compatibility reasons, the access to the EEPROM is handled via the MCL (serial interface) as in the corresponding ROM parts. A difference in behavior can be observed when the communication via the MCL has not , . Only for ATAM893 the Timer 2 output (BP42) and the Timer 3 output (BP60) are configured as high , modified regarding the issues 1 to 3 , described in the "Enhancement Report", there may occur additional , customer in order to prevent unwanted behavior. 3 4695B­4BMCU­02/04 Atmel Corporation 2325


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PDF ATAM893, ATAM894 T48C510 ATAM893 ATAM894 32-kHz 4695B ATAR080 ATAR090 ATAR092 ATAR890 ATAR892
2004 - SSO20

Abstract: ATAM893 ATAR080 BP23 BP40
Text: Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring Inclusive , BP50/INT6 OSC1 NRST/OSC2 NC NC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 , external interrupt input 3 Input NC ­ Not connected ­ 9 ­ NC ­ Not , language programming without any loss of efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE X , I/O bus On-chip peripheral modules 3 4675D­4BMCU­12/04 Figure 4. ROM Map 1F8h 1F0h


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PDF ATAM893 SSO20) ATAR080 4675D SSO20 BP23 BP40
2004 - ATAM893

Abstract: ATAR080-D BP23 BP40 SSO20
Text: Supply-voltage Range (1.8 V to 6.5 V) Very Low Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 , . Pinning SSO20 VDD 1 20 VSS BP40/INT3/SC 2 19 BP43/INT3/SD BP53/INT1 3 18 , Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected , density. Figure 3 . MARC4 Core MARC4 CORE Reset Program PC memory Reset X Y SP RP , -bit TOS CCR Interrupt controller ALU I/O bus On-chip peripheral modules 3 4676D­4BMCU­12


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PDF ATAM893 SSO20) ATAR080-D 4676D BP23 BP40 SSO20
2003 - U505M

Abstract: D flip-flop to T Flipflop circuit converter ATAR090 ATAR890 BP23 BP40 SSO20 T48C893 TRANSISTOR 7812 DIAGRAM
Text: Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring Inclusive Lo_BAT , /SC BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 OSC1 OSC2 NC NC 1 2 3 4 5 6 7 8 9 10 , Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected , density. Figure 3 . MARC4 Core MARC4 CORE Reset Program memory Reset Clock PC Instruction , -bit TOS CCR Interrupt controller ALU I/O bus On-chip peripheral modules 3 4696A­4BMCU­03


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PDF 16-bit ATAR890 T48C893 SSO20) ATAR090 U505M D flip-flop to T Flipflop circuit converter BP23 BP40 SSO20 TRANSISTOR 7812 DIAGRAM
2004 - 2m137

Abstract: P41M2 bi 370 transistor INTERVAL TIMER TEST ATA6020N ATAM893 BP23 BP40 SSO20
Text: Interrupt Sources Synchronous Serial Interface (2-wire, 3 -wire) Multifunction Timer/Counter with ­ , 19 BP43/INT3/SD BP53/INT1 3 18 BP42/T2O BP52/INT1 4 17 BP41/VMI/T2I , INT1 external interrupt input 3 Input NC ­ Not connected ­ 9 ­ NC ­ , language programming without any loss of efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE , I/O bus On-chip peripheral modules 3 4708C­4BMCU­02/04 Components of MARC4 Core The


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PDF ATAM893 SSO20) ATA6020N 4708C 2m137 P41M2 bi 370 transistor INTERVAL TIMER TEST BP23 BP40 SSO20
2005 - so41

Abstract: ATA6020N ATAM893 BP23 BP40 SSO20 LA 4138
Text: Interrupt Sources Synchronous Serial Interface (2-wire, 3 -wire) Multifunction Timer/Counter with ­ , 20 VSS BP40/INT3/SC 2 19 BP43/INT3/SD BP53/INT1 3 18 BP42/T2O BP52/INT1 , Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected , input ATA6020N 4708D­4BMCU­09/05 ATA6020N 3 . Introduction The ATA6020N is a member of Atmel , -bit Interrupt controller TOS CCR ALU I/O bus On-chip peripheral modules 3 4708D­4BMCU­09/05


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PDF ATAM893 SSO20) ATA6020N 4708D so41 BP23 BP40 SSO20 LA 4138
2003 - D flip-flop to T Flipflop circuit converter

Abstract: t2d1 CMOS flipflop ATAM893 ATAR080-D BP23 BP40 SSO20 4 mhz oscillator
Text: Supply-voltage Range (1.8 V to 6.5 V) Very Low Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 , VDD 1 20 VSS BP40/INT3/SC 2 19 BP43/INT3/SD BP53/INT1 3 18 BP42/T2O , /O line of Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected ­ , density. Figure 3 . MARC4 Core MARC4 CORE Reset Program PC memory Reset Clock X Y SP , TOS CCR Interrupt controller ALU I/O bus On-chip peripheral modules 3 4676A­4BMCU­02


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PDF ATAM893 SSO20) ATAR080-D D flip-flop to T Flipflop circuit converter t2d1 CMOS flipflop BP23 BP40 SSO20 4 mhz oscillator
2014 - Not Available

Abstract: No abstract text available
Text: Synchronous serial interface (2-wire, 3 -wire) Multifunction timer/counter with ● Watchdog, POR and , /INT1 3 18 BP42/T2O BP52/INT1 4 17 BP41/VMI/T2I BP51/INT6 5 16 BP23 , external interrupt input 3 Input NC – Not connected – 9 – NC – Not , ] 4708E–4BMCU–03/14 3 2. Introduction The Atmel® ATA6020N is a member of Atmel 4-bit single-chip , generation with integrated RC-oscillators. 3 . MARC4 Architecture General Description The MARC4


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PDF ATA6020N ATAM893 SSO20)
2003 - D flip-flop to T Flipflop circuit converter

Abstract: GATED crystal OSCILLATOR ATAM893 ATAR080 BP23 BP40 SSO20 4Mhz oscillator
Text: Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring Inclusive , /INT3/SD BP53/INT1 3 18 BP42/T2O BP52/INT1 4 17 BP41/VMI/T2I BP51/INT6 5 , interrupt input 3 Input NC ­ Not connected ­ 9 ­ NC ­ Not connected ­ , language programming without any loss of efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE , I/O bus On-chip peripheral modules 3 4675A­4BMCU­03/03 Figure 4. ROM Map 1F8h 1F0h


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PDF ATAM893 SSO20) ATAR080 D flip-flop to T Flipflop circuit converter GATED crystal OSCILLATOR BP23 BP40 SSO20 4Mhz oscillator
2004 - T3Cs

Abstract: ATAM893 nte cross reference U505M SSO20 BP40 BP23 BP13 ATAR092-D M1543
Text: Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out , , i n t e g r a t e d R C - , 3 2 -k H z c r y s t a l - a n d 4 - M H z crystal-oscillators , 3 8-bit timer/counter with modulator and demodulator I/O bus Data direction + alternate , OSC2 BP60/T3O BP10 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS , I/O Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input BP60


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PDF ATAM893 SSO20) 4594C T3Cs nte cross reference U505M SSO20 BP40 BP23 BP13 ATAR092-D M1543
2003 - D flip-flop to T Flipflop circuit converter

Abstract: U505M MCL 0 105 ATAR090-C ATAR890-C BP23 BP40 SSO20 T48C893
Text: (ATAR890-C only) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function , /INT6 OSC1 OSC2 NC NC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 , Port 5.3 INT1 external interrupt input 3 Input NC ­ Not connected ­ 9 ­ , density. Figure 3 . MARC4 Core MARC4 CORE Reset Program memory Reset Clock PC Instruction , -bit TOS CCR Interrupt controller ALU I/O bus On-chip peripheral modules 3 4700A­4BMCU­04


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PDF 16-bit ATAR890-C T48C893 SSO20) ATAR090-C D flip-flop to T Flipflop circuit converter U505M MCL 0 105 BP23 BP40 SSO20
2004 - Not Available

Abstract: No abstract text available
Text: Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring Inclusive Lo_BAT , BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 OSC1 OSC2 NC NC 1 2 3 4 5 6 7 8 9 10 20 , INT1 external interrupt input 3 Input NC ­ Not connected ­ 9 ­ NC ­ , architecture enables high-level language programming without any loss of efficiency or code density. Figure 3 , Interrupt controller ALU I/O bus On-chip peripheral modules 3 4696C­4BMCU­02/04 Components


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PDF 16-bit ATAR890 ATAM893 SSO20) ATAR090 4696C
2004 - ATAM893

Abstract: BP13 BP23 BP40 SSO20 M1543 osc1
Text: Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out , , i n t e g r a t e d R C - , 3 2 -k H z c r y s t a l - a n d 4 - M H z crystal-oscillators , 3 8-bit timer/counter with modulator and demodulator I/O bus Data direction + alternate , OSC2 BP60/T3O BP10 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS , I/O Bi-directional I/O line of Port 5.3 INT1 external interrupt input 3 Input BP60


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PDF ATAM893 SSO20) 4594B BP13 BP23 BP40 SSO20 M1543 osc1
2005 - BP51 3A

Abstract: No abstract text available
Text: External/Internal Interrupt Sources Synchronous Serial Interface (2-wire, 3 -wire) Multifunction Timer , . Pinning SSO20 Package 1 20 VSS BP40/INT3/SC 2 19 BP43/INT3/SD BP53/INT1 3 18 , input 3 Input NC – Not connected – 9 – NC – Not connected â , ATA6020N 3 . Introduction The ATA6020N is a member of Atmel’s 4-bit single-chip microcontroller family , I/O bus On-chip peripheral modules 3 4708D–4BMCU–09/05 4.1 Components of MARC4 Core


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PDF ATAM893 SSO20) ATA6020N 4708Dâ BP51 3A
2004 - ATAM893

Abstract: ATAR090 ATAR890 BP23 BP40 SSO20 M1406 U505M
Text: Interface (2-wire, 3 -wire) Watchdog, POR and Brown-out Function Voltage Monitoring Inclusive Lo_BAT , BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 OSC1 OSC2 NC NC 1 2 3 4 5 6 7 8 9 10 20 , INT1 external interrupt input 3 Input NC ­ Not connected ­ 9 ­ NC ­ , architecture enables high-level language programming without any loss of efficiency or code density. Figure 3 , Interrupt controller ALU I/O bus On-chip peripheral modules 3 4696D­4BMCU­12/04 Components


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PDF 16-bit ATAR890 ATAM893 SSO20) ATAR090 4696D BP23 BP40 SSO20 M1406 U505M
2005 - Not Available

Abstract: No abstract text available
Text: External/Internal Interrupt Sources Synchronous Serial Interface (2-wire, 3 -wire) Multifunction Timer , . Pinning SSO20 Package VDD 20 VSS BP40/INT3/SC 2 19 BP43/INT3/SD BP53/INT1 3 18 , interrupt input 3 Input NC – Not connected – 9 – NC – Not connected , 4708D–4BMCU–09/05 ATA6020N 3 . Introduction The ATA6020N is a member of Atmel’s 4-bit single-chip , CCR ALU I/O bus One chip peripheral modules 3 4708D–4BMCU–09/05 4.1 Components


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PDF ATAM893 SSO20) ATA6020N 4708Dâ
2004 - mcl m1

Abstract: No abstract text available
Text: (< 1 µA) 32 ´ 16-bit EEPROM (ATAR890 only) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR , /INT1 BP51/INT6 BP50/INT6 OSC1 OSC2 NC NC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS BP43 , 14 15 16 2 17 18 19 6 5 4 3 9 12 7 Reset State NA NA ­ ­ Input Input Input Input Input Input Input , architecture enables high-level language programming without any loss of efficiency or code density. Figure 3 , bus ALU On-chip peripheral modules 3 4696B­4BMCU­01/04 Components of MARC4 Core ROM


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PDF 16-bit ATAR890 ATAM893 SSO20) ATAR090 4696B mcl m1
2003 - Not Available

Abstract: No abstract text available
Text: 6.5 V) Very Low Sleep Current (< 1 µA) Synchronous Serial Interface (2-wire, 3 -wire) Watchdog, POR and , . Pinning SSO20 VDD BP40/INT3/SC BP53/INT1 BP52/INT1 BP51/INT6 BP50/INT6 OSC1 NRST/OSC2 NC NC 1 2 3 4 5 6 , NRST (mask option) or external clock input Pin No. SSO20 1 20 10 11 13 14 15 16 2 17 18 19 6 5 4 3 9 12 , efficiency or code density. Figure 3 . MARC4 Core MARC4 CORE Reset Program memory PC X Y SP RP RAM 256 x 4 , System clock Sleep On-chip peripheral modules 3 4676B­4BMCU­12/03 Components of MARC4 Core


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PDF ATAM893 SSO20) ATAR080-D 4676B
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