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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTM4600IV#2DHPBF Linear Technology LTM4600 - 10A High Efficiency DC/DC µModule; Package: LGA; Pins: 104; Temperature: Industrial
LTM9004IV-AD#PBF Linear Technology LTM9004 - 14-Bit Direct Conversion Receiver Subsystem; Package: LGA; Pins: 204; Temperature Range: -40°C to 85°C
LTM9004IV-AB#PBF Linear Technology LTM9004 - 14-Bit Direct Conversion Receiver Subsystem; Package: LGA; Pins: 204; Temperature Range: -40°C to 85°C
LTM9004CV-AA#PBF Linear Technology LTM9004 - 14-Bit Direct Conversion Receiver Subsystem; Package: LGA; Pins: 204; Temperature Range: 0°C to 70°C
LTM9004IV-AC#PBF Linear Technology LTM9004 - 14-Bit Direct Conversion Receiver Subsystem; Package: LGA; Pins: 204; Temperature Range: -40°C to 85°C
LTM9004CV-AC#PBF Linear Technology LTM9004 - 14-Bit Direct Conversion Receiver Subsystem; Package: LGA; Pins: 204; Temperature Range: 0°C to 70°C

land pattern for vsop 60 pins Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - PHD64

Abstract: land pattern for vsop 8 pins land pattern for vsop DCA56 DFD64 DED28 DAP38 PZT10 PFC80 PWD14
Text: pins ), and TQFP (32 through 256 pins ), are readily suited for use of this technology. Thinner , = * Samples used for these stresses were preconditioned with 192 hours of 30C/ 60 %RH soak followed , package thermal pad to the thermal land on the PCB. Figure 11. The PCB layout for a 64 pin PowerPADTM , below. The results obtained using the recommended PCB thermal land pattern on the PCB, and with the , Enhanced Package slma002.pdf Figure 12. Typical PCB thermal land and via patterns for use with


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PDF 100MHz PHD64 land pattern for vsop 8 pins land pattern for vsop DCA56 DFD64 DED28 DAP38 PZT10 PFC80 PWD14
1998 - Ultrasonic humidifier circuit

Abstract: land pattern for vsop 60 pins quality MANUALS ultrasonic humidifiers land pattern for vsop Humidity and Temperature Probe Ultrasonic humidifier 40KHZ ULTRASONIC Power SC82AB SC-82AB
Text: 150±10°C 30±10s 90±30s Time (s) 9 RELIABILITY TEST REQUIREMENTS ( for VSOP -0.65mm pin pitch , .Recommended Heating Profile Fig-1: IR Reflow Soldering for SOT-23/SOT-89/SOT-89-5/SC-82AB/SOP/SSOP/ VSOP 10s MAX , ) for SOP/SSOP/ VSOP 215±5 30s MAX. Surface Temperature (°C) 150±10 90±30s 1 to 5°C/s Time (s , RECOMMENDED LAND PATTERN · SOT-89 · SOT-89-5 0.7 MAX. 1.0 0.7 MAX. 2.0 1.5 3.0 0.7 45 , QUALITY POLICY QUALITY POLICY 1. To establish and maintain a system for continuously grasping and


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PDF OT-23/TO-92 OT-89 OT-89-5 OT-23-5 SC-82AB Ultrasonic humidifier circuit land pattern for vsop 60 pins quality MANUALS ultrasonic humidifiers land pattern for vsop Humidity and Temperature Probe Ultrasonic humidifier 40KHZ ULTRASONIC Power SC82AB SC-82AB
2012 - 25Q80BVAIG

Abstract: 25Q80BVA WINBOND 25Q80BVSIG winbond 25Q80BVAIG W25Q80BV 25Q80BVNIG 25q80bv land pattern for Uson 2x3 USON-8 25Q80BVSIG
Text: a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility , . 6 3.1 3.2 3.3 3.4 3.5 3.6 4. 4.1 4.2 4.3 4.4 4.5 5. 6. Pin Configuration SOIC / VSOP 150 / 208 , -mil. 7 Pin Description SOIC, VSOP , WSON, USON & PDIP 300-mil . , ) . 22 Write Enable for Volatile Status Register (50h , . 60 Publication Release Date: Augest 01, 2012 Revision G -3- W25Q80BV 8.1 8.2 8.3 8.4 8.5


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PDF W25Q80BV 208-mil 25Q80BVAIG 25Q80BVA WINBOND 25Q80BVSIG winbond 25Q80BVAIG W25Q80BV 25Q80BVNIG 25q80bv land pattern for Uson 2x3 USON-8 25Q80BVSIG
2010 - Not Available

Abstract: No abstract text available
Text: (200mil) - 8-pin VSOP (200mil) - 8- land WSON (8x6mm) - 8- land WSON (6x5mm) - 24-ball TFBGA , it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output. The , ). 40 Figure 21. Chip Erase (CE) Sequence (Command 60 or C7 , FLASH 1. FEATURES GENERAL • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and , protection against program and erase instructions - Additional 512 bit secured OTP for unique identifier


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PDF MX25L6406E PM1577
25Q80BVA

Abstract: 25q80bv 25q80 25Q80bvs 25q80bvaig 25q80bvsig land pattern for vsop 8 pins w25q80bv W25Q80b winbond* W25Q
Text: a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility , . 6 3.1 3.2 3.3 3.4 3.5 3.6 4. 4.1 4.2 4.3 4.4 4.5 5. 6. Pin Configuration SOIC / VSOP 150 / 208 , -mil . 7 Pin Description SOIC, VSOP , WSON, USON & PDIP 300 , ) . 22 Write Enable for Volatile Status Register (50h , . 60 8.1 Absolute Maximum Ratings


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PDF W25Q80BV 208-mil 25Q80BVA 25q80bv 25q80 25Q80bvs 25q80bvaig 25q80bvsig land pattern for vsop 8 pins w25q80bv W25Q80b winbond* W25Q
2010 - mxic mx25l6406e

Abstract: No abstract text available
Text: (200mil) - 8-pin VSOP (200mil) - 8- land WSON (8x6mm) - 8- land WSON (6x5mm) - 24-ball TFBGA , it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output. The , ). 40 Figure 21. Chip Erase (CE) Sequence (Command 60 or C7 , FLASH 1. FEATURES GENERAL • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and , software protection against program and erase instructions - Additional 512 bit secured OTP for unique


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PDF MX25L6406E PM1577 mxic mx25l6406e
2012 - 25Q16DVSIG

Abstract: 25Q16DVS W25Q16DV W25Q16DVS W25Q16DVSNIG W25Q16DVSFIG W25Q16DVSSIG Winbond 25Q16dVSIG PDIP8 25q16dvnig
Text: provides a storage solution for systems with limited space, pins and power. The 25Q series offers , . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 4. 4.1 4.2 4.3 4.4 4.5 5. 6. Pin Configuration SOIC / VSOP 150 , -mil . 7 Pin Description SOIC / VSOP 150/208-mil, WSON 6x5-mm & PDIP 300-mil. 7 Pin , ) . 23 Write Enable for Volatile Status Register (50h , ) . 60 Enable Reset (66h) and Reset (99h


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PDF W25Q16DV 16M-BIT 208-mil 25Q16DVSIG 25Q16DVS W25Q16DV W25Q16DVS W25Q16DVSNIG W25Q16DVSFIG W25Q16DVSSIG Winbond 25Q16dVSIG PDIP8 25q16dvnig
2013 - Not Available

Abstract: No abstract text available
Text: a storage solution for systems with limited space, pins and power. The 25Q series offers , -mil. 7 3.4 Pin Description SOIC / VSOP 150/208-mil, WSON 6x5-mm & PDIP 300 , -mm . 9 3.8 4. Pin Configuration SOIC / VSOP 150 / 208 , ) . 23 7.2.6 Write Enable for Volatile Status Register (50h , ) . 60 ELECTRICAL CHARACTERISTICS


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PDF W25Q16CV 16M-BIT
2012 - 25Q16CVSIG

Abstract: w25q16cvssig W25Q16CV land pattern for vsop 8 pins
Text: provides a storage solution for systems with limited space, pins and power. The 25Q series offers , . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 4. 4.1 4.2 4.3 4.4 4.5 5. 6. Pin Configuration SOIC / VSOP 150 , -mil . 7 Pin Description SOIC / VSOP 150/208-mil, WSON 6x5-mm & PDIP 300-mil. 7 Pin , ) . 23 Write Enable for Volatile Status Register (50h , ) . 60 8. ELECTRICAL CHARACTERISTICS


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PDF W25Q16CV 16M-BIT 208-mil 25Q16CVSIG w25q16cvssig W25Q16CV land pattern for vsop 8 pins
2012 - 25q64fvsig

Abstract: WINBOND 25Q64FVSIG 25Q64FVAIG 25q64fv W25Q64FV 25Q64FVFIG 25q64 land pattern for vsop 8 pins 25q64f W25Q64FVSSIG
Text: provides a storage solution for systems with limited space, pins and power. The 25Q series offers , bidirectional IO0 and IO1, and the /WP and /HOLD pins become IO2 and IO3 respectively. See Figure 3 for the , . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 4. 4.1 4.2 4.3 4.4 4.5 5. 6. Pin Configuration SOIC / VSOP 208 , -mil . 7 Pin Description SOIC/ VSOP 208-mil, WSON 6x5/8x6-mm and PDIP 300-mil . 7 Pin , ) . 25 Write Enable for Volatile Status Register (50h


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PDF W25Q64FV 64M-BIT 208-mil 25q64fvsig WINBOND 25Q64FVSIG 25Q64FVAIG 25q64fv W25Q64FV 25Q64FVFIG 25q64 land pattern for vsop 8 pins 25q64f W25Q64FVSSIG
Not Available

Abstract: No abstract text available
Text: a storage solution for systems with limited space, pins and power. The 25Q series offers , -mil. 7 3.4 Pin Description SOIC / VSOP 150/208-mil, WSON 6x5-mm & PDIP 300 , -mm . 9 3.8 4. Pin Configuration SOIC / VSOP 150 / 208 , ) . 23 7.2.6 Write Enable for Volatile Status Register (50h , ) . 60 ELECTRICAL CHARACTERISTICS


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PDF W25Q16CV 16M-BIT 300-mions
2013 - W25Q64FV

Abstract: WINBOND 25Q64FVSIG winbond w25q64fv
Text: a storage solution for systems with limited space, pins and power. The 25Q series offers , the /WP and /HOLD pins become IO2 and IO3 respectively. See Figure 3 for the device operation modes , . 6 3.1 Pin Configuration SOIC / VSOP 208 , -mil. 7 3.4 Pin Description SOIC/ VSOP 208-mil, WSON 6x5/8x6-mm and PDIP 300-mil . , ) . 25 6.2.7 Write Enable for Volatile Status Register (50h


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PDF W25Q64FV 64M-BIT 208-mil W25Q64FV WINBOND 25Q64FVSIG winbond w25q64fv
2013 - W25Q64FV

Abstract: 25q64fvsig winbond w25q64fv 25Q64FVAIG 25q64fv WINBOND 25Q64FVSIG 25q64f 25Q64FVFIG W25Q64FVSSIG W 25Q64FVSIG
Text: provides a storage solution for systems with limited space, pins and power. The 25Q series offers , W25Q64FV default for Quad Enabled part numbers with ordering option "IQ"), the Quad IO2 and IO3 pins are , / VSOP 208-mil . 6 Pad , -mil. 7 Pin Description SOIC/ VSOP 208-mil, WSON 6x5/8x6-mm and PDIP 300-mil . 7 Pin , ) . 26 Write Enable for Volatile Status Register (50h


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PDF W25Q64FV 64M-BIT 208-mil W25Q64FV 25q64fvsig winbond w25q64fv 25Q64FVAIG 25q64fv WINBOND 25Q64FVSIG 25q64f 25Q64FVFIG W25Q64FVSSIG W 25Q64FVSIG
2012 - 25q64fvsig

Abstract: 25q64fv 25Q64FVAIG WINBOND 25Q64FVSIG 25q64 W25Q64FV 25q64f 25Q64FVFIG 25q64fva W25Q64FVSSIQ
Text: provides a storage solution for systems with limited space, pins and power. The 25Q series offers , . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 4. 4.1 4.2 4.3 4.4 4.5 5. 6. Pin Configuration SOIC / VSOP 208 , -mil . 7 Pin Description SOIC/ VSOP 208-mil, WSON 6x5/8x6-mm and PDIP 300-mil . 7 Pin , ) . 25 Write Enable for Volatile Status Register (50h , ). 60 Read JEDEC ID (9Fh


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PDF W25Q64FV 64M-BIT 208-mil 25q64fvsig 25q64fv 25Q64FVAIG WINBOND 25Q64FVSIG 25q64 W25Q64FV 25q64f 25Q64FVFIG 25q64fva W25Q64FVSSIQ
2013 - W25Q128FV

Abstract: winbond 25q128fvsg 25Q128fv 25q128fvsg 25Q128 25Q128FVFG W25Q128F w25q128bv W25Q128FVEIF 25Q128F
Text: IO1, and the /WP and /HOLD pins become IO2 and IO3 respectively. See Figure 3 for the device operation , / VSOP 208-mil . 6 Pad , Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm . 6 Pin , ) . 29 Write Enable for Volatile Status Register (50h , ) . 60 Read Manufacturer / Device ID (90h


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PDF W25Q128FV 128M-BIT 208-mil W25Q128FV winbond 25q128fvsg 25Q128fv 25q128fvsg 25Q128 25Q128FVFG W25Q128F w25q128bv W25Q128FVEIF 25Q128F
2010 - MX25L6406E

Abstract: MX25L6406 25l6406e MX25L6406EM2I-12G mxic mx25l6406e MX25L6406EM MX25L6406EM2 data mx25L6406E land pattern for vsop 8 pins MX25L6406EZNI-12G
Text: -pin VSOP (200mil) - 8- land WSON (8x6mm) - 24-ball TFBGA (6x8mm, 4x6 ball array) - 24-ball TFBGA (6x8mm , SIO0 and SIO1 pins for data output. The device provides sequential read operation on whole chip. After , ). 40 Figure 20. Chip Erase (CE) Sequence (Command 60 or C7 , FLASH FEATURES GENERAL · Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program , be software protection against program and erase instructions - Additional 512 bit secured OTP for


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PDF MX25L6406E MX25L6406E PM1577 MX25L6406 25l6406e MX25L6406EM2I-12G mxic mx25l6406e MX25L6406EM MX25L6406EM2 data mx25L6406E land pattern for vsop 8 pins MX25L6406EZNI-12G
CXD1231Q-Z

Abstract: 100MIL CXD1230M SPA31
Text: for received The land station confirms a mobile station through receiving SAT signal in the same , modulation/ demodulation IC developed for cellular radio telephone. Usage in conjunction with filter IC , fixed at low level. 6 Vss - GND 7 KADJ I PLL lock range select input for received manchester Data , designed for the US cellular radio telephone system. Combined with the switched capacitor filter CXD1230M , ) Detection of the received SAT. 3) SAT transmission in the same frequency and phase as for received. 4


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PDF CXD1231Q-Z CXD1230M QFP-48P-L04 50MIL) 127mm 100MIL SPA31
2013 - Not Available

Abstract: No abstract text available
Text: the /WP and /HOLD pins become IO2 and IO3 respectively. See Figure 3 for the device operation modes , one of the four data I/O pins . For the SOIC-16 package, W25Q128FV provides a dedicated /RESET pin in , . 6 3.1 Pin Configuration SOIC / VSOP 208 , -mm. 6 3.3 Pin Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6 , ) . 30 8.2.2 Write Enable for Volatile Status Register (50h


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PDF W25Q128FV 128M-BIT 208-mil
2013 - Not Available

Abstract: No abstract text available
Text: bidirectional IO0 and IO1, and the /WP and /HOLD pins become IO2 and IO3 respectively. See Figure 3 for the , will be disabled, the pin will become one of the four data I/O pins . For the SOIC-16 package , -mm . 6 3.3 Pin Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6 , -mil . 9 3.9 4. Pin Configuration SOIC 208-mil / VSOP 208 , ) . 29 8.2.2 Write Enable for Volatile Status Register (50h


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PDF W25Q32FV 32M-BIT 208-mil,
2012 - w25q128

Abstract: winbond 25q128fvsg 25Q128FVFG 25q128fvsg 25Q128fv 25Q128F 25Q128 W25Q128F 25Q128FVSQ w25q128fv
Text: IO1, and the /WP and /HOLD pins become IO2 and IO3 respectively. See Figure 3 for the device operation , . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4. 4.1 4.2 4.3 4.4 4.5 4.6 5. 6. Pin Configuration SOIC / VSOP , Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm . 6 Pin , ) . 28 Write Enable for Volatile Status Register (50h , ) . 86 8-Pin VSOP 208-mil (Package Code T


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PDF W25Q128FV 128M-BIT 208-mil w25q128 winbond 25q128fvsg 25Q128FVFG 25q128fvsg 25Q128fv 25Q128F 25Q128 W25Q128F 25Q128FVSQ w25q128fv
2012 - winbond 25q128fvsg

Abstract: 25Q128fv 25q128fvsg 25Q128 25Q128F 25Q128FVFG 25Q128FVSQ W25Q128F W25Q128FV IO320
Text: be disabled, the pin will become one of the four data I/O pins . For the SOIC-16 package, W25Q128FV , . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4. 4.1 4.2 4.3 4.4 4.5 4.6 5. 6. Pin Configuration SOIC / VSOP , Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm . 6 Pin , ) . 28 Write Enable for Volatile Status Register (50h , ) . 86 8-Pin VSOP 208-mil (Package Code T


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PDF W25Q128FV 128M-BIT 208-mil winbond 25q128fvsg 25Q128fv 25q128fvsg 25Q128 25Q128F 25Q128FVFG 25Q128FVSQ W25Q128F W25Q128FV IO320
2013 - W25Q32FV

Abstract: 25Q32FV 25q32fvsig WINBOND 25Q32FVSIG 25Q32F W25Q32FVSSIG W25Q32FV application note W25Q32F W25Q32 25Q32fvsiq
Text: , the pin will become one of the four data I/O pins . For the SOIC-16 package, W25Q32FV provides a , (factory default for Quad Enabled part numbers with ordering option "IQ"), the Quad IO2 and IO3 pins are , -mil / VSOP 208-mil . 6 Pad Configuration WSON , Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm . 7 Pin , ) . 30 Write Enable for Volatile Status Register (50h


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PDF W25Q32FV 32M-BIT 208-mil 208-mil W25Q32FV 25Q32FV 25q32fvsig WINBOND 25Q32FVSIG 25Q32F W25Q32FVSSIG W25Q32FV application note W25Q32F W25Q32 25Q32fvsiq
2012 - 25q32fvsig

Abstract: WINBOND 25Q32FVSIG 25Q32FV W25Q32f A22 MARKING soic8 W25Q32B IO351 W25Q32BV application note 1F00FFh 25Q32FVSIQ
Text: /RESET function will be disabled, the pin will become one of the four data I/O pins . For the SOIC , -mil / VSOP 208-mil. 6 Pad Configuration WSON , Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm . 6 Pin , ) . 28 Write Enable for Volatile Status Register (50h , ) . 86 8-Pin VSOP 208-mil (Package Code ST


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PDF W25Q32FV 32M-BIT 208-mil 208-mil. 25q32fvsig WINBOND 25Q32FVSIG 25Q32FV W25Q32f A22 MARKING soic8 W25Q32B IO351 W25Q32BV application note 1F00FFh 25Q32FVSIQ
2013 - WINBOND 25Q64CVSIG

Abstract: No abstract text available
Text: a storage solution for systems with limited space, pins and power. The 25Q series offers , -mil. 7 3.4 Pin Description SOIC/ VSOP 208-mil, WSON 6x5/8x6-mm and PDIP 300-mil . , -mm . 9 3.8 4. Pin Configuration SOIC / VSOP 208 , ) . 23 7.2.6 Write Enable for Volatile Status Register (50h , ) . 60 ELECTRICAL CHARACTERISTICS


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PDF W25Q64CV 64M-BIT 300-mil. WINBOND 25Q64CVSIG
2012 - 25Q32FV

Abstract: WINBOND 25Q32FVSIG 25q32fvsig W25Q32F 25Q32F 25q32 25Q32fvsiq W25Q32FVSSIG W25Q32FV W25Q32B
Text: be disabled, the pin will become one of the four data I/O pins . For the SOIC-16 package, W25Q32FV , -mil / VSOP 208-mil. 6 Pad Configuration WSON , Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm . 6 Pin , ) . 28 Write Enable for Volatile Status Register (50h , ) . 86 8-Pin VSOP 208-mil (Package Code ST


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PDF W25Q32FV 32M-BIT 208-mil 208-mil. 25Q32FV WINBOND 25Q32FVSIG 25q32fvsig W25Q32F 25Q32F 25q32 25Q32fvsiq W25Q32FVSSIG W25Q32FV W25Q32B
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