The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
ISPLSI 1048E-90LQN Lattice Semiconductor Corporation CPLD ispLSI® 1000E Family 8K Gates 192 Macro Cells 90.9MHz EECMOS Technology 5V 128-Pin PQFP, Temperature Range: 0 to 70 °C
ISPLSI 1048E-90LQ Lattice Semiconductor Corporation IC CPLD 192MC 10NS 128QFP
ISPLSI 1048E-50LQ Lattice Semiconductor Corporation IC CPLD 192MC 20NS 128QFP
ISPLSI 1048E-90LTN Lattice Semiconductor Corporation CPLD ispLSI® 1000E Family 8K Gates 192 Macro Cells 90.9MHz EECMOS Technology 5V 128-Pin TQFP, Temperature Range: 0 to 70 °C
ISPLSI 1048E-50LTN Lattice Semiconductor Corporation CPLD ispLSI® 1000E Family 8K Gates 192 Macro Cells 50MHz EECMOS Technology 5V 128-Pin TQFP
ISPLSI 1048E-90LT Lattice Semiconductor Corporation IC CPLD 192MC 10NS 128TQFP

ispLSI 6192SM Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1996 - DMA controller

Abstract: timing diagram of DMA Transfer "Single-Port RAM"
Text: DMA Controller Using ispLSI 6192SM ® PARITY_ERR pin when a memory parity error has occurred , controller with a separate on-board memory block using the ispLSI 6192SM from Lattice Semiconductor. The , controller takes advantage of the on-board Register/Counter block of the ispLSI 6192SM for storing word , address and word count information simplifies the DMAC design and frees up logic in the ispLSI 6192SM , of the ispLSI 6192SM . To improve Central Processing Unit (CPU) throughput


Original
PDF 6192SM 6192SM 16-bit 16-bit an8004 DMA controller timing diagram of DMA Transfer "Single-Port RAM"
1996 - ispLSI 6192SM

Abstract: timing diagram of DMA Transfer dmac with I/O priority arbitration system dma controller
Text: DMA Controller Using ispLSI ® 6192SM PARITY_ERR pin when a memory parity error has occurred , controller with a separate on-board memory block using the ispLSI 6192SM from Lattice Semiconductor. The , controller takes advantage of the on-board Register/Counter block of the ispLSI 6192SM for storing word , address and word count information simplifies the DMAC design and frees up logic in the ispLSI 6192SM , of the ispLSI 6192SM . To improve Central Processing Unit (CPU) throughput


Original
PDF 6192SM 6192SM 16-bit 16-bit an8004 ispLSI 6192SM timing diagram of DMA Transfer dmac with I/O priority arbitration system dma controller
1996 - timing diagram of DMA Transfer

Abstract: "Single-Port RAM"
Text: DMA Controller Using ispLSI 6192SM ® PARITY_ERR pin when a memory parity error has occurred , controller with a separate on-board memory block using the ispLSI 6192SM from Lattice Semiconductor. The , controller takes advantage of the on-board Register/Counter block of the ispLSI 6192SM for storing word , address and word count information simplifies the DMAC design and frees up logic in the ispLSI 6192SM , of the ispLSI 6192SM . To improve Central Processing Unit (CPU) throughput


Original
PDF 6192SM 6192SM 16-bit 16-bit timing diagram of DMA Transfer "Single-Port RAM"
1997 - timing diagram of DMA Transfer

Abstract: "Single-Port RAM"
Text: DMA Controller Using ispLSI 6192SM ® PARITY_ERR pin when a memory parity error has occurred , controller with a separate on-board memory block using the ispLSI 6192SM from Lattice Semiconductor. The , controller takes advantage of the on-board Register/Counter block of the ispLSI 6192SM for storing word , address and word count information simplifies the DMAC design and frees up logic in the ispLSI 6192SM , of the ispLSI 6192SM . To improve Central Processing Unit (CPU) throughput


Original
PDF 6192SM 6192SM 16-bit 16-bit timing diagram of DMA Transfer "Single-Port RAM"
1996 - 6192 c1

Abstract: ispLSI 6192SM grp sheet
Text: and utilization of the device. The ispLSI 6192SM features a single-port memory module. The module , user's design. The ispLSI 6192 is offered in three versions: the ispLSI 6192FF (FIFO), 6192SM , ispLSI 6192DM has functionality similar to the 6192SM , but access from the GRP or external pins is , /SDO ispLSI 6192SM ispLSI 6192DM ispLSI 6192FF Single Port Dual Port FIFO SRAM SRAM Memory , also available as inputs to the GRP to facilitate use by onchip logic. ispLSI 6000 Family


Original
PDF 8000-gate 6192SM 6192 c1 ispLSI 6192SM grp sheet
1996 - Not Available

Abstract: No abstract text available
Text: and utilization of the device. The ispLSI 6192SM features a single-port memory module. The module , user's design. The ispLSI 6192 is offered in three versions: the ispLSI 6192FF (FIFO), 6192SM , ispLSI 6192DM has functionality similar to the 6192SM , but access from the GRP or external pins is , E0 ISP and Boundary Scan TAP TRST TDO/SDO ispLSI 6192SM ispLSI 6192DM ispLSI 6192FF , also available as inputs to the GRP to facilitate use by onchip logic. ispLSI 6000 Family


Original
PDF 8000-gate 6192SM 208-pin
1997 - dual port fifo

Abstract: No abstract text available
Text: and utilization of the device. The ispLSI 6192SM features a single-port memory module. The module , user's design. The ispLSI 6192 is offered in three versions: the ispLSI 6192FF (FIFO), 6192SM , ispLSI 6192DM has functionality similar to the 6192SM , but access from the GRP or external pins is , E0 ISP and Boundary Scan TAP TRST TDO/SDO ispLSI 6192SM ispLSI 6192DM ispLSI 6192FF , also available as inputs to the GRP to facilitate use by onchip logic. ispLSI 6000 Family


Original
PDF 8000-gate 6192SM dual port fifo
Not Available

Abstract: No abstract text available
Text: logic. The ispLSI 6192SM features a single-port memory mod ule. The module can be organized either as a , 6Ü00 Table 1. ispLSI 6192 Device Features Memory Module Options Single-Port SRAM 6192SM Dual-Port , from this external inter face or from the internal GRP based on the user's design. The ispLSI 6192DM has functionality similar to the 6192SM , but access from the GRP or external pins is supported , available at a dedicated device pin. isp L S I 6 0 0 0 F a m ily In tro d u c tio n The ispLSI ® 6192 is a


OCR Scan
PDF 6192SM 6192DM
1998 - lattice 1024-60LJ

Abstract: ISP Engineering Kit - Model 100 1024-60LJ ispLSI 2064-80LT 6192FF MQUAD 2128E 1048E 128-PIN PQFP 2032-80lj
Text: for GDX120A pDS4102-M208 208-PIN MQUAD LT T176 LM ispLSI 2128V ispGDX120A ispLSI 6192SM , TM ISP Engineering Kit Model 100 Features · SUPPORTS ALL ispLSI ® 1000, 1000E, 2000, 2000E , Integration ( ispLSI ) devices. This Kit is designed for engineering purposes only and is not intended for , JEDEC file can be easily downloaded into the ispLSI device(s). UPM Description The Model 100 , MQUAD socket for a particular ispLSI device package). Copyright © 1998 Lattice Semiconductor Corp


Original
PDF 1000E, 2000E, 096V-60LT128 128V-60LQ160 pDS4102-T176 2128E 2128-80LT pDS4102-T176/2128V 176-Pin pDS4102-T176/GX120 lattice 1024-60LJ ISP Engineering Kit - Model 100 1024-60LJ ispLSI 2064-80LT 6192FF MQUAD 2128E 1048E 128-PIN PQFP 2032-80lj
1998 - GAL programming Guide

Abstract: GAL16V8 application notes isp 2032 IspLSI 2064 PCMCIA ispLSI 1024 isplsi scsi
Text: One-Wire ISP with an ISP-IrDA Example DMA Controller Using ispLSI 6192SM PCMCIA Interface in an ispLSI 2064 , Selector Guide Brochures ispGDXTM Generic Digital Crosspoint Devices ispLSI ® 6192 Cell-Based PLDs ISP , Architecture Descriptions ispLSI Architecture Descriptions Introduction to ispLSI Families 1000/E Family , ispGDS Architecture Descriptions ispGDX and ispGDS Architectural Description Data Sheets ispLSI Data Sheets Introduction to ispLSI 1000/E Family 1016E Data Sheet 1016 Data Sheet 1024 Data Sheet 1032E Data


Original
PDF GAL16V8/883 GAL20V8/883 GAL22V10/883 1048C GAL programming Guide GAL16V8 application notes isp 2032 IspLSI 2064 PCMCIA ispLSI 1024 isplsi scsi
1996 - ne 5555 timer

Abstract: "Single-Port RAM"
Text: devices, the ispLSI 6192DM, ispLSI 6192FF and ispLSI 6192SM , offer over 25,000 gates of logic and , ! ispLSI 6192DM ispLSI 6192FF ispLSI 6192SM General Purpose 24 GLB/ 24 GLB/ 24 GLB/ Programmable 192 , ispLSI 6192 Cell-Based PLDs ® Cell-Based PLDs: The Wave of the Future! " " , PROGRAMMABLE CELL-BASED PLD BENEFITS Lattice Semiconductor's new ispLSI ® 6192 Cell-Based PLD architecture , both memory and logic in Lattice's ispLSI 6192: both memory/datapath organization and logic


Original
PDF wave0260 I0071 ne 5555 timer "Single-Port RAM"
1996 - Not Available

Abstract: No abstract text available
Text: , performance and utilization of the device. The ispLSI and pLSI 6192SM feature a single-port memory module , control interface pins. The ispLSI and pLSI 6192DM has functionality similar to the 6192SM , but , ispLSI 6192SM ispLSI 6192DM ispLSI 6192FF Single Port Dual Port FIFO SRAM SRAM Memory Module , also available as inputs to the GRP to facilitate use by onchip logic. ispLSI and pLSI 6000 Family Introduction The ispLSI ® and pLSI® 6192 devices are high-density, cell-based programmable logic devices that


Original
PDF 8000-gate 6192SM
6192FF

Abstract: oo17
Text: rrm asas oooo 8838 oooo TDI/SDI TRST TDO/S DO ispLSI 6192SM ispLSI 6192DM ispLSI6192FF Single Port , . The ispLSI 6192 family is offered in three versions: the 6192FF (FIFO), 6192SM (Single Port RAM) and , ¡Lattice \ Semiconductor ■Corporation Spécifications ispLSI 6192 Single Port RAM Description ( 6192SM , Lattice ispLSI ' 6192 ! Semiconductor i Corporation High Density Programmable Logic with Dedicated , — FIFO (6192FF), Single-Port RAM ( 6192SM ) or Dual-Port RAM (6192DM) — Programmable Organizations


OCR Scan
PDF 25000-Gate 6192FF) 6192SM) 6192DM) 6192FF-70LM 208-Pin 6192FF-50LM 6192SM-70LM 6192FF oo17
2000 - Sis 968

Abstract: teradyne z1890 mach 1 family amd MACH4A pLSI 1016 gal amd 22v10 BGA and QFP Package 29MA16 PQFP-144 AMD PLD
Text: -BGA 320-BGA 432-BGA ispLSI 6192SM ispLSI 6192SM ispLSI 6192DM 25000 25000 25000 , , ispGDS, ispGDX, ispGDXV, ispHDL, ispIR, ispJTAG, ispLSI , ispµW, ispMODEM, ispPAC, ispREMOTE, ispRF , Analog s s First ISP CPLDs. ispLSI ®/MACH® for Digital Logic ispGDX for Board-Level Signal , Family Lattice's SuperWIDE ispLSI 5000V Family incorporates a revolutionary new architecture, which , Boundary Scan Testable s ispJTAG In-System Programmable ispLSI 5000V Family ispLSI 5256VA


Original
PDF
Not Available

Abstract: No abstract text available
Text: cells by the ORP. The ispLSI 6192 device contains six of these Megablocks. The 6192SM features a , ispLSI 6192 Lattica High Density Programmable Logic with Dedicated Memory and Register , MEMORY MODULE OPTIONS — FIFO (6192FF), Single-Port RAM ( 6192SM ) or DualPort RAM (6192DM) — Programmable Organizations: • Single 256 x 18 or 512 x 9 • Dual 128 x 18 or 256 x 9 ( 6192SM ) — 31 , Preload, Count Up/Down Options Memory Module Options: • FIFO (6192FF) • Single Port RAM ( 6192SM


OCR Scan
PDF 25000-Gate 6192FF-70LM 6192FF-50LM 6192SM-70LM 6192SM-50LM 6192DM-70LM 6192DM-50LM 208-Pin
1999 - MACH4A

Abstract: JTAG jtag mhz jtag 14 PQFP-144 ispLSI 2128-A M4A5-64 M5A3-384
Text: 3256A ispLSI 3256E ispLSI 3320 ispLSI 3448 ispLSI 6192FF ispLSI 6192DM ispLSI 6192SM ispGAL22V10 , BGA ispLSI , MACH, ispGDX & ispGAL Packages ® 7.00 x 7.00 mm 0.8 mm pitch 10.00 x 10.00 mm , -256/128 M4A3-256 M4A3-384 M4A3-512 ispLSI 2032E ispLSI 2064E ispLSI 2096E ispLSI 2128E 256 192 , 3.3 5 5 5 5 5/3.3 5/3.3 5/3.3 5/3.3 5/3.3 5/3.3 5/3.3 5/3.3 2000E ispLSI 2032VE ispLSI 2064VE ispLSI 2096VE ispLSI 2128VE ispLSI 2192VE ispLSI 2032VL ispLSI 2064VL ispLSI 2096VL


Original
PDF 208-Ball 256-Ball 100-Ball 49-Ball 144-Ball 100-Pin 128-Pin 48-Pin 44-Pin 144-Pin MACH4A JTAG jtag mhz jtag 14 PQFP-144 ispLSI 2128-A M4A5-64 M5A3-384
Not Available

Abstract: No abstract text available
Text: I/O cells by the ORP. The ispLSI 6192 device contains six of these Megablocks. The 6192SM , Lattice ispLSI 6192 " ; Semiconductor ■■■Corporation High Density Programmable , • MEMORY MODULE OPTIONS — FIFO (6192FF), Single-Port RAM ( 6192SM ) or DualPort RAM (6192DM) — Programmable Organizations: • Single 256 x 18 or 512 x 9 • Dual 128 x 18 or 256 x 9 ( 6192SM ) — 31 , Preload, Count Up/Down Options Memory Module Options: ■FIFO (6192FF) ■Single Port RAM ( 6192SM


OCR Scan
PDF 25000-Gate 6192FF-70LM 208-Pin 6192FF-50LM 6192SM-70LM 6192SM-50LM 6192DM-70LM
1997 - TAA141

Abstract: TAA 141
Text: Scan TAP TDO/SDO ispLSI 6192SM ispLSI 6192DM ispLSI 6192FF Single Port Dual Port FIFO SRAM , cells by the ORP. The ispLSI 6192 device contains six of these Megablocks. The 6192SM features a , Specifications ispLSI 6192 ® ispLSI 6192 High Density Programmable Logic with Dedicated , ), Single-Port RAM ( 6192SM ) or DualPort RAM (6192DM) - Programmable Organizations: · Single 256 x 18 or 512 x 9 · Dual 128 x 18 or 256 x 9 ( 6192SM ) - 31 Dedicated Data and Control Interface Pins -


Original
PDF 25000-Gate 50MHz TAA141 TAA 141
1999 - TAA 141

Abstract: TAA141 6192F SEL02
Text: Routing Pool (ORP) E3 E2 E1 E0 ISP and Boundary Scan TAP TDO/SDO ispLSI 6192SM ispLSI , ispLSI 6192 ® High Density Programmable Logic with Dedicated Memory and Register/Counter , ( 6192SM ) or DualPort RAM (6192DM) - Programmable Organizations: · Single 256 x 18 or 512 x 9 · Dual 128 x 18 or 256 x 9 ( 6192SM ) - 31 Dedicated Data and Control Interface Pins - Programmable Almost , FIFO (6192FF) · Single Port RAM ( 6192SM ) · Dual Port RAM (6192DM) Programmable Logic Module ·


Original
PDF 25000-Gate 50MHz 208-MQFP/6192SM 6192FF-70LM 6192FF-50LM 6192SM-70LM 6192SM-50LM 6192DM-70LM 6192DM-50LM 208-Pin TAA 141 TAA141 6192F SEL02
6192FF

Abstract: No abstract text available
Text: Logjc (GLBs) Output Routing Pool (ORP) E3 E2 E 1 EO ISP and Boundary Scan TAP IspLSI 6192SM , ( 6192SM ) or DualPort RAM (6192DM) - Programmable Organizations: · Single 256 x 18 or 512 x 9 · Dual 128 x 18 or 256 x 9 ( 6192SM ) - 31 Dedicated Data and Control Interface Pins - Programmable Almost Empty , Functional Block Diagram Memory Module Options: FIFO (6192FF) Single Port RAM ( 6192SM ) Dual Port RAM (6192DM) Programmable Logic Module Register/Counter Module Table 1. ispLSI 6192 Device Features


OCR Scan
PDF 50MHz 6192FF
1998 - Not Available

Abstract: No abstract text available
Text: Routing Pool (ORP) E3 E2 E1 E0 ISP and Boundary Scan TAP TDO/SDO ispLSI 6192SM ispLSI , ispLSI 6192 ® High Density Programmable Logic with Dedicated Memory and Register/Counter , ( 6192SM ) or DualPort RAM (6192DM) - Programmable Organizations: · Single 256 x 18 or 512 x 9 · Dual 128 x 18 or 256 x 9 ( 6192SM ) - 31 Dedicated Data and Control Interface Pins - Programmable Almost , FIFO (6192FF) · Single Port RAM ( 6192SM ) · Dual Port RAM (6192DM) Programmable Logic Module ·


Original
PDF 25000-Gate 50MHz 208-MQFP/6192SM 6192FF-70LM 6192FF-50LM 6192SM-70LM 6192SM-50LM 6192DM-70LM 6192DM-50LM 208-Pin
32 Bit loadable counter

Abstract: AND619 ispLSI 1015
Text: utilization of the devices. The ispLSI 6192 family is offered in three versions: the 6192FF (FIFO), 6192SM , Corporation Specifications ispLSI 6192 Single Port RAM Description ( 6192SM ) Single portStatic RAM , Lattice Semiconductor Corporation ispLSI 6192 High Density Programmable Logic with Dedicated , Pins - 25000-Gate Overall Density · MEMORY MODULE OPTIONS - RFO (6192FF), Single-Port RAM ( 6192SM ) or , 9 ( 6192SM ) - 31 Dedicated Data and Control Interface Pins - Programmable Almost Empty and Almost


OCR Scan
PDF 50MHz 6192FF-70LM 6192FF-50LM 6192SM-70LM 6192SM-50LM 6192DM-70LM 6192DM-50LM 208-Pin 32 Bit loadable counter AND619 ispLSI 1015
1996 - lattice 1996

Abstract: No abstract text available
Text: ispLSI 6192SM ispLSI 6192DM ispLSI 6192FF Single Port Dual Port FIFO SRAM SRAM Memory Module , cells by the ORP. The ispLSI and pLSI 6192 devices each contain six of these Megablocks. The 6192SM , Specifications ispLSI and pLSI 6192 ® ® ispLSI and pLSI 6192 High Density Programmable , OPTIONS - FIFO (6192FF), Single-Port RAM ( 6192SM ) or DualPort RAM (6192DM) - Programmable Organizations: · Single 256 x 18 or 512 x 9 · Dual 128 x 18 or 256 x 9 ( 6192SM ) - 31 Dedicated Data and


Original
PDF 25000-Gate 50MHz lattice 1996
92CZ

Abstract: 6192F BC116
Text: ÍSP and Boundary Scan TAP IDO^SOO ispLSI 6192SM ispLSI 6192DM isoLSI 6192FF Single Port Dual Port , Pins - 25000-Gate Overall Density MEMORY MODULE OPTIONS - FIFO (6192FF), Single-Port RAM ( 6192SM ) or , 9 ( 6192SM ) - 31 Dedicated Data and Control Interface Pins - Programmable Almost Empty and Almost , ment Any Registered or Combinatorial Functions - High-Speed Global Interconnects Table 1. ispLSI 6192 , Performance Programmability Testability Package FIFO 6192FF Single-Port SRAM 6192SM F u n c t io n a l B


OCR Scan
PDF 50MHz 6192FF-70LM 6192FF-50LM 6192SM-70LM 6192SM-50LM 6192DM-70LM 6192DM-50LM 208-Pin 92CZ 6192F BC116
loadable 4 bit counter

Abstract: No abstract text available
Text: ispLSI and pLSI 6192 fam ilies are each offered in three versions: th e 6 1 9 2 F F (FIFO ), 6192SM , Lattice ; Semiconductor I Corporation Features ispLSI and pLSI 6192 High Density Programmable , Unused Product Term Shutdown Saves Power · ispLSI OFFERS THE FOLLOWING ADDED FEATURES - In-System , MODULE OPTIONS - FIFO (6192FF), Single-Port RAM ( 6192SM ) or DualPort RAM (6192DM) - Programmable Organizations: · Single 256 x 18 or 512 x 9 · Dual 128 x 18 or 256 x 9 ( 6192SM ) - 31 Dedicated Data and Control


OCR Scan
PDF 50MHz 6192FF-70LM 6192FF-50LM 6192S -70LM -50LM loadable 4 bit counter
Supplyframe Tracking Pixel