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LT3650EDD-8.2#TRPBF Linear Technology LT3650-8.X - High Voltage 2 Amp Monolithic 2-Cell Li-Ion Battery Charger; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C
LT3650EMSE-8.4#TRPBF Linear Technology LT3650-8.X - High Voltage 2 Amp Monolithic 2-Cell Li-Ion Battery Charger; Package: MSOP; Pins: 12; Temperature Range: -40°C to 85°C
LT3650IMSE-4.1#TRPBF Linear Technology LT3650-4.X - High Voltage 2 Amp Monolithic Li-Ion Battery Charger; Package: MSOP; Pins: 12; Temperature Range: -40°C to 85°C
LTC2938CMS#TRPBF Linear Technology LTC2938 - Configurable 4-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 12; Temperature Range: 0°C to 70°C
LTC2939CMS#TRPBF Linear Technology LTC2939 - Configurable 6-Supply Monitors with Watchdog Timer; Package: MSOP; Pins: 16; Temperature Range: 0°C to 70°C
LT1016MJ Linear Technology IC COMPARATOR, 3000 uV OFFSET-MAX, 10 ns RESPONSE TIME, CDIP8, HERMETIC SEALED, DIP-8, Comparator

ic mm74hc Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - internal structure 74LS00 nand gate

Abstract: MM74HC ic mm74hc IC TTL 74LS00 CD4000 FAIRCHILD MM74HC mm74c CMOS TTL Logic Family Specifications AN-313 74LS series logic gates
Text: characteristics of the MM74HC high-speed CMOS logic family were conceived to meet several basic goals. These , logic families. In order to familiarize the user with the MM74HC logic family, its input and output , conditions. Finally, single stage gates implemented in MM74HC CMOS would require large transistors due to , MM74HC is a "buffered" logic family like the CD4000B series CMOS. Buffering CMOS logic merely denotes designing the IC so that the output is taken from an inverting buffer stage. For example, the internal


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PDF MM74HC CD4000 MM74C MM74HCT MM74HC internal structure 74LS00 nand gate ic mm74hc IC TTL 74LS00 FAIRCHILD MM74HC CMOS TTL Logic Family Specifications AN-313 74LS series logic gates
1995 - ic mm74hc

Abstract: MM74HC 74HC inverter tri-state output ic cd4000 CMOS TTL Logic Family Specifications AL 5052 Difference between LS, HC, HCT devices 74LS SERIES cmos logic data CD4000 unbuffered cmos logic application note
Text: characteristics of the MM54HC MM74HC high-speed CMOS logic family were conceived to meet several basic goals , between logic families In order to familiarize the user with the MM54HC MM74HC logic family its input , single stage gates implemented in MM54HC MM74HC CMOS would require large transistors due to the large , various linear and crystal oscillator applications A Buffered CMOS Logic Family The MM54HC MM74HC is a ``buffered'' logic family like the CD4000B series CMOS Buffering CMOS logic merely denotes designing the IC so


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PDF MM54HC MM74HC CD4000 MM54C MM74C MM54HCT MM74HCT MM54HC MM74HC ic mm74hc 74HC inverter tri-state output ic cd4000 CMOS TTL Logic Family Specifications AL 5052 Difference between LS, HC, HCT devices 74LS SERIES cmos logic data unbuffered cmos logic application note
1995 - triggering scr with microprocessor

Abstract: cmos function generator using cd4049 ic mm74hc scr Power Supply Schematic Diagram national semiconductor CD4000 cmos scr MM74HC AN-339 national CD4049 Application CD4000
Text: the system level or on the IC level Since National's MM54HC MM74HC series will not latch up this , to CMOS circuits which essentially shorts VCC to ground This generally destroys the CMOS IC or at the very least causes the system to malfunction In order to make MM54HC MM74HC high speed CMOS logic , Figure 1 schematically illustrates these diodes found in the MM54HC MM74HC family Standard CD4000 and , reduction or elimination of latch-up in the IC itself would ease CMOS system design increase system


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PDF MM54HC MM74HC triggering scr with microprocessor cmos function generator using cd4049 ic mm74hc scr Power Supply Schematic Diagram national semiconductor CD4000 cmos scr AN-339 national CD4049 Application CD4000
1998 - ic mm74hc

Abstract: triggering scr with microprocessor AN-339 national cmos scr WHAT IS THE CONNECTION SCR 74HC MM74C CD4000 AN-339 SCR TRIGGER PULSE circuit
Text: shorts VCC to ground. This generally destroys the CMOS IC or at the very least causes the system to malfunction. In order to make MM54HC/ MM74HC high speed CMOS logic easy to use and reliable it is very , diodes found in the MM54HC/ MM74HC family. Standard CD4000 and MM54C/ MM74C logic also has a very , latch-up in the IC itself would ease CMOS system design, increase system reliability and eliminate , large currents into an IC . As with any integrated circuit there are maximum limitations to the current


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PDF MM54HC/MM74HC ic mm74hc triggering scr with microprocessor AN-339 national cmos scr WHAT IS THE CONNECTION SCR 74HC MM74C CD4000 AN-339 SCR TRIGGER PULSE circuit
2002 - CD40106 PIN OUT

Abstract: cd40106 application notes MM74HC pin configuration CD40106 diagram CD40106 DATASHEET ic CD40106 ic mm74hc CPDF CD40106 Family specifications AN-376
Text: designs using high-speed CMOS ICs. The MM74HC logic family has near-zero power dissipation when in the , insignificance. When using MM74HC logic in power-critical applications, however, you must consider both components. The following sections describe how to determine system power by using MM74HC devices , 's appreciable-although unlikely-you can include the very small quiescent ICC of MM74HC devices. Generally, the , it shows the dynamic currents that result from switching one input LOW-to-HIGH. When the IC is not


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PDF MM74HC AN-376 CD40106 PIN OUT cd40106 application notes MM74HC pin configuration CD40106 diagram CD40106 DATASHEET ic CD40106 ic mm74hc CPDF CD40106 Family specifications
2001 - d 42030 transistor

Abstract: AN-7505 220v ac to 48v dc smps AN3008 Fairchild crt horizontal deflection circuit AN-7528 9019 transistor FAN6800 BUT11A spice AN7520
Text: 450 9 5 10 2 4 100 150 - 65 ~ 150 V A A A A W °C °C VEBO IC ICP IB IBP PC TJ TSTG Electrical , Storage Time Fall Time VCE = 850V, VBE = 0 VBE = 9V, IC = 0 IC = 3A, IB = 0.6A IC = 2.5A, IB = 0.5A IC = 3A, IB = 0.6A IC = 2.5A, IB = 0.5A VCC = 250V, IC = 2.5A IB1 = -IB2 = 0.5A RL = 100 1 1 10 1.5 1.5 1.3 1.3 1 4 0.8 mA mA mA V V V V µs µs µs Test Condition IC = 100mA, IB = 0 Min. 400 450 Typ. Max , IC = 5 IB hFE, DC CURRENT GAIN 1 10 0.1 VCE(sat) 1 0.01 0.1 1 10 0.01


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PDF BUT11/11A O-220 BUT11 BUT11A BUT11 AN-758: AN-758 d 42030 transistor AN-7505 220v ac to 48v dc smps AN3008 Fairchild crt horizontal deflection circuit AN-7528 9019 transistor FAN6800 BUT11A spice AN7520
2001 - pt 4115 led driver

Abstract: an7527 AN-7527 an5043 AN-7501 AN-7502 AN42045 transistor k 4110 ML4425 NPN transistor 9013 npn
Text: IC ICP IB PC TJ TSTG Electrical Characteristics TC=25°C unless otherwise noted Symbol VCEO(sus , Voltage Turn On Time Storage Time Fall Time Test Condition IC = 100mA, L = 25mH VCE = VCES, VBE = 0 VBE = 9V, IC = 0 IC = 6A, IB = 1.2A IC = 6A, IB = 1.2A VCC = 250V, IC = 6A IB1 = - IB2 = 1.2A RL = 41.6 Min , SPS (283 K) Jul 19, 2002 AN-4115: AN-4115 PC SMPS Secondary Side Control IC (207 K) Jul 19, 2002 AN , , 2002 AN-303: HC-MOS Power Dissipation (135 K) Jul 19, 2002 AN-319: Comparison of MM74HC to 74LS, 74S


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PDF BUT12/12A O-220 BUT12 BUT12A KM4211-PB: KM4211 FAN5231-PB: pt 4115 led driver an7527 AN-7527 an5043 AN-7501 AN-7502 AN42045 transistor k 4110 ML4425 NPN transistor 9013 npn
ic mm74hc

Abstract: No abstract text available
Text: N A T IO N A LS E M IC O N D {LO G IC } ID E D j| bSO U H SO O b S lô in 0 | MM54HC86/MM74HC86 National Semiconductor MM54HC86/MM74HC86 Quad 2-lnput Exclusive OR Gate General Description This EXCLUSIVE OR gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to equivalent LS-TTL gates while maintaining the low power consumption and high noise immunity characteristic of , (Vcc) DC Input or Output Voltage (Vin . Vout) Operating Temp. Range H a ) MM74HC MM54HC Input Rise or


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PDF MM54HC86/MM74HC86 MM54HC86/MM74HC86 MM54HC/ 54LS/74LS ic mm74hc
54LS154

Abstract: ic 74ls154
Text: Voltage (Vcc) DC Input or Output Voltage (Vin. Vout) Operating Temp. Range 0 a) MM74HC MM54HC Input Rise , consumption, P d = C p d V c c 2 f + Ic c v c c. and the no load dynamic current consumption, I s - C p p V c


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PDF bS01152 MM54HC154/MM74HC154 4-to-16 MM54HC154/MM74HC154 54LS154 ic 74ls154
74HC buffer tri-state output

Abstract: ic mm74hc
Text: Supply Voltage (Vcc) DC Input or Output Voltage (V in . Vo u t ) Operating Temp. Range (T/0 MM74HC MM54HC , perature derating- p la s tic `'N " package: - 1 2 m W /*C from 6 5 #C to 85°C ; ceram ic "J " package: - , respectively. (T h e V ih value a t 5.5 V is 3 .8 5 V .)T h e worst case leakag e current (Iin, Ic e * and lo z , the no toad dynam ic current consumption, Is = C p d V c c f + lee- j3-313


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PDF 00bS42S MM54HC540/MM74HC540/MM54HC541/MM74HC541 MM54HC540/MM74HC540 MM54HC541/MM74HC541 j3-313 74HC buffer tri-state output ic mm74hc
Not Available

Abstract: No abstract text available
Text: R C H II- D S E M IC O N D U C T O R tm MM74HC00 Quad 2-Input NAND Gate General Description Features These NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS in­ tegrated circuits. All gates have buffered outputs. All devices have high noise immunity and the ability to drive , ) ±50 mA MM74HC -4 0 +85 •C -6 5 ‘C to +150‘ C Storage Temperature Range (Ts


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PDF MM74HC00 54HC/74HC 54LS/74LS 250i0 MM74HC00N
Not Available

Abstract: No abstract text available
Text: from damage due to stat­ ic discharge by diodes to V cc and ground. Features ■■■â , ( Ic e ) —65°C to + 150°C Storage Temperature Range (Ts j q ) Power Dissipation (Pp) (Note , ±2 5 mA (Io u t ) or GND Current, per pin Operating Temp. Range (Ta ) MM74HC MM54HC Â


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PDF MM54HC521/MM74HC521
ic mm74hc

Abstract: block diagram of dual 2 to 4 decoder MM74HC MM54HC155 MM54HC 74HC 54HC pin diagram of 2 to 4 decoder logic diagram of dual 2 to 4 decoder MM74HC155
Text: L X X X H H H H H 3-Line-to-8-Line Decoder or 1-Line-to-8-Line Demultiplexer Inputs Select IC B , ) (5) (6) (7) 2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3 IC = inputs C1 and C2 connected together IG = inputs G1 , Range (T/\) MM74HC -40 + 85 C MM54HC -55 + 125 C Input Rise/Fall Time Vcc = 2.0V 1000 ns (V tf


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PDF MM54HC155/MM74HC155 ic mm74hc block diagram of dual 2 to 4 decoder MM74HC MM54HC155 MM54HC 74HC 54HC pin diagram of 2 to 4 decoder logic diagram of dual 2 to 4 decoder MM74HC155
Not Available

Abstract: No abstract text available
Text: protected from damage due to stat ic discharge by diodes to V cc and ground. Features Typical , Conditions Supply Voltage (Vcc) DC Input or Output Voltage (V|N, V0 ut ) Operating Temp. Range 0 a ) MM74HC


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PDF MM54HC521 /MM74HC521 MM54HC521/MM74HC521
1995 - 54HC

Abstract: 54LS155 74HC 74LS155 C1995 MM54HC MM54HC155 MM74HC MM74HC155
Text: -Line-to-8-Line Decoder or 1-Line-to-8-Line Demultiplexer Inputs Outputs Strobe Select (0) Or Data IC B A , H H H H H H H H L IC e inputs C1 and C2 connected together IG e inputs G1 and G2 , ) Operating Temperature Range (TA) MM74HC MM54HC Input Rise Fall Time VCC e 2 0V (tr tf) VCC e 4 5V VCC


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PDF MM54HC155 MM74HC155 54HC 54LS155 74HC 74LS155 C1995 MM54HC MM74HC
Not Available

Abstract: No abstract text available
Text: 500 400 ns ns ns ( V |N . V o u t ) Operating Temp. Range (TA) MM74HC MM54HC Input Rise , ±1.0 jxA Ic c Maximum Quiescent Supply Current V |N = V c c or GND Io u t = 0 jxA 6.0V


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PDF MM54HC03/MM74HC03 54HC/74HC 54LS/74LS
Not Available

Abstract: No abstract text available
Text: R C H II_ D E M IC O N D U C T Q R r MM74HC132 Quad 2-Input NAND Schmitt Trigger General Description Features The MM74HC132 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. ■■■■■■The 74HC logic family is functionally and pinout , Temp. Range (TA) -6 5 ‘ C to +150‘ C MM74HC Power Dissipation (PD) (Note 4) 600 mW


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PDF MM74HC132 MM74HC132 54LS/74LS
Not Available

Abstract: No abstract text available
Text: -Une-to-8-Line Demultiplexer Inputs Select IC B A X L L L L H H H H X L L H H L L H H X L H L H L H L H 3 (6) (7 , H L H H H H H H H H H L H H H H H H H H H L IC = inputs C1 and C2 connected together IG = inputs , ) DC Input or Output Voltage (V in . V q ut ) Operating Temperature Range (Ta ) MM74HC MM54HC Input


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PDF MM54HC155/MM74HC155 MM54HC155/MM74HC155 54LS155/74LS155
Not Available

Abstract: No abstract text available
Text: ic discharge by diodes to V cc and ground. Features Typical propagation delay: 20 ns Wide , Voltage (VCc) DC Input or Output Voltage (V in . V o ut ) Operating Temp. Range (Ta ) MM74HC MM54HC Input


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PDF MM54HC521/MM74HC521
ci mm74hc

Abstract: No abstract text available
Text: seconds) Min 2 0 Max 6 v cc Units V V Operating Temp. Range (TA) MM74HC MM54HC Input Rise or , Ic c V |N = V c c or GND Io u t = 0 jxA 6.0V 2.0 20 40 jx A Note 1: Absolute


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PDF MM54HC03/MM74HC03 54HC/74HC 54LS/74LS ci mm74hc
ic mm74hc

Abstract: No abstract text available
Text: Output Voltage (V ini. V o ut ) Operating Temp. Range (TA) MM74HC MM54HC Input Rise or Fall Times < o o , 0.26 ±0.1 0.33 0.33 ±1.0 V V jx A Ic c V|sj = V c c o r G N D 6.0V 2.0 20 40


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PDF MM54HC20/MM74HC20 54HC/74HC 54LS/74LS ic mm74hc
Not Available

Abstract: No abstract text available
Text: R C H II- D S E M IC O N D U C T O R tm MM74HC4020 • MM74HC4040 14-Stage Binary Counter • 12-Stage Binary Counter General Description The MM54HC4020/MM74HC4020, MM54HC4040/ MM74HC4040, are high speed binary ripple carry counters. These counters are implemented utilizing advanced silicon-gate CMOS technology to achieve speed perfor­ mance similar to LS-TTL logic while retaining the low , Storage Temperature Range (Ts tg ) (V|N. VOUT) Operating Temp. Range (TA) ±50 mA MM74HC -4 0


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM54HC4020/MM74HC4020, MM54HC4040/ MM74HC4040, HC4020 HC4040
mm74hc14n

Abstract: National Semiconductor MM74HC14N C60HC ic mm74hc
Text: View Order Number MM54HC14 or MM74HC14 V cc T L /F /5 1 0 6 -2 © 1 9 9 5 National S e m ic o n , ) Operating Temp. Range (Ta ) MM74HC MM54HC Min 2 0 Max 6 Vcc Units V V -4 0 -5 5 + 85 + 125 DC , b s o lu te M ax im u m R a tin g s are th o s e v a lu e s b e y o n d w h ic h d a m a g e to th e d e v ic e m ay o c c u r. N o te 2: U n le s s o th e rw is e s p e c ifie d all v o lta g e s a re , - p la s tic " N " p a c k a g e : - 1 2 m W /" C fro m 65 °C to 85°C ; c e ra m ic " J " p a c k a


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PDF MM54HC14/MM74HC14 54HC/74HC 54LS/74LS bSQ1122 mm74hc14n National Semiconductor MM74HC14N C60HC ic mm74hc
Not Available

Abstract: No abstract text available
Text: (V ini. V o ut ) -1.5 to V cc+ 1 -5 V - 0.5 to VCc + 0.5V Operating Temp. Range (TA) MM74HC , IIo u tI ¿20 ¡iA V |N = V |H ■in Ic c lOUT = 0 M Note 1: Absolute Maximum


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PDF MM54HC20/MM74HC20 54HC/74HC 54LS/74LS
Not Available

Abstract: No abstract text available
Text: S em ic o nd u cto r MM54HC75/MM74HC75 _ 4-Bit Bistable Latch with Q and Q Output General , ) MM74HC MM54HC Input Rise or Fall Times (tr.tf) VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Min 2 0 Max 6 V cc , are th o s e v a lu e s b e yo n d w h ic h dam a g e to th e d e vice m ay occur. N o te 2: U n le s , 65°C to 85°C; c e ra m ic " J " pa cka g e : - 1 2 m W /°C fro m 100°C to 125°C. N o te 4: F o r a p , PRESIDENT O F NATIONAL SEM IC O N D UC TO R CORPORATION. As used herein: 1. Life support devices or systems


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PDF MM54HC75/MM74HC75 MM54HC75/MM74HC75
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