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ic 74 LS 138 DECODER Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
ic 74 LS 138 DECODER

Abstract: IC 74ls138 74LS138 3 to 8 decoder notes 74LS138 1 to 8 decoder notes ic 74 138 DECODER
Text: expansion to a 1-o f-2 4 decoder using ju st three LS 138 devices or to a l-o f- 3 2 decoder using fo u r LS138s and one inverter. The LS 138 is fabricated w ith th e Schottky barrie r diode process fo r high , lly exclusive active LOW o u tp u ts (O q-O ?). T h e LS 138 features th re e Enable inputs, tw o a , N A B LE FOR E A S Y E X P A N S IO N T Y P IC A L POW ER D IS S IP A T IO N OF 3 2 m W A C T IV E , A T IO N EFFECTS LO G IC S Y M B O L 1 2 3 4 56 PIN N A M E S Address Inputs


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PDF LS138s ic 74 LS 138 DECODER IC 74ls138 74LS138 3 to 8 decoder notes 74LS138 1 to 8 decoder notes ic 74 138 DECODER
64LS138

Abstract: No abstract text available
Text: €¢ DALLAS, TEXAS 75 26 5 2-425 S N 5 4 LS 13 8 , S N 5 4S 138 , S N 74 LS 13 8 , S N 74 S 13 8 A 3 , S N 5 4 LS 13 8 , SN 54S138, S N 74 LS 13 8 , S N 74 S 13 8 A 3-LINE TO 8-LINE D EC OD ERS/DEM U , , S N 74 LS 13 8 3-LIME TO 8-LINE D EC O D ER S fD EM U LTIPLEXER S recommended operating , POST OFFICE BOX 6 5 5 0 1 2 • D ALLAS, TEXAS 7 5 2 6 5 2-429 S N 5 4S 138 , S N 74 S 13 8 A 3 , €¢ S N 54LS 138 , S N 54S 138 SN 74LS 138 , SN 74S 138A J OR W PACKAGE D OR N PACKAGE (TOP VIEW


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PDF 54S138, 64LS138
ic 74 LS 138 DECODER

Abstract: Alu 181 lal 2084 8 bit bcd adder/subtractor f245 motorola TTL 74-series IC LIST internal circuitry for sr flip flop 4-bit bcd subtractor T flip flop IC LS248
Text: 8-Line Decoder /Demultiplexer A 16 LS 138 1-of-8 Decoder /Demultiplexer A 16 LS 139 Dual 1-of-4 Decoder /Demultiplexer A 16 LS 145 1-of-10 Decoder /Driver, Open-Collector A 16 LS 147 10-Line Decimal to , -lnput Multiplexer A 16 LS 153 Dual 4-lnput Multiplexer A 16 LS 155 Dual 1-of-4 Decoder A 16 LS 156 Dual 1-of-4 Decoder , Open-Collector A 16 LS 157 Quad 2-lnput Multiplexer, Non-Inverting A 16 LS 158 Quad 2 , -lnput 2S 260 X Description Clock Edge No. LS ALS FAST Dual D w/Set & Clear Pos 74 X X X Dual JK w/Set


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PDF SG60R4 16-by-4 ic 74 LS 138 DECODER Alu 181 lal 2084 8 bit bcd adder/subtractor f245 motorola TTL 74-series IC LIST internal circuitry for sr flip flop 4-bit bcd subtractor T flip flop IC LS248
max3259

Abstract: ic 74 LS 138 DECODER
Text: S ig n e tic s 5 4 L S 1 3 8 , 5 4 S 1 3 8 Decoders/Demultiplexers 1-of-8 Decoder , expansion · Ideal for memory chip select decoding · Direct replacement for Intel S205 DESCRIPTION The ' 138 decoder accepts three binary weighted inputs (Ao, A, A2) and when en abled, provides eight mutually , lines to 32 lines) decoder with just four '138s and one in verter. The device can be used as an eight , FlatPack 16-Pin Ceramic LLCC ORDER CODE 54LS138/BEA, 54S 138 /BEA 54LS138/BFA, 54S138/BFA 54LS138/B2A


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PDF 1-of-32 54LS138, 54S138 500ns 500ns 54LSXXX 54SXXX 515ns 1N916 1N3064, max3259 ic 74 LS 138 DECODER
ic 74 LS 138 DECODER

Abstract: C455B
Text: -lead llatpack D ESC RIPTIO N The UT54ACS138 and the UT54ACTS 138 3-line to 8-line de coders/demultiplexers are , of inverters when expanding. A 24-line decoder can be implement ed without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for , View A B C S2Ä VoD 70 7Ì 72 73 74 75 G2B Gl 77 V SS 75 OUTPUT Y H H H H L H H H H H H T , /UT54ACTS138 L O G IC SYM BOL BIN/OCT 1 2 4 S (1 5 ) 70 1 ^ (1 4 ) S (1 3 ) M 12> S i 11) (6) (*)f^ (5) & EN


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PDF 16-pin 16-lead UT54ACS138 UT54ACTS UT54ACS138/UT54ACTS138 ic 74 LS 138 DECODER C455B
pin diagram of ic 74ls138

Abstract: connection diagram of ic 74ls138 pin for 74LS138 74ls138 function SN54LS13B sn54ls138 ic 74ls138 74ls138 74S138A 74LS138 function table
Text: Performance SN 5 4 LS 1 38 , S N 54S 138 . . . J OR W PACKAG E SN 74LS138, SN 74S138A . D OR N P A C K A G , Schottky-clamped system decoder is negligible. The 'L S 1 3 8 , S N 5 4 S 1 3 8 , and S N 7 4 S 1 3 8 A decode one , w hen expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. All of these decoder /demultiplexers feature fully buffered inputs, each of which represents only


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PDF SN54LS13B, SN54S138, SN74LS138, SN74S13BA 74LS138, 74S138A SN74S138A 54S138 74S138A pin diagram of ic 74ls138 connection diagram of ic 74ls138 pin for 74LS138 74ls138 function SN54LS13B sn54ls138 ic 74ls138 74ls138 74LS138 function table
IC 74156

Abstract: 74156 C005970S
Text: , LS156 LOG IC DIAG RA M E« E* *0 A1 Efc Ejj Both decoder sections have a 2-input enable , open. AC ELE C T R IC A L C H A R A C TE R IS TIC S TA = 25°C, VCC = 5 0V 74 PARAMETER TEST , WF07570S VOUT ^ V" 7 ^ * WF07580S V m - 1.3V fo r 74 LS ; V m = 1.5V fo r all o th e r T T L fa m ilies. VM = 1.3V fo r 74 LS ; V M = 1.5V fo r all o th e r T T L fa m , T E S T C IR C U IT S A N D W A V EFO R M S V m = 1.3V fo r 74 LS ; V y = 1.5V fo r ali o th e r


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PDF LS156 74LS156 500ns 500ns IC 74156 74156 C005970S
pin diagram of ic 74ls139

Abstract: decoder 3-8 74ls with nor gate 74ls139 motorola ttl application TTL IC 74
Text: /74LS139 DUAL 1-0F-4 DECODER / DEMULTIPLEXER LOW POW ER SCHOTTKY J S U FFIX C E R A M IC C A SE , MOTOROLA DUAL 1-0F-4 DECODER / DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder /D e multiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each decoder has an active LOW Enable input which can be , ) U.L. 0 S U FFIX SO IC C A SE 7 5 1 B-03 5 ORDERING INFORMATION S N 54LS X X X J S N 74LS X X X


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PDF SN54/74LS139 LS139 pin diagram of ic 74ls139 decoder 3-8 74ls with nor gate 74ls139 motorola ttl application TTL IC 74
2001 - 74xxx

Abstract: ic 74 LS 138 DECODER HC- 543 4046 analog IC tristate demultiplexer SR flip flop IC Schieberegister 4538 bcd ic 6001 bcd-7
Text: / Decoder 138 Dual 2 auf 4 Kanal Multiplexer 139 BCD-dezimal Treiber 145 Priority Encoder , X X X LV LCX X LS HCT HCU HC FCT F BCT ALS AL ACTQ ACT , LVXU LVX LVU LVT LVQ LVCU LVCH LVC LV LS LCX HCT HCU HC FCT F BCT ALS AL ACTQ ACT AC ABT xxx Flip flops (bistabil) D-Typ 74 4 , STD OL LVXU LVX LVU LVT LVQ LVCU LVCH LVC LV LS LCX HCT HCU


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PDF 74xxx 13-Eing UK315358 74xxx ic 74 LS 138 DECODER HC- 543 4046 analog IC tristate demultiplexer SR flip flop IC Schieberegister 4538 bcd ic 6001 bcd-7
74LS145

Abstract: TS02H
Text: (fQ MOTOROLA SN54/74LS145 1-OF-IO DECODER /DRIVER OPEN-COLLECTOR The S N 54/74LS145, 1-of-10 Decoder /Driver, is designed to accept BCD inputs and provide appropriate outputs to drive 10 , High Speed Termination Effects 1-OF-IO DECODER /DRIVER OPEN-COLLECTOR LOW POWER SCHOTTKY , E R A M IC C A SE 620-09 ) LijyjUJWUJUJUJLiJ Qq Q1 Q2 Q3 Q4 Û5 Qq PIN N A M E S HIGH Ed. P , SE 648-08 GND LO A D IN G (Note a) LO W 0.25 U.L. 15 (7.5) U.L, 1 D S U FFIX SO IC C A SE 7


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PDF SN54/74LS145 54/74LS145, 1-of-10 10-digit 74LS145 TS02H
2001 - optocoupler NAND

Abstract: 16-LINE TO 4-LINE PRIORITY ENCODERS octal optocoupler 3 bit magnitude comparator 4514 optocoupler 74xxx high speed logic to logic optocoupler
Text: FCT LVX ALS LVT xxx HC AC OL AL LS LV F ACTQ Flip flops , -bit magnitude comparator 8-bit magnitude comparator 8-bit identity comparator Counters 74 75 173 174 175 374 , LVT xxx HC AC OL AL LS LV F ACTQ Shift registers 8-bit serial in , /de-multiplexers BCD-decimal BCD-decimal driver BCD-7 segment driver o.c. 3 to 8 line demultiplexer/ decoder Dual 2 , -input multiplexer Quad 2-input multiplexer inverting 3 to 8 decoder /de-multiplexer De-multiplexer 3 to 8 line B C D


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PDF 74xxx 13-input UK315358 optocoupler NAND 16-LINE TO 4-LINE PRIORITY ENCODERS octal optocoupler 3 bit magnitude comparator 4514 optocoupler 74xxx high speed logic to logic optocoupler
74LS445

Abstract: H Driver 16 Pin DIP
Text: , V m * 1-3V fo r 74 LS , V m = 1.5V fo r all o th e r T T L fam ilies. V M = 1.3V fo r 74 LS ; V y , PULSE REQUIREMENTS FAMILY Amplitude 74 74 LS 74S 3.0V 3.0V 3.0V Rep. Rate 1MHz 1MHz 1MHz Pulse Width , Signetics 74LS445 Decoder /Driver BCD-To-Decimal Decoder /Driver (Open Collector) Product , Military Prod ucts D ata Manual. DESCRIPTION The '445 is a 1-of-10 decoder w ith open collector outputs. This decoder accepts BCD inputs on the Ao to A 3 address lines and generates 10 mutually exclusive


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PDF 74LS445 1-of-10 1N916, 1N3064, 500ns 500ns 74LS445 H Driver 16 Pin DIP
pin configuration IC 74156

Abstract: IC 74156 74156
Text: 0 S l-»'PLH*j VM VM WFD7570S v OUT v OUT ^ N ^ VM VM = 1.3V (or 74 LS ; V M = , Non-Inverting Outputs TEST CIRCUITS AND WAVEFORMS WF06450S V m = 1.3V fo r 74 LS ; V y = 1.5V fo r all o , Signetics 74156, LS156 Decoders/Demultiplexers Dual 2-Line To 4-Line Decoder /Demultiplexer , can be tied together TYPE T Y P IC A L P R O P A G A T IO N DELAY T Y P IC A L SUPPLY (T , L PACKAGES RANGE 0 °C Vcc DESCRIPTION The '156 is a Dual 1-of-4 Decoder / Demultiplexer with


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PDF LS156 74LS156 WF06450S 1N916, 1N3064, 500ns 500ns pin configuration IC 74156 IC 74156 74156
74LS139

Abstract: of ic 74ls139 5101 fg
Text: a high speed Dual 1-of*4 Decoder /Demultiplexer. T he device h as two independent decoders, each accepting tw o inputs and providing four mutually exclusive active L O W Outputs. Each decoder h a s an , completely compatible with all Motorola TTL families. SN54/74LS139 DUAL t-OF-4- DECODER / DEMULTIPLEXER , I T H IG H S P E E D T E R M IN A T I O N EFFECTS L O G IC S Y M B O L 15 14 T3 L_L E *0 DECODER a E Ao A i DECODER b Oq O, O 2 O 3 P IN N A M E S A0 .A , E Ö q -Ö 3


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PDF SN54/74LS139 74LS139 of ic 74ls139 5101 fg
2004 - STV8217

Abstract: simple subwoofer circuit diagram subwoofer ic type amplifier circuit diagram dolby pro logic 2 digital dts dolby downmix 5.1 subwoofer ic type amplifier circuit diagram 5.1 subwoofer amp subwoofer amplifier circuit diagram subwoofer audio amplifier circuit diagram STV8237
Text: with specific features: - For Loudspeakers (L, R, LS , RS, SubW, C): Dolby® Pro Logic II ® Decoder , Dolby® Digital decoder is mandatory. 12/149 C LS L STV82x7 General Description Figure 6 , 68 69 70 71 72 73 74 75 76 77 78 79 80 HP Right/ LS surround Right 0 22nF R17 , STV82x7 ® Digital Audio Decoder /Processor for A2 and NICAM Television/Video Recorders , Audio Matrix A/D Control Logic I²C SCL SDA I²C Interface Audio A/D Digital


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PDF STV82x7 STV8217 simple subwoofer circuit diagram subwoofer ic type amplifier circuit diagram dolby pro logic 2 digital dts dolby downmix 5.1 subwoofer ic type amplifier circuit diagram 5.1 subwoofer amp subwoofer amplifier circuit diagram subwoofer audio amplifier circuit diagram STV8237
Not Available

Abstract: No abstract text available
Text: GD54/74HC138, GD54/74HCT138 3-TO-8 LINE DECODER /DEMULTIPLEXER G eneral D e s c rip tio n These , Ai [T a2|T Ë, [7 ë2 |T e3 [T J 3 ]y 2 138 Z]Ÿ I 3 77) Ÿ 4 »0*5 F ea tu , devices Output drive capability: 10 LS TTL Loads Min. Operating speed superior to LS TTL Wide operating , inputs [T IF e Suffix-Blank : Plastic Dual In Line Package Suffix-J Ceram ic Dual In Line , Voltage V, VQ 0 Operating Temperature TA: G D 74 Types G D 54 Types -4 0 -5 5 Input Rise


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PDF GD54/74HC138, GD54/74HCT138
IC 7445

Abstract: 7445 LS 7445 24V decoder IC TTL 7445 7445 TTL OR
Text: Signetics 7445 Decoder /Driver BCD-To-Decimal Decoder /Driver (Open Collector) Product , Ideally suited as lamp or solenoid driver · See '42 for standard TTL output version · See '145 (or " LS , CODE PACKAGES COMMERCIAL RANGE VCC = 5V ±5%; Ta = 0°C to +70°C N7445N DESCRIPTION The '45 decoder , used as a 1 -of-8 decoder with Ag used as an active LOW enable. The '45 can sink 20mA while maintain , TABLE PINS Ao - A 3 0 -9 NOTE: A DESCRIPTION Inputs Outputs 74 lu i 12.5ul 74 unit load


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PDF N7445N 500ns 500ns IC 7445 7445 LS 7445 24V decoder IC TTL 7445 7445 TTL OR
1997 - TXD10K60

Abstract: BAY61 TLB3101 diode BAY61 TCA955 ic CD 4047 BAY61 diode tab2453 internal circuit diagram for ic 4047 TBL3101
Text: 2 1 6.8µF 2.2k 10k HA 1181 (A) 3 2 74 LS 190 6 (D) 7 5 Counter 13 13 12 1 11 74 LS 47 10 2 9 6 15 Decoder 14 g a g a 7 g 7x 150 7x 150 7 a 2.2k 14 13 3 7 12 2 1 11 5 74 LS 190 6 2 74 LS 47 10 9 6 7 15 11 , screened out by a filter. .524 (13.3) .563 (14.3) 3 Sensor Surface .118 (3.0) (3.5) . 138 , also important. These depend essentially on the collector current IC and the load resistance RL


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PDF SFH900--A SFH900. SFH900 TAB2453 TXD10K60 BAY61 TLB3101 diode BAY61 TCA955 ic CD 4047 BAY61 diode tab2453 internal circuit diagram for ic 4047 TBL3101
ic 74ls138

Abstract: 74LS138M 74LS139C N74LS139
Text: YI Y2 Y3 Y4 Y5 Y6 - B C G 2A G2B Gl Y7 TYPE ' LS 138 'S138 ' LS 1 3 9 'S139 P R O P A G A T IO N D E L A Y 13 L E V E L S O F L O G IC ) 22 ns 8 ns 22 ns 7.5 ns T Y P IC A L , / Demultiplexers Schottky Clamped for High Performance T Y P IC A L SN54LS138, SN54S138 . . . J O R W PACKAGE , Schottky decoder is negligible. The 'LS138 and 'S138 decode one-of-eight lines dependent on , active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder


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PDF SN54LS138. SN54LS139. SM54S13I, SNS4S139, SN74LS138. SM74LS139, SN74SB8. SN74S139 LS138 LS139 ic 74ls138 74LS138M 74LS139C N74LS139
ic 74155 decoder

Abstract: ic 74155 applications of 74155
Text: ic D IP (D) Flatpak (F) OUT A A A C O M M E R C IA L G R A D E V c c = +5.0 V ±5%, T a = 0 ° C to +70° C 74155PC, 7 4 LS 1 55 PC 74155DC, 74LS 155D C 74155FC, 74 LS 1 55 FC M ILIT A R Y G R A D E V , one active H IG H and one active L O W Input, w hile decoder "b" has two active LO W inputs. If the enable fun ction s are satisfied, one output of each decoder w ill be LO W , as selected by the A d dress , Input (Active HIGH) Outputs (Active LOW) 54/ 74 (U.L.) H IG H /LO W 1 .0 / 1 .0 1 .0 / 1 . 0 1 .0 / 1


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PDF 54LS/74LS155 54/74LS ic 74155 decoder ic 74155 applications of 74155
Not Available

Abstract: No abstract text available
Text: (& MOTOROLA MC54F138 MC74F138 1-0F-8 DECODER /DEMULTIPLEXER D E S C R IP T IO N - The M , -of-24 decoder using just three F138 devices or to a 1 -of-32 decoder using four F138s and one inverter, 1 2 3 · , nn eciion Diagram ) as The Dual in-line Packaga FAST AND LS TTL DATA MC54F/74F138 G U A R A N , Temperature Range Output Current - High Output Current - Low PA RA M ETER 54, 74 54 74 54, 74 54, 74 MIN 4.5 -55 0 TYP 5.0 25 25 M AX 5.5 125 70 -1.0 20 UNIT V °C mA mA DC C H A R A C T E R IS T IC S O V E R


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PDF MC54F138 MC74F138 C54F/74F138 1-of-24 -of-32 F138s 1-of-32 MC54F/74F138
HBF4727A

Abstract: ZD 607 - triac ZD 607 - triac circuit hbf 4727a hbf4727 TDA3310 HBF4740 DTL-930 7-stage frequency divider BF479S
Text: 133 136 138 139 151 152 153 155 156 160 161 162 163 170 175 181 190 191 192 193 T 74 LS 126 71 T , 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 LS 51 LS 54 LS 55 LS 74 LS 83 LS 85 LS 86 LS 95 LS 109 LS 112 LS 113 LS 114 LS 125 LS 126 LS 132 LS 133 LS 136 LS 138 LS 139 LS 151 , 74 74 74 74 74 74 74 74 74 74 74 74 74 74 LS LS LS LS 251 253 256 257 72 72 72 72 72 72 72 , TYPE (continued) PAGE TYPE PAGE T 74 LS 37 T T T T T T T T T T T T T T T T T T T T T T T T


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PDF
ic 74 LS 138 DECODER

Abstract: No abstract text available
Text: provided on all inputs and outputs Pin and Function Compatible with 74 series - (74AC/VHC/HC/F/ALS/ LS , etc.) 138 type Pin Connection A B 16 vcc 7o 7 i Y2 Pin Assignment 2U is C G 2A * $ I , TOSHIBA TC74LCX138F/FN/FS Low-Vottage Quad 3-TO-8 LINE DECODER with 5V Tolerant Inputs and Outputs The TC74LCX138 is a high performance C M O S 3-to-8 DECODER . Designed for use in 3.3 Volt systems, it , cascade connection and for use as an address decoder for memory systems. All inputs are equipped with


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PDF TC74LCX138F/FN/FS TC74LCX138 ic 74 LS 138 DECODER
P2301

Abstract: I-CUBE P900 P2101 icube P21J1 P181 relay
Text: LAN Switching Element Introduction The LS101 is a 24 port switching element for the LS Ethernet SwitchSetTM. W hen com bined with other m em bers of the LS family it provides the backbone of a scalable , backbone and stackable switch applications. Figure 2: LS Based Workgroup Switch Packets are , are dynam ic and are constructed on a de m and basis. Requests for connections through the sw itch are , em ory. Command Decoders There is a com m and decoder observing the data stream entering each


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PDF LS101 LS101 TQ144 PQ144 P2301 I-CUBE P900 P2101 icube P21J1 P181 relay
ic 74 LS 138 DECODER

Abstract: TC74VHCT138A TC74VHCT138AF TC74VHCT138AFK TC74VHCT138AFT VSSOP16-P-0030-0
Text: °C) · TTL : VIL = 0.8 V () VIH = 2.0 V () · : tpLH tpHL - · · 74 (74AC/HC/ALS/ LS etc.) 138 1 SOP16-P-300-1.27A TSSOP16-P-0044-0.65A VSSOP16-P-0030-0.50 : 0.18 g , TC74VHCT138AF/AFT/AFK CMOS TC74VHCT138AF,TC74VHCT138AFT,TC74VHCT138AFK 3-to-8 Line Decoder TC74VHCT138A CMOS CMOS CMOS TTL Q&Q TTL TTL 3 V 5 V ABC3 "L" "H" G1 , 49 pF () ns ns ns CPD IC ICC (opr) = CPD·VCC·fIN + ICC 5


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PDF TC74VHCT138AF/AFT/AFK TC74VHCT138AF TC74VHCT138AFT TC74VHCT138AFK TC74VHCT138A TC74VHCT138AF TC74VHCT138AFT 74AC/HC/ALS/LS OP16-P-300-1 ic 74 LS 138 DECODER TC74VHCT138A TC74VHCT138AFK VSSOP16-P-0030-0
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