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Part Manufacturer Description Datasheet Download Buy Part
LT1301IS8 Linear Technology LT1301 - Micropower High Efficiency 5V/12V Step-Up DC/DC Converter for Flash Memory; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
LT1301CS8 Linear Technology LT1301 - Micropower High Efficiency 5V/12V Step-Up DC/DC Converter for Flash Memory; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LT1301IS8#TR Linear Technology LT1301 - Micropower High Efficiency 5V/12V Step-Up DC/DC Converter for Flash Memory; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
LTC3216EDE#TRPBF Linear Technology LTC3216 - 1A Low Noise High Current LED Charge Pump with Independent Torch/Flash Current Control; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C
LT1301CS8#TR Linear Technology LT1301 - Micropower High Efficiency 5V/12V Step-Up DC/DC Converter for Flash Memory; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LTC3216EDE Linear Technology LTC3216 - 1A Low Noise High Current LED Charge Pump with Independent Torch/Flash Current Control; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C

flash "high temperature data retention" mechanism Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
Not Available

Abstract:
Text: ) High Temperature Data retention Electrostatic Discharge (ESD) Conditions Vcc: 5.5V Temperature : 125 , than those expected during a typical device's lifetime of operation. High Temperature Data Retention , Operating Life, Temperature Humidity Bias, Tempera- ture Cycling, Data Retention , Endurance, and , /Humidity (Biased) Temperature Cycle (Unbiased) Autoclave (Unbiased) High-Temperature Data Retention , and erase repeatedly (endurance) and data retention ( data stability over time) are fundamental


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flash "high temperature data retention" mechanism

Abstract:
Text: retention mechanism after endurance stress on flash memory. IEEE/IRPS Symp. Proc, 2000, pp.194-199. 4. A , 300K endurance for 0.26 µm cell (same sector size). No cycling-induced data retention failures have , less prone to SILC-related data retention failures. Below we will demonstrate the absence of data , TECHNIQUE ENDURANCE DISTRIBUTION OF MEMORY ARRAY DATA RETENTION AFTER PROGRAM/ERASE CYCLING CONCLUSIONS , reduction of program/erase efficiency, but also by data retention failures due to stress-induces leakage


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PDF 32Kbit flash "high temperature data retention" mechanism Angstrem 0.18-um CMOS Flash technology 1117 FG DSASW0037374 Hebrew material science and technology
2008 - flash "high temperature data retention" mechanism

Abstract:
Text: to retain its programmed state. Flash data retention is known to degrade over temperature . Various , versus temperature for this test. Flash Data retention over temperature 150 140 130 120 110 Number , 95 100 105 110 Temperature in Celcius Figure 1: Flash Data Retention vs Temperature for 170°C 420 , huge effect baking temperature has on flash data retention . The AF is almost ten times higher , shows the data retention versus temperature . Flash Data retention over temperature 2000 1800 1600


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PDF SLAA392 MSP430 MSP430 flash "high temperature data retention" mechanism MSP430F4xx SLAA392 MSP430F1xx 11303-3 flash
2000 - 68HC12

Abstract:
Text: change data states. This high voltage degrades the electrical operation of the bitcell a small amount , . Data Retention Since a ROM is manufactured in a way that hard codes the contents of its array, the subject of data retention is not commonly applied to ROM. However, an electrically programmable memory , result of charge loss or charge gain of the floating gate. Therefore, data retention is a parameter that , hot electron is a commonly used programming mechanism for EPROM and some types of FLASH EEPROM. When


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PDF AN1837/D AN1837 68HC12 68HC16 AN1837 FLASH CROSS M68HC08 M68HC12 motorola transistor cross reference
2004 - 68HC3xx

Abstract:
Text: require high voltage to be applied to the bitcell to change data states. This high voltage degrades the , the bitcell no longer operates properly. Data Retention Since a ROM is manufactured in a way that hard codes the contents of its array, the subject of data retention is not commonly applied to , gate. Therefore, data retention is a parameter that defines the ability of the NVM to retain its data across the defined operating specification. Data retention applies to all classes of EPROM and EEPROM


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PDF AN1837/D AN1837 68HC3xx disadvantages 68hc12 flash "high temperature data retention" mechanism 68HC12 68HC16 AN1837 M68HC08 M68HC12
2000 - 68HC12

Abstract:
Text: high voltage to be applied to the bitcell to change data states. This high voltage degrades the , the bitcell no longer operates properly. Data Retention Since a ROM is manufactured in a way that hard codes the contents of its array, the subject of data retention is not commonly applied to , the floating gate. Therefore, data retention is a parameter that defines the ability of the NVM to retain its data across the defined operating specification. Data retention applies to all classes of


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PDF AN1837/D AN1837 68HC12 68HC16 AN1837 M68HC08 M68HC12 motorola embedded flash 1990
2000 - motorola transistor cross reference

Abstract:
Text: high voltage to be applied to the bitcell to change data states. This high voltage degrades the , the bitcell no longer operates properly. Data Retention Since a ROM is manufactured in a way that hard codes the contents of its array, the subject of data retention is not commonly applied to , the floating gate. Therefore, data retention is a parameter that defines the ability of the NVM to retain its data across the defined operating specification. Data retention applies to all classes of


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PDF AN1837/D AN1837 motorola transistor cross reference 68HC12 68HC16 AN1837 FLASH CROSS M68HC08 M68HC12 motorola application note
2006 - SLAA334A

Abstract:
Text: Tables 1 2 3 Data Retention Over Recommended Operating Temperature in Data Sheets . 4 , sheet requirements. 3 Flash Memory Parameters 3.1 Data Retention 3.1.1 Leakage Mechanism Data retention is limited by leakage current through the insulating oxide. Leakage can only occur , application, the main influence on data retention is temperature . 3.1.2 Data Retention Time A common , accepted and all vendors specify 100 years as the flash data retention duration at 25°C, despite it being


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PDF SLAA334A MSP430 MSP430F1xx, MSP430F2xx, MSP430F4xx SLAA334A MSP430F1xx MSP430F4xx flash "high temperature data retention" mechanism
memory eras

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Text: . Intel flash memory combines the EPROM programming mechanism with EEPROM erase, producing a versatile , Intel's EPROM designs. Row decoders drive the selected wordline to high voltage, while input data , processes share the same data retention characteristics. Preliminary qualifi cation data shows that 1 , acquisition. Flash memory devices pro duce on the ETOX II process provide a high density, low cost solution to , Flash Memory EEPROM Normalized Cell Size Programming: Mechanism Resolution Typ. Time Erase: Mechanism


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PDF ER-20 memory eras intel EPROM
AMD Flash Memory

Abstract:
Text: issue. Efficient Programming Algorithm s A lso Guarantee Data Retention AMD's Flash memory , similar to EPROM . This provides data retention that is equivalent to that of EPROM devices. The device is , number of pulses. We guarantee data retention by using a similar margin verify concept employed by EPROM , 12.0 V Vpp supply. In this way, data retention is guaranteed to equal that of EPROM memories , Section 4 Advantages of AM D's 12.0 V Flash Mem ory Fam ily AM D's Flash Mem ories Create a


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PDF 32-pin 32-bit AMD Flash Memory
1995 - lexan 940

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Text: . . . . . . 2-1 CHAPTER 3 RETENTION MECHANISM . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . 6-1 CHAPTER 7 DUAL PROCESSOR RETENTION MECHANISM . . . . . . . . . . . . . , 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 3-12 3-13 3-14 3-15 Retention Mechanism , Clip, and Captured Nut ­ Exploded View . . . . . . . . . . 3-2 Retention Mechanism , Clip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 Retention Mechanism , Nut . . .


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2012 - Not Available

Abstract:
Text: footprint + High logistics flexibility – Coarse write granularity mechanism also suitable for data , locking mechanism The code and data content of FLASH products need to be protected after programming in , data . With the introduction of smaller feature sizes and highly integrated FLASH technology (and , High reliability (hardwired code/ data ) Non Volatile Memory Generic term for memory technologies , , mainly used for data but also utilized for + High logistics flexibility + Fine write granularity


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2000 - flash "high temperature data retention" mechanism

Abstract:
Text: characterized using very high temperatures to accelerate data retention studies. Testing Methodology The , a given temperature required to reach 50% failures. It is the measure of the data retention , impact of operating temperature on data retention . Ramtron specifies its product at 85°C. The , Technology Note FM24C16 Data Retention Characterization ­ Updated 5/00 Overview Ramtron , in a product feature. This technology note provides an overview of the data retention


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PDF FM24C16 FM24C16. flash "high temperature data retention" mechanism EEPROM retention testing flash Activation Energy FM24C16
2012 - Not Available

Abstract:
Text: years data retention GPNVM  GPNVM Endurance > 100 K cycles Contactless Interface  ISO/IEC , transferred data Parameters  Resonant capacitor 14pF  Temperature range -25°C to + 85°C  >3 , between code and data space. GPNVM System is area with an extended protection mechanism and typically , Type B data encoding and decoding. This high speed interface sustains data transfer rates up to 848kbps. It offers the high level of flexibility in order to use symmetric or asymmetric data rates


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PDF EM4830 CRC16 ISO3309 ISO13239 4830-FS 21-Dec-12
1996 - 22A-104

Abstract:
Text: : Conditions: Purpose: Data Retention Testing High Temperature Non-biased Bake High Temperature Non-biased , from stress data is summarized in Appendix A. Test: Conditions: Duration: High Temperature Steady , . . . . . . . . . . 5.1 Data Retention Failure Rate Determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . HIGH TEMPERATURE STEADY STATE LIFE TEST . . . . . . . . . . . . . , -PAGE 3- CYPRESS SEMICONDUCTOR PRODUCT RELIABILITY HIGH TEMPERATURE OPERATING LIFE: EARLY


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QUANTUM CAPACITIVE

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Text: temperature and can be applied to virtually any submicron FG memory cell. The potential applications include precise capacitance measurements, as well as analysis of program, erase, disturb and data retention , guarantees industry-standard 10 years data retention in FG cells (1 electron/day = 3650 electrons/10 years , stress-induced leakage current, study of program/erase/disturbs/ data retention in the range of extremely low FG , condition limits the range of FG capacitance and operating temperature of Coulomb blockade-based SET. To


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PDF 0-23A QUANTUM CAPACITIVE 4156C flash "high temperature data retention" mechanism floating-gate quantum dot split-gate flash
1996 - Gunn Diode symbol

Abstract:
Text: Acceleration Factors Acceleration factors (AF) for thermal stresses ( High Temperature Operating Life, Data Retention and High Temperature Steady State Life) are calculated from the Arrhenius equation. where: EA , Calculation For all but the High Temperature Operating Life (HTOL) test, the failure rate is calculated by , temperature cycling, (Tmin). The model constant, m, is a function of the failure mechanism . Thin Film , high temperature condition of the temperature cycling stress, dislocations are forced towards one


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PDF 62x10-5 Gunn Diode symbol cy202 CY7C190 WSP-109BMP3 pal22V10D CY7C371 cy7c291 EV film cap calculation CY74FCT521 cy7b166
2010 - EM-483

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Text: Attribute memory 1056 B 15 year data retention GPNVM GPNVM Endurance > 100 K cycles Boot loader GNG , when CPU is in IDLE state. The FLASH based architecture offers a very high degree of flexibility. A , configurable can support ISO14443 A, B standards. This high speed interface sustains data transfer rates up , EM MICROELECTRONIC - MARIN SA EM4830DUAL Dual Interface Multiprotocol FLASH Based Smart Card , Byte programming: 40 us / Byte GPNVM Page Smart Erase mechanism Contact-less Interface RF Field


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PDF EM4830DUAL 106kbs ISO14443 848kbps. EM4830DUAL ISO7816-3 4830-FS 2-Feb-10 EM-483 EM 4830 HBM Memory 2560B 848kbps FIPS140-2 FIPS-140-2
2003 - 28F640w18t

Abstract:
Text: Standby Data Retention Any flash mode allowed Note 2 Note 2 Same as SRAM standby NOTES: 1 , Flash Data Protection - Absolute Protection with VPP and WP# - Individual Zero-Latency Block Locking , Temperature : ­25 °C to +85 °C - Minimum 100K Block Erase Cycles - 0.13 µm ETOXTM VIII Process Flash Software - Intel® Flash Data Integrator Optimized - Common Flash Interface (CFI) This versatile , . 22 Data Retention Mode


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PDF W18/W30 32-Kword W18/W30 64W18 RD38F2020W0YTQ0 64W30 RD38F2020W0YBQ0 RD38F2020W0ZBQ0 RD38F2020W0ZTQ0 28F640w18t flash "high temperature data retention" mechanism 1.8V SRAM 251216 28F640W18 28F640W30 64WQ FLASH MEMORY 38F INTEL wireless FLASH MEMORY DATASHEETS
2003 - JESD22-A117

Abstract:
Text: 6. Data Retention in Years over Junction Temperature NOTE: A minimum of 30µs for Flash write , endurance of MSC1210 Flash and also discusses the data retention specifications of the MSC1210. Contents , the Flash data retention specifications. The minimum required write-time of 30µs and erase-time of , the these limits. Maximizing Endurance of MSC1210 Flash Memory 7 SBAA091 Data Retention The basic requirement for Flash is that of data retention . Flash must ensure a period over which the


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PDF SBAA091 MSC1210 24-bit 4/8/16/32K MSC1210 MSC1210. JESD22-A117 MSC1210 Flash Routines SBAA085 1486-012 JESD22a117 msc1210 flash programming programming MSC1210
cf card connector

Abstract:
Text: Rectangular Connectors q Smooth card ejection. q 3-step ejection mechanism . (Ejection button will not pop , increase retention force twice existing IC11S series. Coaxial Connectors Applications DVD recorder , (mm) Contact Pitch (mm) Contact Layout Operating Temperature Range (ç) Insulator Industry , . (3-Step Ejection Mechanism ) q Smooth card ejection. Applications FPC/FFC Connectors Notebook , Generic Name Terminal Pitch (mm) Contact Pitch (mm) Contact Layout Operating Temperature Range (ç


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PDF IC11S UL94V-0, cf card connector CO-6F hirose pcmcia nx MI20 MI21 pcmcia smart modular flash card SD card connector
2010 - JESD22-A117

Abstract:
Text: ROM (EEPROM) or FLASH Program/Erase Endurance and Data Retention Stress Test" · JESD48, which , differences between these products are only about Flash Data memory size and mapping, and , bytes Byte program: 8µs 64K Bytes of Flash Data Memory Sector: 128 bytes Byte program: 16µs , 5 25 years data retention (See "Quality & Reliability" on page 5) Full Memory Personalization Time , · SCF328G: 256K Bytes Flash Code / 72K Bytes Flash Data Endurane Global Capacity


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PDF SCF320G SCF328G SCF335G MAR013 TEP009 SCF320G TEP011 JESD22-A117 SCF328G starchip subscriber identity module diagram JESD47 super harvard architecture block diagram flash "high temperature data retention" mechanism iso7816 sim starchip
2010 - JESD22-A117

Abstract:
Text: differences between these products are only about Flash Data memory size and mapping, and , bytes Byte program: 8µs 128K Bytes of Flash Data Memory Sector: 128 bytes Byte program: 16µs , years data retention (See "Quality & Reliability" on page 5) Full Memory Personalization Time: down to , · SCF392G: 256K Bytes Flash Code / 136K Bytes Flash Data Endurance Global Capacity: at least 200 Millions Program/Erase SCF399G: 256K Bytes Flash Code / 143K Bytes of Flash Data


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PDF SCF384G SCF392G SCF399G MAR003 TEP001 SCF384G TEP010 JESD22-A117 SCF392G JESD22a117 JESD-47 iso7816 class c subscriber identity module diagram JESD48 iso7816 sim starchip JESD47
49225-0811

Abstract:
Text: standard Single inline surface mount tails: 0.635mm (.025") pitch High temperature housing for IR , with Gold Flash Operating Temperature : -20 to +60°C Lead-free Yes www.molex.com/product/pccard , mechanism Reference Information Product Specification: PS-67160-011 Packaging: Tray Use With: 67121-0001 , Resistance: 40 milliohms max. Insulation Resistance: 1000 Megohms min. Mechanical Contact Retention to , mating retention Wide open area on shells accommodates pick-and-place 49225 Reverse With Detect


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PDF 635mm PS-67160-011 PS-49225-001 49225-0811 492250821 microSD slot PS-49225-001 49225-0821 T-flash tray microSD card 67130
2005 - TMS470 F05

Abstract:
Text: built-in mechanism for detecting weak or degraded flash bits before they fail. A way of using this , = 0x3C12h] . 5 Flash Module Data Path Test Register (FMDTR) [offset = , if there are any leakage paths. This leakage is called data retention loss (DRL). Erased cells, on , Access Control Register number 2 (FMMAC2) before writing to this register. Figure 2. Flash Module Data , without error. ROM memory does not have the same failure mechanism as flash memory, and the read margin


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PDF SPNA091A TMS470 TMS470 F05 airbag intvecs.asm SPNU213
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