The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
DC392A-A Linear Technology LTC1628 or LTC3728 Evaluation Kit
DC392A-C Linear Technology LTC1628 or LTC3728 Evaluation Kit
DC392A-B Linear Technology LTC1628 or LTC3728 Evaluation Kit
LF198S Linear Technology IC SAMPLE AND HOLD AMPLIFIER, PDSO, Sample and Hold Circuit
LF198AJ8 Linear Technology IC SAMPLE AND HOLD AMPLIFIER, CDIP8, Sample and Hold Circuit
LF198AS Linear Technology IC SAMPLE AND HOLD AMPLIFIER, PDSO, Sample and Hold Circuit

dtl ttl logic GUIDE Datasheets Context Search

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dtl logic gates

Abstract: 754528 SG506 relay ttl input 12v output dual pole 12V DC Relay RS -12V RELAY logic gates pin configuration PIN DIODE DRIVER CIRCUITS SG1644 relay 12v 0.2a
Text: rate control with external ca pacitor · Inputs compatile with DTL and TTL logic Piega. j SQ1489 , outputs T, R High speed Schottky logic Frequencies beyong 1MHz TTL input compatibility Rise and fall times , / 74 logic series · Inputs compatible with DTU TTL H LINEAR IN TEG R A TED CIRCU ITS 8Q6S325 , · Two NAND gates and two uncommited NPN transis tors · High speed switching · TTL or DTL compatible , switching · TTL or DTL compatible diode-clamped inputs · Two NAND gates with open collector outputs · High


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PDF SG1488 RS-232C SQ1489/SG1489A dtl logic gates 754528 SG506 relay ttl input 12v output dual pole 12V DC Relay RS -12V RELAY logic gates pin configuration PIN DIODE DRIVER CIRCUITS SG1644 relay 12v 0.2a
uln series

Abstract: 2077B 2069B 2061M 2068B 2071b 2066B uln2068b 2076-B 2064B
Text: GUIDE Drivers Sustaining Interface Device Type Per Package Voltage Compatibility ULN-2061M 2 50 TTL , DTL ULN-2062M 2 80 TTL , DTL ULN-2064B 4 50 TTL , DTL ULN-2065B 4 80 TTL , DTL ULN-2066B 4 50 MOS ULN-2067B 4 80 MOS ULN-2068B 4 50 TTL , DTL (Hi Gain) ULN-2069B 4 80 TTL , DTL (Hi Gain) ULN-2070B 4 50 MOS (Hi Gain) ULN-2071B 4 80 MOS (Hi Gain) ULN-2074B 4 50 TTL , DTL ULN-2075B 4 80 TTL , DTL ULN , are designed for a broad area of interface applications between low level/low current logic systems


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PDF ULN-2061M, ULN-2062M, ULN-2064B, ULN-2065B, ULN-2067B ULN-2066B) uln series 2077B 2069B 2061M 2068B 2071b 2066B uln2068b 2076-B 2064B
dtl logic gates

Abstract: CAG24 CAG42 CAG27 CAG13C TELEDYNE HNIL CAG13A CAG27-10 CAG30 CAG13
Text: except the CAG6 operate directly from DTL or TTL logic without special biasing. Most will work with , 10V SIGNAL LEVELS WORK FROM DTL , TTL , HNIL AND MOS LOGIC 20 Vpp SIGNAL LEVELS AC OR DC WITH CAG42 PG , LOGIC DTL / TTL NORMAL DTL / TTL INVERTED MOS DTL / TTL DOUBLE THROW 15 10 VSIG PEAK 10 -15 VSIG , for normal operation. The following pages may help you in your final selection. The guide shown below , numerical order. SELECTION GUIDE - FET ANALOG GATES 2 > TELEDYNE 147 Sherman Street, Cambridge, Mass


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PDF CAG30 dtl logic gates CAG24 CAG42 CAG27 CAG13C TELEDYNE HNIL CAG13A CAG27-10 CAG13
2003 - analog devices AD2021 digital panel meter

Abstract: AD2021 AD2010 bcd seven segment display AD2010/E
Text: , character serial format. . Digit Strobe Outputs: (CMOS, DTL , TTL compatible, one TTL load). Logic "1" on any of these lines indicates the output data is valid for that digit. . Polarity Output: (CMOS, TTL , DTL compatible, one TTL load). Logic "I" indicates positive polarity input, logic "0" indicates negative polarity. . Status: (CMOS or LP TTL compatible). When this signal is at Logic " 1", the output data is valid. . , CONTROL INPUTS . Display Blankin2: ( TTL , DTL compatible, 2 TTL loads). Logic "0" or grounding blanks the


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PDF AD2021 AD2021 AD2021/S AD2021/V analog devices AD2021 digital panel meter AD2010 bcd seven segment display AD2010/E
analog devices AD2021 digital panel meter

Abstract: AD2021 TTL 7475 AD2010 AC1501 seven segment quad digit display red input AD20* PANEL METER mos-lsi
Text: signal. » Hold: (CMOS, DTL , TTL compatibly 1LP TTL load). Logic "0" or grounding causes the EPM to , . • Polarity Output: (CMOS, TTL , DTL compatible, one TTL load). Logic "1" indicates positive , signal is at Logic "1", the output data is valid. • Clock: (CMOS, DTL , TTL compatible, one TTL load). , conversions per second • Hold and read on command CONTROL INPUTS • Display Blanking: ( TTL , DTL compitible, 2 TTL loads). Logic "0" or grounding blanks the three data digits only, not the decimal points


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PDF AD2021 AD2021 J2021 AD2021/S AD2021/V 2VK15D/1-2 AC1501 analog devices AD2021 digital panel meter TTL 7475 AD2010 seven segment quad digit display red input AD20* PANEL METER mos-lsi
SDC40-L-1

Abstract: SDC40 SDcd RDC40 SDC610 SDC60-HI Synchro to bcd sin cos encoder sdc-60 sdc412
Text: logic , DTL / TTL " " levels, 14 angle data, 1 Inhibit, 1 Converter Busy Line (LPShottky available). FAN OUT: 5 Standard TTL / DTL Loads • • CONVERTER BUSY: Positive pulse 3 microseconds * # duration during output update. Drives 2 standard TTL / DTL loads. INHIBIT: DTL / TTL Compatible Fan In: 2 TTL loads , . The converter busy comes from TTL logic and must be connected to TTL / DTL compatable inputs. It has a fan out of 2 TTL / DTL loads. DIGITAL OUTPUTS The data outputs Bit 1 (MSB) thru Bit 14 (LSB) can drive


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PDF
SDC601

Abstract: SDC-60 SDC610 SDC60 pulse transformer circuit SDC40 Computer Conversions Corporation
Text: CODING. Natural binary angle * • DIGITAL OUTPUT: Parallel, positive logic , DTL / TTL " levels, 14 angle data, 1 Inhibit, 1 Converter Busy Line I LP Shottky available). FAN OUT: 5 Standard TTL / DTL Loads • CONVERTER BUSY: Positive pulse 3 microseconds * duration during output update. Drives 2 standard TTL / DTL loads. INHIBIT: DTL / TTL Compatible Fan In: 2 TTL loads SYNCHRO INPUT (2) RESOLVER INPUT IR DC 40 , the "C" terminal. The converter busy comes from TTL logic and must be connected to TTL / DTL compatable


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PDF 000G4b2 SDC601 SDC-60 SDC610 SDC60 pulse transformer circuit SDC40 Computer Conversions Corporation
1998 - LS145

Abstract: texas 74 series TTL logic gates dtl ttl logic series guide designing with ttl integrated circuits
Text: and outputs are entirely compatible for use with TTL or DTL logic circuits, and the outputs are , entirely compatible for use with TTL or DTL logic circuits, and the outputs are compatible for interfacing , Logic Reference Guide (SCYB004, 1032 KB - Updated: 10/23/2001) Logic Selection Guide Second Half 2002 , Back to Top View Related Documentation for Digital Logic q q q Logic Reference Guide (SCYB004, 1032 KB - Updated: 10/23/2001) Logic Selection Guide Second Half 2002 (Rev. R) (SDYU001R, 4274 KB -


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PDF SN74145N SN74145N3 SN74145NSR LS145 texas 74 series TTL logic gates dtl ttl logic series guide designing with ttl integrated circuits
TELEDYNE HNIL

Abstract: CAG27 TELEDYNE CAG13A CAG13C CAG24 CAG13 CAG27-10 CAG30 CAG42
Text: except the CAG6 operate directly from DTL or TTL logic without special biasing. Most will work with , 10V SIGNAL LEVELS WORK FROM DTL , TTL , HNIL AND MOS LOGIC 20 Vpp SIGNAL LEVELS AC OR DC WITH CAG42 PG , for normal operation. The following pages may help you in your final selection. The guide shown below , numerical order. SELECTION GUIDE - FET ANALOG GATES 2 > TELEDYNE 147 Sherman Street, Cambridge, Mass , * Power Drain Pt/Ckt. Vin = + 3V — 65 90 _ 5 6 mW * Logic "1" Current llN (1 ) VlN—+ 2.4V _ 320 400


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PDF CAG30 CAG13 O-100 CAG13A CAG13C CAG13D CAG24 CAG27 CAG27-10 TELEDYNE HNIL TELEDYNE CAG42
Diode S4 55a

Abstract: AD7501 15V1 AD7502 AD7503
Text: identical to the AD7501 except its "enable" logic is inverted. All digital inputs are TTL / DTL and CMOS logic , □ ANALOG CMOS DEVICES 4/8 Channel Analog Multiplexers AD7501/AD7502/AD7503 FEATURES DTL / TTL /CMOS Direct Interface Power Dissipation: 30|iW Ron- 170il Standard 16-Pin DIPs and 20-Terminal Surface Mount Packages FUNCTIONAL BLOCK DIAGRAMS AD7501/AD7503 EN A2 Al AO 31 'oJ "I >0-1 TTL / DTL TO , «+15V1™ GND&—1 r,-l-f-i-r: I DTL / TTL TO CMOS LEVEL TRANSLATOR^ DECODER/OR IVER Tn


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PDF AD7501/AD7502/AD7503 170il 16-Pin 20-Terminal AD7501/AD7503 AD7502 AD7501 AD7503 Diode S4 55a 15V1 AD7502
1998 - SCHS046A

Abstract: CD4050BE ic 16 pin diagram CD4049 pin configuration not gate CD4050B dtl ttl logic GUIDE
Text: logic-level conversions. These devices are intended for use as CMOS to DTL / TTL converters and can drive directly two DTL / TTL loads. (VCC = 5V, VOL 0.4V, and IOL 3.3mA.) The CD4049UB and CD4050B are designated , Driving 2 TTL Loads · High-To-Low Level Logic Conversion · 100% Tested for Quiescent Current at 20V · , ) /Autho r () /Keywords (Harris Semiconductor, CD400 0, metal gate, CMOS Applications · CMOS to DTL / TTL , DTL / TTL 5V LEVEL VCC = 5V VCC INPUTS VCC I VSS VSS 10V = VIH 0 = VIL VSS OUTPUTS COS/MOS IN CD4049


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PDF CD4049UB, CD4050B SCHS046A CD4049UB CD4050B CD4009UB CD4010B, SCHS046A CD4050BE ic 16 pin diagram CD4049 pin configuration not gate dtl ttl logic GUIDE
1995 - VHC 123A

Abstract: CMOS 4017 series 74 ls 4066 4001 4011 cmos 4526B 4584b 74 hc 589 HC 4011 FCT 322 4048 datasheet hct
Text: October 1995 Logic Availability Guide Cross Reference FASTr TM FAST ALS AS LS S TTL ABT LCX , Other TTL Families DTL 9300 9600 93L 96L 54L 93S Other CMOS Families CD4K 70 80C 78 88C FAST is a , of National Semiconductor Corporation 1 Logic Availability Guide Here's a quick and easy way to review National's Logic products Cross-referencing is sequential by standard generic numbers so , C D D CGS100P2530 CGS100P2531 D D CGS product Other TTL Logic Families 93L 96L


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PDF F100K VHC 123A CMOS 4017 series 74 ls 4066 4001 4011 cmos 4526B 4584b 74 hc 589 HC 4011 FCT 322 4048 datasheet hct
CAG30

Abstract: TELEDYNE dtl logic gates
Text: except the CAG6 operate directly from DTL or TTL logic without special biasing. Most will work with , switching up to ±10V signals directly from DTL or TTL while providing high logic noise immunity (typically , for normal operation. The following pages may help you in your final selection. The guide shown below , numerical order. SELECTION GUIDE - FET ANALOG GATES 2 > TELEDYNE 147 Sherman Street, Cambridge, Mass , 'lQQ VcC 0 r' • 60 OHM MAX. Ron • WORKS DIRECTLY FROM LOGIC • HIGH LOGIC NOISE IMMUNITY â


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PDF CAG30 140kHz CRYSTALONI03 TELEDYNE dtl logic gates
BASIC COMPARATOR CIRCUITS

Abstract: No abstract text available
Text: , DTL , ECL and CMOS logic system Basic comparator Pulse comparator MOS clock driver KA710/I 14 DIP , LINEAR ICs 8. VOLTAGE COMPARATOR Function Device Package Features FUNCTION GUIDE , drift Compatible with practically all types of integrated logic High precision comparators Reduced V0s , form of logic Power drain suitable for battery operation Low input biasing current: 25nA Low output , voltage 250mV at 4mA M ultivibrator output is compatible with DTL and as well as MOS circuits voltage


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PDF KA311 250mA KA710/I KA393/A KA2903 KA293/A KA319 KA219 KA711/I BASIC COMPARATOR CIRCUITS
2002 - Not Available

Abstract: No abstract text available
Text: -V, and 15-V parametric ratings Applications: r CMOS to DTL / TTL hex converter r CMOS current "current" or , Back to Top CD4009UB and CD4010B Hex Buffer/Converters may be used a CMOS to TTL or DTL logic-level , Interface Logic Selection Guide (SCYT126, 448 KB - Updated: 01/09/2001) Documentation Rules (SAP) And Ordering Information (Rev. B) (SZZU001B, 13 KB - Updated: 05/06/1999) Logic Selection Guide First Half 2002 , Current Logic 140 0.001 Inv FEATURES Back to Top q q q q 100% tested for quiescent current at 20 V


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PDF SCHS020A CD4009UB CD4010B 16-lead SDYZ001A, 89264UKB3T CD4009UBE CD4009UBF
synchro to digital converter 11 bits

Abstract: resolver 3600 SDC40 CMOS TTL fan IN and fan OUT RESOLVER 26V 400 HZ
Text: Angle * * DIGITAL OUTPUT Parallel Positive Logic DTL / TTL Level 14 Angle data 11nhibit, 1 converter busy line (LP Schottky available) • Parallel, positive logic , Cmos/ TTL Levels, 10 angle data, 1 inhibit , Positive Pulse 3 usee duration during output update. Drives 5 std TTL loads Logic "1" = CB • • INHIBIT DTL / TTL compatable-logic "0" = INH-FAN In: 1TTL load * SYNCHRO INPUT (2) (3) 11.8V RMS L-L, 50-1200 , over a frequency range of 50 to 1200 Hz and convert it into 10,12 or 14 Bit, TTL compatable natural


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PDF 231DflQ0 00004b4 SDC40ST-L-283) SDC410ST-H-1HS. for0-70 SDC40ST-L-1. synchro to digital converter 11 bits resolver 3600 SDC40 CMOS TTL fan IN and fan OUT RESOLVER 26V 400 HZ
driver motor stepper ULN

Abstract: LC125A PD 2061 A LN2064 LN-206 355B 10.400C D42M 2069B ULN2064B TYPICAL APPLICATION
Text: (suffix B) and 20-lead surface-mountable wide-body SOICs (suffix LB). FEATURES ■TTL , DTL , MOS, CMOS , cex Min. V ce(sus) Max. v,n Application ULN2061M 50 V 35 V 30 V TTL , DTL , Schottky TTL , and 5 V CMOS ULN2062M 80 V 50 V 60 V ULN2064B ULN2064LB 50 V 35 V 15 V TTL , DTL , Schottky TTL , and 5 V CMOS ULN2065B 80 V 50 V 15 V ULN2068B ULN2068LB 50 V 35 V 15 V TTL , DTL , Schottky TTL , and 5 V CMOS ULN2069B 80 , One Driver (unless otherwise noted) Output Voltage, VCEX.See Guide Output Sustaining


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PDF N2064/65B ULN2068B/LB 2069B) 2074B ULN2064 JLN207 ULN2064LB ULN2068LB UDN2980A/EP/LW uln-2064/66b driver motor stepper ULN LC125A PD 2061 A LN2064 LN-206 355B 10.400C D42M 2069B ULN2064B TYPICAL APPLICATION
Not Available

Abstract: No abstract text available
Text: 30 V 60 V TTL , DTL , SchottKy TTL , and 5 V CMOS ULN2064B ULN2064LB ULN2065Bf 50 V 35 V 15 V TTL , DTL , Schottky TTL , and 5 V CMOS 80 V 50 V 15 V ULN2068Bt ULN2068LB ULN2069B 50 V 35 V 15 V 80 V 50 V 15 V V ,N Application TTL , DTL , Schottky TTL , designed for interface between low-level logic and a variety of peripheral loads such as relays, solenoids , ) Output Voltage, VCEX.See Guide Output Sustaining Voltage, Quad drivers ULN2064B


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PDF D50433B ULN2061M ULN2069B ULN2064/65B D50433Ã ULN2064LB ULN2068LB D504336 LN-2064/66B
AD7501

Abstract: 15V1 AD7502 AD7503 24V N16 20A
Text: identical to the AD7501 except its "enable" logic is inverted. All digital inputs are TTL / DTL and CMOS logic , □ ANALOG CMOS DEVICES 4/8 Channel Analog Multiplexers AD7501/AD7502/AD7503 FEATURES DTL / TTL /CMOS Direct Interface Power Dissipation: 30|iW Ron- 170il Standard 16-Pin DIPs and 20-Terminal Surface Mount Packages FUNCTIONAL BLOCK DIAGRAMS AD7501/AD7503 EN A2 Al AO 31 'oJ "I >0-1 TTL / DTL TO , «+15V1™ GND&—1 r,-l-f-i-r: I DTL / TTL TO CMOS LEVEL TRANSLATOR^ DECODER/OR IVER Tn


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PDF AD7501/AD7502/AD7503 170il 16-Pin 20-Terminal AD7501/AD7503 AD7502 AD7501 AD7503 15V1 AD7502 24V N16 20A
uln2065bt

Abstract: ULN2065
Text: \ FEATURES TTL , DTL , MOS, CMOS Compatible Inputs Transient-Protected Outputs Loads to 480 Watts , V 50 V 80 V 50 V 80 V Min. V CE(SUS) Max. V ,N Application TTL , DTL , Schottky TTL , and 5 V CMOS TTL , DTL , Schottky TTL , and 5 V CMOS TTL , DTL , Schottky TTL , and 5 V CMOS DISSIPATION , Darlington arrays ULN2061M through ULN2069B are designed for interface between low-level logic and a variety , /LB, ULN2065B, ULN2068B/LB, and ULN2069B are intended for use with TTL , low-speed TTL , and 5 V MOS


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PDF 2064/65B ULN2061M ULN2069B ULN2062M ULN2064LB 2068LB ULN2066B/LB uln2065bt ULN2065
spf 316

Abstract: AD7501 AD7502 AD7503 24V N16 20A AD75030
Text: identical to the AD7501 except its "enable" logic is inverted. All digital inputs are TTL / DTL and CMOS logic , ► ANALOG DEVICES CMOS 4/8 Channel Analog Multiplexers AD7501/AD7502/AD7503 FEATURES DTL / TTL /CMOS Direct Interface Power Dissipation: 30|iW Ron: 170ft Standard 16-Pin DIPs and 20-Terminal Surface Mount Packages FUNCTIONAL BLOCK DIAGRAMS AD750I/AD7503 EN A2 AI AO VDD n_ TTL / DTL TO CMOS LEVEL , -f—Ì-Η. I I-1-1-1-1 I VDD n—1 I DTL / TTL TO CMOS LEVEL TRANSLATOR > l+15VI°] I-y-1 I L DECODER


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PDF AD7501/AD7502/AD7503 170ft 16-Pin 20-Terminal AD750I/AD7503 AD7501 AD7503 AD7502 spf 316 24V N16 20A AD75030
45BJ

Abstract: 456J Model 450J 454J 450J precision full wave peak Frequency Generator 10kHz Model 450 V 454
Text: Logic "0" (Low) Level Capacitive Loading Fan Out Loading Impedance trai n of TTL / DTL compatible puises 50/is 200ns/100ns positive + 2.4V min +0.4V max lOOOpF max 10 TTL loads min 3.3ki2 train of TTL / DTL , Wide Dynamic Range: >86dB; Model 4!>4J/K Meet Ml L-STD-202E Environmental Testing TTL / DTL or CMOS/HNIL , TTL / DTL compatible puises 25ms 200ns/100ns positive +2.4V min +0.4V max lOOOpF max 10 TTL loads min , GUIDE These compact modules are available in six versions with performance features aimed at meeting


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PDF 10/20kHz 50ppm 25ppm/Â 454J/K L-STD-202E 10kHz 20kHz 4-20inA 10kHz 45BJ 456J Model 450J 454J 450J precision full wave peak Frequency Generator 10kHz Model 450 V 454
AD7501

Abstract: 15V1 AD7502 AD7503 24V N16 20A AD750 ad7602 A07S02
Text: identical to the AD7501 except its "enable" logic is inverted. All digital inputs are TTL / DTL and CMOS logic , □ ANALOG CMOS DEVICES 4/8 Channel Analog Multiplexers AD7501/AD7502/AD7503 FEATURES DTL / TTL /CMOS Direct Interface Power Dissipation: 30|iW Ron- 170il Standard 16-Pin DIPs and 20-Terminal Surface Mount Packages FUNCTIONAL BLOCK DIAGRAMS AD7501/AD7503 EN A2 Al AO 31 'oJ "I >0-1 TTL / DTL TO , «+15V1™ GND&—1 r,-l-f-i-r: I DTL / TTL TO CMOS LEVEL TRANSLATOR^ DECODER/OR IVER Tn


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PDF AD7501/AD7502/AD7503 170il 16-Pin 20-Terminal AD7501/AD7503 AD7502 AD7501 AD7503 15V1 AD7502 24V N16 20A AD750 ad7602 A07S02
20 PIN LEADLESS CHIP CARRIER

Abstract: SG2803 14V25V SG2803J SG28XXJ 14109BVA MIL-M-38510
Text: input configurations provide optimized designs for interfacing with DTL , TTL , PM O S, or CM O S drive , DIODES FOR INDUCTIVE LOADS DTL , TTL , PMOS, OR CMOS COMPATIBLE INPUTS HERMETIC CERAMIC PACKAGE a H , 500mA Logic Inputs General Purpose PMOS, CMOS 14V-25V PMOS 5V TTL , CMOS 6V-15V CMOS, PMOS General Purpose PMOS, CMOS 14V-25V PMOS ^5V TTL , CMOS r6V-15V CMOS, PMOS Hish Output TTL General Purpose PMOS , selection guide , see next page. SG28xxL/883B SG2803L/DESC SG2821L/DESC SG2823L/DESC SG2824L/DESC FO R


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PDF SG2800 500mA 600mA 20 PIN LEADLESS CHIP CARRIER SG2803 14V25V SG2803J SG28XXJ 14109BVA MIL-M-38510
2002 - Not Available

Abstract: No abstract text available
Text: /Converters may be used a CMOS to TTL or DTL logic-level converters or CMOS high-sink-current drivers. The , Logic q q q Logic Reference Guide (SCYB004, 1032 KB - Updated: 10/23/2001) Logic Selection Guide , package-temperature range; 100 nA at 18 V and 25°C 5-V, 10-V, and 15-V parametric ratings Applications: r CMOS to DTL / TTL hex converter r CMOS current "current" or "source" driver r CMOS high-to-low logic-level converter , Application Notes for Digital Logic q q Evaluation of Nickel/Palladium/Gold-Finished Surface-Mount


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PDF SCHS020A CD4009UB CD4010B 16-lead CD4010BM96 CD4010BNSR CD4010BPW CD4010BPWR
Supplyframe Tracking Pixel