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Part Manufacturer Description Datasheet Download Buy Part
LT1912IMSE#TRPBF-ES Linear Technology 36V, 2A, 500kHz Step-Down Switching Regulator
LT1912IDD#PBF-ES Linear Technology 36V, 2A, 500kHz Step-Down Switching Regulator
LT1912IMSE#PBF-ES Linear Technology 36V, 2A, 500kHz Step-Down Switching Regulator
LT1912IDD#TRPBF-ES Linear Technology 36V, 2A, 500kHz Step-Down Switching Regulator
LTC3721EUF-1#TR Linear Technology LTC3721-1 - Push-Pull PWM Controller; Package: QFN; Pins: 16; Temperature Range: -40°C to 85°C
LTC3721EGN-1#PBF Linear Technology LTC3721-1 - Push-Pull PWM Controller; Package: SSOP; Pins: 16; Temperature Range: -40°C to 85°C

dsram pull down mismatch Datasheets Context Search

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2004 - bosch jtag

Abstract: C166SV2-Core dsram pull down mismatch OCDS bosch ac drive XC164CS-16FF XC164CS XC164CM-8FF XC164CM CC17IO
Text: configuration pins have an integrated pull up. No integrated pull down any more. The configuration is latched with the rising edge of RSTIN. Please read pages 3 to 4 carefully. 8 There was a line mismatch , pull up (PU) / down (PD) during reset EA PU, RD PU, ALE PD P9.5 PU, P9.4 PD P1H5 PU, P1H4 PU , of these settings. In order to avoid such settings do not pull down P1H4 or P1H5 during reset and , XC164CM-8F PSRAM DPRAM DSRAM 2 kBytes 2 kBytes 2 kBytes (no 4k option) ProgMem DMU


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PDF XC164CM-8FF XC164CS D-81541 bosch jtag C166SV2-Core dsram pull down mismatch OCDS bosch ac drive XC164CS-16FF XC164CS XC164CM CC17IO
2006 - Not Available

Abstract: No abstract text available
Text: (major changes since last revision) New derivatives with 128 Kbytes Flash and 4 Kbytes DSRAM added. EX4IN , Sources, Sample-Rate down to 50 ns 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via , On-Chip Dual-Port RAM (DPRAM) ­ 0/2/4 Kbytes1) On-Chip Data SRAM ( DSRAM ) ­ 2 Kbytes On-Chip Program/Data , ­ On-Chip Real Time Clock, Driven by the Main Oscillator Idle, Sleep, and Power Down Modes with , , SSC1, ASC0, ASC1, SSC0, SSC1 Summary of Features 128 Kbytes 2 Kbytes DPRAM, Flash 4 Kbytes DSRAM , 2


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PDF XC164LM 16-Bit C166SV2 XC164LM
2007 - C166

Abstract: C166SV2 SAF-XC164LM-8F20F SAF-XC164LM-8F40F XC164LM XC166
Text: Family Compatible) 16-Priority-Level Interrupt System with up to 63 Sources, Sample-Rate down to 50 ns , Dual-Port RAM (DPRAM) ­ 0/2/4 Kbytes1) On-Chip Data SRAM ( DSRAM ) ­ 2 Kbytes On-Chip Program/Data SRAM , Channels ­ On-Chip Real Time Clock, Driven by the Main Oscillator Idle, Sleep, and Power Down Modes with , Kbytes DSRAM , 2 Kbytes PSRAM ASC0, ASC1, SSC0, SSC1 SAF-XC164LM-8F40F SAF-XC164LM-8F20F -40 to 85 °C 64 Kbytes Flash 2 Kbytes DPRAM, 2 Kbytes DSRAM , 2 Kbytes PSRAM ASC0, ASC1


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PDF XC164LM 16-Bit C166SV2 PG-TQFP-64-8 XC164LM B158-H8889-G1-X-7600 C166 SAF-XC164LM-8F20F SAF-XC164LM-8F40F XC166
2006 - Not Available

Abstract: No abstract text available
Text: (major changes since last revision) New derivatives with 128 Kbytes Flash and 4 Kbytes DSRAM added. EX4IN , Sources, Sample-Rate down to 50 ns 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via , On-Chip Dual-Port RAM (DPRAM) ­ 0/2/4 Kbytes1) On-Chip Data SRAM ( DSRAM ) ­ 2 Kbytes On-Chip Program/Data , , Sleep, and Power Down Modes with Flexible Power Management Programmable Watchdog Timer and Oscillator , Features 128 Kbytes 2 Kbytes DPRAM, Flash 4 Kbytes DSRAM , 2 Kbytes PSRAM 64 Kbytes Flash 32 Kbytes Flash


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PDF XC164KM 16-Bit C166SV2 XC164KM
2013 - Not Available

Abstract: No abstract text available
Text: dual-port RAM (DPRAM) – Up to 16 Kbytes on-chip data SRAM ( DSRAM ) – Up to 16 Kbytes on-chip program , Device Types Flash Memory1) PSRAM Capt./Comp. ADC3) Interfaces3) 2) DSRAM Modules Chan , PSRAM and DSRAM . Note that the rules differ: • • PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address Data Sheet 10 V1.5, 2013-02 XE162FN, XE162HN , €™0000h-E0’1FFFh and 8 Kbytes of DSRAM will be at 00’C000h-00’DFFFh. E7'FFFFh (EF'FFFFh) 00


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PDF 16-Bit XE162FN, XE162HN 16-Bit XE166 EIA/JESD22A114-B J-STD-020C
2011 - XE162FN

Abstract: sample c code for spi in xe166 XE162 XE162xN xe166 example codes IIC XE162HN
Text: RAM (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM , Derivative Synopsis of XE162xN Device Types Flash Memory1) PSRAM Capt./Comp. ADC3) Interfaces3) 2) DSRAM , DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation , Kbytes of DSRAM will be at 00'C000h-00'DFFFh. E7'FFFFh (EF'FFFFh) Reserved for PSRAM 00'DFFFh Available DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) Figure 1 SRAM Allocation


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PDF 16-Bit XE162FN, XE162HN 16-Bit XE166 EIA/JESD22A114-B J-STD-020C XE162FN sample c code for spi in xe166 XE162 XE162xN xe166 example codes IIC XE162HN
2010 - Xe166

Abstract: XE162 PG-LQFP-64 C166 sample c code for spi in xe166 CC19IO ST 431 xe166 example codes IIC
Text: cover current available chip markings 64, 66 Added the correct test conditions for " Pull Level , dual-port RAM (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data , ) Interfaces3) 2) DSRAM Modules Chan. XE162FN-16F80L 128 Kbytes 8 Kbytes 8 Kbytes CC2 CCU60 7+2 , rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address Data Sheet 10 V1.3, 2010-04 XE162FN


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PDF 16-Bit XE162FN, XE162HN 16-Bit XE166 XE162 PG-LQFP-64 C166 sample c code for spi in xe166 CC19IO ST 431 xe166 example codes IIC
2006 - INFINEON XC164

Abstract: XC164-16 infineon xc164cs16f application notes SAK-XC164CS-16R40F XC164 SAK-XC164CS-16F40F SAK-XC164CS-16F20F C166SV2 XX012 SAK-XC164CS -16F40FAC
Text: -Priority-Level Interrupt System with up to 75 Sources, Sample-Rate down to 50 ns 8-Channel Interrupt-Driven Single-Cycle , ( DSRAM )1) ­ 2 Kbytes On-Chip Program/Data SRAM (PSRAM) ­ 64/128 Kbytes On-Chip Program Memory (Flash , Resolution (10-bit or 8-bit) and Conversion Time ( down to 2.55 µs or 2.15 µs) ­ Two 16-Channel General , Power Down Modes with Flexible Power Management 1) Depends on the respective derivative. The , Kbytes DSRAM , SSC0, SSC1, 2 Kbytes PSRAM CAN0, CAN1 SAK-XC164CS-16R40F, SAK-XC164CS-16R20F -40 °C


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PDF XC164CS-16F 16-Bit C166SV2 XC164-16 XC164 XC164, INFINEON XC164 XC164-16 infineon xc164cs16f application notes SAK-XC164CS-16R40F SAK-XC164CS-16F40F SAK-XC164CS-16F20F XX012 SAK-XC164CS -16F40FAC
2013 - Not Available

Abstract: No abstract text available
Text: 16 Kbytes on-chip data SRAM ( DSRAM ) – Up to 16 Kbytes on-chip program/data SRAM (PSRAM) – Up to , memory sizes. Figure 1 shows the allocation rules for PSRAM and DSRAM . Note that the rules differ: • • PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address For example 8 Kbytes of PSRAM will be allocated at E0’0000h-E0’1FFFh and 8 Kbytes of DSRAM , DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) 00'8000h


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PDF 16/32-Bit XC2734X 16/32-Bit 32-Bit XC2000
2011 - XC2336B

Abstract: marking code ag xc2336
Text: RAM (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM , offered with several SRAM memory sizes. Figure 1 shows the allocation rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the , DSRAM will be at 00'C000h-00'DFFFh. Data Sheet 12 V1.3, 2011-07 XC2336B XC2000 Family , DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) Figure 1 SRAM Allocation 00'8000h


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PDF 16/32-Bit XC2336B 16/32-Bit 32-Bit XC2000 XC2336B marking code ag xc2336
2010 - xc2734

Abstract: C166 CH10 XC2000
Text: cover current available chip markings 63, 65 Added the correct test conditions for " Pull Level , dual-port RAM (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data , rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address For example 8 Kbytes of PSRAM will be allocated at E0'0000h-E0'1FFFh and 8 Kbytes of DSRAM will be at 00'C000h-00'DFFFh. Data Sheet 10


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PDF 16/32-Bit XC2734X 16/32-Bit 32-Bit XC2000 xc2734 C166 CH10
2010 - XC2238N

Abstract: C166 XC2000 XC2234N XC2236N xc2000 instruction set
Text: for " Pull Level Currents" 79 "Startup time from stopover" typical value not applicable (removed , SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM (PSRAM) ­ Up to 320 Kbytes on-chip program , allocation rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address For example 8 Kbytes of PSRAM will be allocated at E0'0000h-E0'1FFFh and 8 Kbytes of DSRAM will be at 00'C000h-00'DFFFh. E7'FFFFh (EF'FFFFh


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PDF 16/32-Bit XC2232N, XC2234N, XC2236N, XC2238N 16/32-Bit 32-Bit XC2000 XC2238N C166 XC2234N XC2236N xc2000 instruction set
2002 - smd transistor 2fh

Abstract: No abstract text available
Text: Compatible) · 16-Priority-Level Interrupt System with up to 75 Sources, Sample-Rate down to 50 ns · 8 , Data SRAM ( DSRAM ) ­ 2 KBytes On-Chip Program/Data SRAM (PSRAM) ­ 128 KBytes On-Chip Program Memory , Resolution (10-bit or 8-bit) and Conversion Time ( down to 2.85 µs) ­ Two 16-Channel General Purpose Capture , Power Down Modes with Flexible Power Management · Programmable Watchdog Timer and Oscillator Watchdog , KBytes Flash On-Chip RAM Interfaces 2 KBytes DPRAM, ASC0, SSC0/1, 2 KBytes DSRAM , CAN0, CAN1 2 KBytes


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PDF XC164CS D-81541 P-TQFP-100-16 smd transistor 2fh
2011 - XC223xN

Abstract: xc2000 instruction set XC2236N
Text: RAM (SBRAM) ­ 2 Kbytes on-chip dual-port RAM (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up , offered with several SRAM memory sizes. Figure 1 shows the allocation rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the , DSRAM will be at 00'C000h-00'DFFFh. E7'FFFFh (EF'FFFFh) Reserved for PSRAM 00'DFFFh Available DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) Figure 1 SRAM Allocation 00'8000h


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PDF 16/32-Bit XC2232N, XC2234N, XC2236N, XC2238N 16/32-Bit 32-Bit XC2000 XC223xN xc2000 instruction set XC2236N
2013 - Not Available

Abstract: No abstract text available
Text: 16 Kbytes on-chip data SRAM ( DSRAM ) – Up to 16 Kbytes on-chip program/data SRAM (PSRAM) – Up to , DSRAM . Note that the rules differ: • • PSRAM allocation starts from the lower address DSRAM , -E0’1FFFh and 8 Kbytes of DSRAM will be at 00’C000h-00’DFFFh. Data Sheet 11 V1.4, 2013-02 , PSRAM Available DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) 00'8000h , GPT12E Timer T3 External Up/ Down Control Input TMS_A I In/A JTAG Test Mode Selection Input


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PDF 16/32-Bit XC2336B 16/32-Bit 32-Bit XC2000
BT601

Abstract: BT656 ITU656 S5D4100X V601 80-TQFP-1212 ci573
Text: and Pull Up/ Down Pad descriptions Revision Point: PCKO output drive Current change (20mA 4mA , /O Number Name TQFP Output drive current Pull up down FBGA Description TMS , S5D4100X Terminal I/O Number Name TQFP Output drive current Pull up down FBGA , Name TQFP Output drive current Pull up down FBGA Description VSSC 61 D13 G , .47 5.14 Power Down Control


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PDF S5D4100X 88-FBGA-0707 80-TQFP-1212 BT601 BT656 ITU656 S5D4100X V601 80-TQFP-1212 ci573
2011 - xc2734

Abstract: xc2734x
Text: RAM (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM , . Figure 1 shows the allocation rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address For example 8 Kbytes of PSRAM will be allocated at E0'0000h-E0'1FFFh and 8 Kbytes of DSRAM will be at 00'C000h-00'DFFFh. Data , (EF'FFFFh) Reserved for PSRAM 00'DFFFh Available DSRAM Available PSRAM Reserved for DSRAM E0


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PDF 16/32-Bit XC2734X 16/32-Bit 32-Bit XC2000 xc2734 xc2734x
2013 - Not Available

Abstract: No abstract text available
Text: on-chip dual-port RAM (DPRAM) – Up to 16 Kbytes on-chip data SRAM ( DSRAM ) – Up to 16 Kbytes on-chip , memory sizes. Figure 1 shows the allocation rules for PSRAM and DSRAM . Note that the rules differ: • • PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address For example 8 Kbytes of PSRAM will be allocated at E0’0000h-E0’1FFFh and 8 Kbytes of DSRAM , DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) 00'8000h


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PDF 16/32-Bit XC2232N, XC2234N, XC2236N, XC2238N 16/32-Bit 32-Bit XC2000
2006 - SAK-XC164CM-16F40F BA

Abstract: XC164CM
Text: with 128 Kbytes Flash and 4 Kbytes DSRAM added. EX4IN and EX5IN alternate pin mapping corrected , Compatible) 16-Priority-Level Interrupt System with up to 63 Sources, Sample-Rate down to 50 ns 8 , ) On-Chip Data SRAM ( DSRAM ) ­ 2 Kbytes On-Chip Program/Data SRAM (PSRAM) ­ 32/64/1281) Kbytes On-Chip , Resolution (10-bit or 8-bit) and Conversion Time ( down to 2.55 µs or 2.15 µs) ­ 16-Channel General Purpose , Preliminary · · · · · · Summary of Features Idle, Sleep, and Power Down Modes with Flexible Power


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PDF XC164CM 16-Bit C166SV2 XC164CM SAK-XC164CM-16F40F BA
2003 - SAF-XC164CS-16F40F

Abstract: 16R20 SAK-XC164CS-16F40F SAK-XC164CS-16F20F SAF-XC164CS-16R40F SAF-XC164CS-16F20F C166 smd diode 100-16 RN INFINEON XC164 BJE contact
Text: -Priority-Level Interrupt System with up to 75 Sources, Sample-Rate down to 50 ns · 8-Channel Interrupt-Driven Single-Cycle , ( DSRAM ) ­ 2 Kbytes On-Chip Program/Data SRAM (PSRAM) ­ 128 Kbytes On-Chip Program Memory (Flash Memory , (10-bit or 8-bit) and Conversion Time ( down to 2.55 µs or 2.15 µs) ­ Two 16-Channel General Purpose , Power Down Modes with Flexible Power Management · Programmable Watchdog Timer and Oscillator Watchdog , Kbytes DPRAM, 2 Kbytes DSRAM , 2 Kbytes PSRAM ASC0, ASC1, SSC0, SSC1, CAN0, CAN1 SAK-XC164CS


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PDF D-81541 A23-A0, D15-D0 XC164 P-TQFP-100-16 SAF-XC164CS-16F40F 16R20 SAK-XC164CS-16F40F SAK-XC164CS-16F20F SAF-XC164CS-16R40F SAF-XC164CS-16F20F C166 smd diode 100-16 RN INFINEON XC164 BJE contact
2009 - 332h

Abstract: Power Supply Control IC dap 07 C166 CH10 XC2000 ST 431
Text: (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM (PSRAM , Device Types Flash Memory2) PSRAM Capt./Comp. 3) DSRAM Modules4) XC2734X-40FxL 320 Kbytes 16 , rules for PSRAM and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM allocation starts from the higher address For example 8 Kbytes of PSRAM will be allocated at E0'0000h-E0'1FFFh and 8 Kbytes of DSRAM will be at 00'C000h-00'DFFFh. Data Sheet 10


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PDF 16/32-Bit XC2734X 16/32-Bit 32-Bit XC2000 332h Power Supply Control IC dap 07 C166 CH10 ST 431
2009 - xc2336b

Abstract: 332h XC2000 C166 dap0 csp vector c microcontroller 64pin sharp
Text: (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM (PSRAM , and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM , '0000h-E0'1FFFh and 8 Kbytes of DSRAM will be at 00'C000h-00'DFFFh. Data Sheet 11 V1.1, 2009-07 XC2336B , Available DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) 00'8000h , Channel 4 for ADC0 T3EUDA I In/A GPT12E Timer T3 External Up/ Down Control Input TMS_A I


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PDF 16/32-Bit XC2336B 16/32-Bit 32-Bit XC2000 xc2336b 332h C166 dap0 csp vector c microcontroller 64pin sharp
2010 - XC2336B

Abstract: C166 XC2000 hall 80L
Text: available chip markings 64, 66 Added the correct test conditions for " Pull Level Currents" 76 , (DPRAM) ­ Up to 16 Kbytes on-chip data SRAM ( DSRAM ) ­ Up to 16 Kbytes on-chip program/data SRAM (PSRAM , and DSRAM . Note that the rules differ: · · PSRAM allocation starts from the lower address DSRAM , '0000h-E0'1FFFh and 8 Kbytes of DSRAM will be at 00'C000h-00'DFFFh. Data Sheet 11 V1.2, 2010-04 XC2336B , Available DSRAM Available PSRAM Reserved for DSRAM E0'0000h (E8'0000h) 00'8000h


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PDF 16/32-Bit XC2336B 16/32-Bit 32-Bit XC2000 XC2336B C166 hall 80L
2007 - C166

Abstract: C166SV2 SAF-XC164KM-8F20F SAF-XC164KM-8F40F XC164KM XC166 SAF-XC164
Text: Sources, Sample-Rate down to 50 ns 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via , Kbytes On-Chip Dual-Port RAM (DPRAM) ­ 0/2/4 Kbytes1) On-Chip Data SRAM ( DSRAM ) ­ 2 Kbytes On-Chip , Oscillator Idle, Sleep, and Power Down Modes with Flexible Power Management Programmable Watchdog Timer and , 128 Kbytes 2 Kbytes DPRAM, Flash 4 Kbytes DSRAM , 2 Kbytes PSRAM ASC0, ASC1, SSC0, SSC1, CAN0 , Kbytes DSRAM , 2 Kbytes PSRAM ASC0, ASC1, SSC0, SSC1, CAN0, CAN1 SAF-XC164KM-4F40F SAF-XC164KM


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PDF XC164KM 16-Bit C166SV2 PG-TQFP-64-8 XC164KM B158-H8888-G1-X-7600 C166 SAF-XC164KM-8F20F SAF-XC164KM-8F40F XC166 SAF-XC164
2007 - C166

Abstract: C166S PG-LQFP-100 SAK-XC2766X-96F66L XC2000 XC2766X XC2700X motorcycle control
Text: 16KByte on-chip data SRAM ( DSRAM ) ­ 32KByte on-chip program/data SRAM (PSRAM) Fast context switching , , sample-rate down to one clock cycle www. i n f i n e o n .co m / m i cro co n t rolle rs , +125°C Product Brief Block Diagram Voltage, Reset, Power Down , Wakeup Control, 1KB SBRAM , /D-Flash 256 KB XTAL DSRAM 16KB WDT DMU PSRAM 32 KB PMU SCU: Interrupt & PEC


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PDF XC27x6X 32/16bit XC27x6X XC2700X XC2000 XC2700 B158-H9081-X-X-7600 C166 C166S PG-LQFP-100 SAK-XC2766X-96F66L XC2766X motorcycle control
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