DSAAQ0027136.pdf
by Cypress Semiconductor

Partial File Text CY7C25402KV18, CY7C25552KV18 CY7C25422KV18, CY7C25442KV18 72-Mbit QDR® II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) with ODT Features Configurations With Read Cycle Latency of
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3M Touch Systems