The recommended power-up sequence is to apply VCC first, followed by AVCC, and then DVCC. This ensures that the internal voltage regulators are powered up correctly.
To optimize the PCB layout, keep the analog and digital grounds separate, use a solid ground plane, and place the analog and digital components on opposite sides of the board. Also, keep the clock and data lines as short as possible and away from noise sources.
The PCM1789PWR supports clock frequencies up to 256 fs (12.288 MHz) for 24-bit audio data.
To configure the PCM1789PWR for Master Clock Mode, set the MCLK pin to the desired clock frequency, and set the BCK pin to the desired bit clock frequency. Then, set the WS pin to the desired word select frequency, and configure the serial data format using the DIF and DFS pins.
The recommended decoupling capacitor value is 0.1 μF to 1 μF, placed as close as possible to the power pins (VCC, AVCC, and DVCC) to filter out noise and ensure stable operation.
PCM1789PWR datasheet
by Texas Instruments
