The maximum clock frequency is 12 MHz, but it can be overclocked up to 18 MHz with some limitations.
The oscillator settings can be configured using the OSCCFG register. The register settings depend on the crystal frequency and the desired clock frequency.
The watchdog timer is used to reset the microcontroller in case of a software or hardware failure. It can be enabled or disabled using the WDTE bit in the WDTMOD register.
The UART interface can be used for serial communication. The UART registers (SCON, SBUF, and SADDR) need to be configured properly to enable the UART interface.
The maximum current that can be sourced or sunk by the I/O pins is 20 mA. However, the total current sourced or sunk by all I/O pins should not exceed 100 mA.
P89LPC938FA,129 datasheet
by NXP Semiconductors
