A 2-layer or 4-layer PCB with a solid ground plane and thermal vias under the IC is recommended. Ensure a low-impedance path for the output current and minimize the distance between the IC and the output capacitors.
Use a combination of output capacitors with different ESR values to minimize ringing. A 10uF ceramic capacitor in parallel with a 1uF ceramic capacitor and a 10uF electrolytic capacitor is a good starting point. Adjust the values based on the specific application and load requirements.
A 10uF to 22uF ceramic capacitor with an X5R or X7R dielectric is recommended. The capacitor should be placed as close as possible to the VIN pin and have a low ESR to minimize input voltage ripple.
Ensure good thermal conduction between the IC and the PCB. Use a thermal pad or a heat sink if necessary. The thermal shutdown threshold is typically around 150°C. Monitor the junction temperature (TJ) to ensure it stays below the maximum rating of 150°C.
A low-ESR ceramic capacitor (e.g., X5R or X7R dielectric) with a value between 10uF to 47uF is recommended. The capacitor should be placed as close as possible to the VOUT pin to minimize output voltage ripple.
LM5122ZPWPT datasheet
by Texas Instruments
