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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
SN65LVDS047DRG4 Texas Instruments Quad LVDS Transmitter with Flow-Through Pinout 16-SOIC -40 to 85
SN65LVDS048ADG4 Texas Instruments Quad LVDS Receiver with Flow-Through Pinout 16-SOIC -40 to 85
SN65LVDS047PWRG4 Texas Instruments Quad LVDS Driver with Flow-Through Pinout 16-TSSOP -40 to 85
SN65LVDS048APWG4 Texas Instruments Quad LVDS Receiver with Flow-Through Pinout 16-TSSOP -40 to 85
SN65LVDS047DR Texas Instruments Quad LVDS Driver with Flow-Through Pinout 16-SOIC -40 to 85
SN65LVDS048AD Texas Instruments Quad LVDS Receiver with Flow-Through Pinout 16-SOIC -40 to 85

da-15 pinout Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2012 - 50-pin lcd connector pinout

Abstract: No abstract text available
Text: ) . 23 2 Table ‎ 15 EMI 0 Connector Pin-out (J27 , 19/12/2012 Notes Initial DSI connector pin-out fixed LVDS connector changed USB OTG connector Reference Designator changed MIPI CSI-2 connector pin-out changed Top view picture changed T C , . 9 1.5 Board Layout , ) . 15 2.3.5 USIM Card (J11


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mmi "tiw PROM" programming

Abstract: MMI PLE5P8 63S481 22AA 63S081 PLE9P4 PLE10P4 PLE11P8 PLE9R8 63s281
Text: ) NUMBER TERMS REGISTERS MAX* PLE5P8 5 8 32 25 PLE5P8A 5 8 32 15 PLE8P4 8 4 256 30 PLE8P8 8 8 256 , 4 2048 35 PLE11P8 11 8 2048 35 PLE12P4 12 4 4096 35 PLE12P8 12 8 4096 35 PLE9R8 9 8 512 8 15 PLE10R8 10 8 1024 8 15 PLE11RA8 11 8 2048 8 15 PLE11RS8 11 8 2048 8 15 Clock to output time for , .12 V . - 1.5 V to 7 V.7 V . -0.5 V to 5.5 V.12 V -65° to , Vcc = MIN l| = -18 mA - 1.5 V 'IL Low-level input current Vcc = MAX V| = 0.4 V -0.25 mA l|H


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PDF 512P8 F18P08 63S481 FECP65 51A-074 SA31-2 63RA481 PLE11P4 F18P06 51A-064 mmi "tiw PROM" programming MMI PLE5P8 63S481 22AA 63S081 PLE9P4 PLE10P4 PLE11P8 PLE9R8 63s281
MMi 63S141

Abstract: No abstract text available
Text: REGISTERS tpD (ns) MAX* INPUTS OUTPUTS PLE5P8 5 8 32 PLE5P8A 5 8 32 15 , 35 PLE9R8 9 8 512 8 15 PLE10R8 10 8 1024 8 15 PLE11RA8 11 8 2048 8 15 PLE11RS8 11 8 2048 8 15 'C lock to output tim e for , pins. The unprogrammed state of IS words are Low, presenting a CLEAR with 15 pin Low. With all 15 column words (A3-AO) programmed to the same pattern, the 15 function will be independent of both row


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PDF PLE12P8) 63RA481 PLE11P4 22AAdapter 51A-064 63S841 PLE10R8 51A-074 63RS881 MMi 63S141
tsop Shipping Trays

Abstract: No abstract text available
Text: /EIAJ standard dimensions and 32-pin pinout Standard and reverse pinout options Maximum package , Standard Pinout Al6 Al5 tz Ai 2 tz A7 1= A6 cz A5 A4 11 12 32 31 30 29 28 27 26 25 24 23 22 21 13 14 15 16 Di Do 20 ID Ao 19 ZI Ai 18 ZI A2 17 ZI A3 ZI Zl ZI ZI ZI ZI ZI : ZI ZI ZI OE CE , Reverse Pinout Da C Vss C D2 C D i C= Do CZ Ao CZ A, C Ä2 d Aa CI 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Z] ZI ZI Ai 1 Ag As ^ ZI ZU ZI


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amd k10

Abstract: AMD K10 Processor
Text: CD010342 Figure 2. Am7971A Pinout for Leadless Chip Carrier (LCC) nnnn i-in n n n nn n n n nn n 61 D *D , C 60 4« 48 47 4« 46 44 43 42 41 40 30 36 37 36 35 3 * 15 O ^ i O O Ì Q O < fi O , Figure 3. Am7971A Pinout for Plastic Leaded Chip Carrier (PLCC) 183 A B c 0 E F , ) Pinout for a Pin Grid Array (PGA) Package PIN D E S IG N A T IO N S (S O R T E D B Y PIN NAM E) PIN , a« A7 Ae Ag A 10 A 11 A 12 A13 Au A 15 ad ad ad 16 17 18 a d 19 AD m ADai AD 22 AD23


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PDF Am7971A 16Mbytes 68-Lead CGX068) 68-Pin CA2068) AM7971A-3 AM7971A-5 amd k10 AMD K10 Processor
2002 - P802

Abstract: XIP2092 XIP2093 XIP2094 XIP2095 XIP2096 XIP2097 10GBASE-SR DS201
Text: .1 Interface Description Client Interface Signals Figure 3 shows the pinout for a MAC core with the optional , TX_STATISTICS_VECTOR[21:0] TX_STATISTICS_VALID PAUSE_REQ PAUSE_VAL[ 15 :0] RX_CLK Domain RX_CLK RX_DATA[63:0 , HOST_MIIM_RDY RESET XIP2094 Figure 3: Core Pinout with XGMII Interface DS201 (v2.1) June 24, 2002 , or XAUI v2.1 Figure 4 shows the pinout of a MAC core with the optional XAUI interface. TX_CLK , XAUI_TX_L1 XAUI_RX_L1 PAUSE_REQ PAUSE_VAL[ 15 :0] XAUI_TX_L2 XAUI_RX_L2 RX_CLK


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PDF 10-Gigabit DS201 25MHz 64-bit P802 XIP2092 XIP2093 XIP2094 XIP2095 XIP2096 XIP2097 10GBASE-SR DS201
EPROM M2764

Abstract: M2128-15 M2816 eprom 8k 24pin M27S4 2kx8 EPROM 2426c M2128 M2764 sram 2k x 8
Text: inteT ¿WMK3H DMIFO^MOTCDM M2128 2048 x 8-BIT STATIC RAM MILITARY M2128- 15 M2128-20 Max , Compatible Pinout Two Line Control, CE Controls Power-Down, OE Controls Output Buffers-Eliminates Bus , consumption when the device is disabled. The 24-pin industry standard pinout allows easy upgrades to higher , c 7(5) (20)22 L 8(6) (19)21 C »(7) (18)20 L 10(8) (17)19 c 11(8) (16)16 L 12(10) < 15 )17 C 13(11) (14)16 c 14(12) (13) 15 M2128 M2816 M27S4 SRAM E'PROM EPROM 2K x 8 2K x 8 *Kx8 Vcc POM


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PDF M2128 M2128-15 M2128-20 24-Pin M2128 384-bit M2764 M2816 EPROM M2764 eprom 8k 24pin M27S4 2kx8 EPROM 2426c sram 2k x 8
1994 - 6216 sram

Abstract: 6216 ram XC6200 da-15 pinout IC 4013E 6216 static ram pin diagram of IC 4013 n w56 transistor ic w53 S41 sensor
Text: Pinout - J1 Pin# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 , 58 60 62 64 25 R Mezzanine Pinout - J2 Pin# 1 3 5 7 9 11 13 15 17 19 21 , Mezzanine Pinout - J3 Pin# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 , ) XC6200 Development System Mezzanine Pinout - J5 Pin # 1 3 5 7 9 11 13 15 17 19 21 23 25 , . 15 REFERENCES


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PDF XC6200 6216 sram 6216 ram da-15 pinout IC 4013E 6216 static ram pin diagram of IC 4013 n w56 transistor ic w53 S41 sensor
nsa 1588A

Abstract: 1588A NSA 1198 HA 1166 NSA 598 1541A ca c2 5120A
Text: . PINOUT Table NSA XXXX PIN NSA NSA NSA NSA NSA NSA NSA NSA NSA NSA NSA NO. 0038 598 1166 1188 1198 1541A , Da Da c8 14 — c7 C7 c6 C7 Ba Ba Aa c9 C9 Ga 15 — Ba Ba Ba Ba NC C7 c3 Ga Ga c9 16 — c8 c8 c7


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2013 - U91/U92

Abstract: chemi-con PET sleeve with end disk E92F501VSN331MR65T E91F351VND122MAA0T E92F351VND222MBA0T
Text: U92F, 10,000 hours for U92L or 15 ,000 hours for U92X at ‫؇58؀‬C. The rated lifetime for all , , Longest Life, Pin Options ⅙ ‫؇52؁‬C ~‫؇58؀‬C 350~500 150~3,300 15 ,000 â , Board Pin-out * Brown Insulating Sleeve Negative Mark PC Board Pin-out A* U91F SNAP , * Vent Negative Mark PC Board Pin-out 3.3‫1.0ע‬ 4.75‫1.0ע‬ 10 2-2x See Pin , Sleeve Negative Mark A B* C PC Board Pin-out 360° 6 D‫1ם‬ * Vent 25 2.5


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PDF SM813 U91/U92 chemi-con PET sleeve with end disk E92F501VSN331MR65T E91F351VND122MAA0T E92F351VND222MBA0T
2001 - GD16585

Abstract: GD16589 STM-64 GD16585-EF B1112
Text: ) application is available. The part number is GD16589. The functionality and the pin-out are identically to , outline, please refer to Figure 14 and 15 . In ceramic packages following pin pairs are individually , /K3, J4/K4, J5/K5, J8/K8, J9/K9, and J10/K10, please refer to "Package Pinout " Figure 8 on page 8 , 16 +3.3V VCC DI0. 15 DIN0. 15 16 VCO OUT OUTN CKI CKIN 0V 10Gbit/s , . Package Pinout 1 2 LX 3 L SE E IG (PH T PC B T VC VE C K TC D VD


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PDF GD16585/GD16589 GD16585 GD16589 STM-64 OC-192 GD16585-EF B1112
2006 - F100K

Abstract: SY100S314 SY100S314FC SY100S314FCTR SY100S314JC
Text: s VBB output for single-ended use s More than twice as fast as Fairchild s Function and pinout , Part Number 12 13 4 3 14 15 2 1 Top View PLCC J28-1 16 17 28 27 18 , 15 14 Oa Ob 13 7 8 9 10 11 12 Ob 6 Oc Oc Oe Od 4 5 VCCA De Oe


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PDF SY100S314 900ps F100K 24-pin 28-pin SY100S314 M9999-032206 F100K SY100S314FC SY100S314FCTR SY100S314JC
1998 - I960SX

Abstract: No abstract text available
Text: Frequency 33MHz 40MHz 2.0 Pin Description and Pinout Table 2 below lists the pin types found on the , . Figure 1 shows the pinout for the 160-pin EIAJ PQFP package and Figure 2 shows the mechanical dimensions , Signal LAD[31:0] LAD[ 15 :0]b LA[31:16]b LA[5:2] ALE BE[3:0] BE[1:0]b W/R ADS ASb RDYRCV READYb HOLD HOLDA , 13 14 15 Signal VCC INTD PRST PCLK GNT REQ AD31 AD30 AD29 AD28 GND AD27 AD26 AD25 AD24 PIN # 41 42 43 , Data Sheet Rev 1.1 7 V350EPC Figure 1: Pinout for 160-pin EIAJ PQFP (top view) 8 V350EPC


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PDF V350EPC i960Jx 401Gx 640-byte 64-byte 8/16-bit 32-bit 16-bit I960SX
STKK

Abstract: V961PBC V960PBC V350EPC-40 V350EPC-33 V350EPC AD14 AD12 tvp ul 137 V96BMC
Text: 160-pin EIAJ PQFP 40MHz 2.0 Pin Description and Pinout Table 2 below lists the pin types found on , number. Figure 1 shows the pinout for the 160-pin EIAJ PQFP package and Figure 2 shows the mechanical , (cont'd) Local Bus Interface Signal Type R Description LAD [31:0] LAD[ 15 :0]b I/04 Z Local , AD27 52 AD7 92 NC 132 LA(Da)30 13 AD26 53 AD6 93 LAD 13 133 LA(Da)31 14 AD25 54 AD5 94 NC 134 ALE 15 , 15 137 HOLD 18 AD23 58 AD1 98 NC 138 HOLDA 19 AD22 59 ADO 99 LA(Da)16 139 ra 20 Vcc 60 Vcc 100 Vcc


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PDF V350EPC 960Jx/Sx 640-byte 64-byte 32-bit 16-bit 960Jx 960Sx STKK V961PBC V960PBC V350EPC-40 V350EPC-33 AD14 AD12 tvp ul 137 V96BMC
LHMN5

Abstract: sharp mask rom 44-pin LH5332600N 2MX16 LH5332600 LH5332600T LH5332C00D LH535
Text: rise / fall time I 10 ns • Input reference level I 1.5 V • Output reference level I 1.5 V â , MasK-HrogrammaDie hum ■Sharp's Product Line-up (32M-bit Mask ROM) Configuration ( wards X bit) * Pinout Model , 48TSOP (I) forward bend/ 48TSOP (I) reverse bend * M ". Mask ROM specific pinout SHARP aiâO?^Ã


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PDF LH5332600 32M-bit LH5332600N/T LHMN56XX/LHMN5FXX) 304X8 194304X8 100mA LH5332600N 44-pin LHMN5 sharp mask rom 44-pin 2MX16 LH5332600 LH5332600T LH5332C00D LH535
54F373

Abstract: 54F374 54F573 54F574
Text: ,54F574 FEATURES • 54F573 is broadside pinout version of 54F373 • 54F574 is broadside pinout , the 54F373 but has broadside pinout configuration to facilitate PC board layout and allow easy , functionally identical to the 54F374 but has a broadside pinout configuration to facilitate PC board layout and , « — e 54F573 1 —« oe do 0-1 °2 o3 q4 q5 °s °7 1 1 19 16 Il II II 17 16 15 14 , da °4 d5 d6 M>- n I I I i I i 1 19 18 17 16 15 14 13 rT °0 q-| q2 <>3 °4 06 Oy 711DÔ2b


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PDF 54F573 54F574 54F373 54F574 54F374 54F373 500ns 54F374
2000 - F100K

Abstract: SY100S314 SY100S314FC SY100S314JC SY100S314JCTR
Text: single-ended use s More than twice as fast as Fairchild s Function and pinout compatible with Fairchild F100K , 20 19 18 Da Dd 2 3 17 16 Da Oa 15 14 Oa Ob 13 7 8 9 10 11 12 Ob , View PLCC J28-1 Dd De Db 12 13 14 15 16 17 18 Dd Db Db Db VEE VEES VBB


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PDF SY100S314 900ps F100K 24-pin 28-pin SY100S314 SY100S314FC F24-1 SY100S314JC J28-1 F100K SY100S314FC SY100S314JC SY100S314JCTR
2000 - F100K

Abstract: SY100S314 SY100S314FC SY100S314JC SY100S314JCTR
Text: output for single-ended use s More than twice as fast as Fairchild s Function and pinout compatible , Od Od 17 16 Da Oa 15 14 Oa Ob 13 7 8 9 10 11 12 Ob 4 5 Oe 6 Od , 2 1 28 27 26 Top View PLCC J28-1 Dd De Db 12 13 14 15 16 17 18 Dd Db


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PDF SY100S314 900ps F100K 24-pin 28-pin SY100S314 i0S314FC F24-1 SY100S314JC J28-1 F100K SY100S314FC SY100S314JC SY100S314JCTR
Not Available

Abstract: No abstract text available
Text: intéT M2128 2048 x 8-BIT STATIC RAM M ILITA RY M2128- 15 150 150 50 Max. Access Time , Pinout M2128-20 200 150 50 ■Two Line Control, CE Controls PowerDown, OE Controls Output , power-down feature cuts power consumption when the device is disabled. The 24-pin industry standard pinout , . Ds d2 d2 C 13(11) ( 15 )17 □ (14)18 J D, GND G ND C d4 14(12) (13) 15 J A4 A5 D4 A« DS D# Dr Aio OE WE CE T ï Y Figure 1. Logic


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PDF M2128 M2128-15 M2128-20 24-Pin M2128 384-bit
2310 fx

Abstract: sla 1003 AS2295 MSC1161
Text: vss 885 -2625 11 SDo 1075 -2625 12 SDi 1480 -2625 13 SD2 1660 -2625 14 SD3 2060 -2625 15 T2 2295 , œ" ~22] nc xt I 20 "2ÎI nc Note: This pinout applies to the MSM6243-XXRS. 62 This Material , ] H 24 1»] nc nc nc nc nc Note 1. This pinout applies to the MSM6243-XXGS and -XXGS-K. Note 2 , ] nc ~33~| nc 32 i nc "31"] nc MMlMIIÌMMM^MIMJMir Note 1. This pinout applies to the MSM6243-XXGS , "3 in the case of oscillation Idd3 Standby and class B output selection. _ 15 100 DA Output Precision


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PDF MSM6243_ MSM6243 2310 fx sla 1003 AS2295 MSC1161
2000 - F100K

Abstract: SY100S314 SY100S314FC SY100S314JC SY100S314JCTR
Text: single-ended use s More than twice as fast as Fairchild s Function and pinout compatible with Fairchild F100K , have pulldown resistors. Oa Ob Ob Oc Oc Od Ob Ob Od Od Od 17 16 Da Oa 15 , PLCC J28-1 Dd De Db 12 13 14 15 16 17 18 Dd Db Db Db VEE VEES VBB VCC


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PDF SY100S314 900ps F100K 24-pin 28-pin SY100S314 i0S314FC F24-1 SY100S314JC J28-1 F100K SY100S314FC SY100S314JC SY100S314JCTR
Not Available

Abstract: No abstract text available
Text: FEATURES • 54F573 is broadside pinout version of 54F373 • 54F574 is broadside pinout version of , has broadside pinout configuration to facilitate PC board layout and allow easy interface with , the 54F374 but has a broadside pinout configuration to facilitate PC board layout and allow easy , 16 15 14 13 12 Philips Semiconductors Military FAST Products Product specification , IIIIIII 19 19 17 16 15 14 13 12 LLCC LEAD CONFIGURATION D 1 d2 °3 D{| OE Vcc Oo


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PDF 54F573 54F373 54F574 54F374 54F573, 54F574 54F373
2003 - 10GBASE-LR

Abstract: 8B10B XIP2092 XIP2116 10Gigabit Ethernet PHY MDIO clause 45 specification 10GBASE-X DS201
Text: TX_STATISTICS_VECTOR[21:0] TX_STATISTICS_VALID PAUSE_REQ PAUSE_VAL[ 15 :0] RX_CLK Domain RX_CLK RX_DATA[63:0 , HOST_MIIM_RDY RESET xip2094 Figure 3: Core Pinout with XGMII Interface and Optional Management Interface , ] XGMII_TX_CLK TX_STATISTICS_VECTOR[21:0] TX_STATISTICS_VALID PAUSE_REQ PAUSE_VAL[ 15 :0] RX_CLK Domain , Figure 4: Core Pinout with XGMII Interface without Optional Management Interface DS201 (v3.0) April 30 , > TX_STATISTICS_VECTOR[21:0] TX_STATISTICS_VALID XAUI_TX_L1 XAUI_RX_L1 PAUSE_REQ PAUSE_VAL[ 15 :0


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PDF 10-Gigabit DS201 10-gigabits-per-second 3ae-2002 10GBASE-LR 8B10B XIP2092 XIP2116 10Gigabit Ethernet PHY MDIO clause 45 specification 10GBASE-X DS201
LS373

Abstract: 74LS573 74LS573 LATCH til 431 74LS573 "LATCH" 15J04 74LS573DC 74LS573FC 74LS573PC LS-373
Text: . definitions 573 CONNECTION DIAGRAM PINOUT A ÖE [7 2SI Vcc Do [2 Io» D,U 18lo1 D2 [T 13 02 Da [7 , INI 16 15 14 13 I 12 Vcc = Pin 20 PIN NAMES DESCRIPTION 54/74LS (U.L.) HIGH/LOW Do —D7 LE , ) 3-State Latch Outputs 0.5/0.25 0.5/0.25 0.5/0.25 65/ 15 (25)/(7.5) 4-431 This Material Copyrighted


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PDF 54LS/74LS573 LS373, LS373 LS373 DI125Â 54LS573DM 54LS573FM 18lo1 15J04 54/74LS 74LS573 74LS573 LATCH til 431 74LS573 "LATCH" 15J04 74LS573DC 74LS573FC 74LS573PC LS-373
2006 - eSC015

Abstract: eSP080A ESP080 eSP020A DIP-28L ESP040 eSP040A eSP020 SKINNY28L cupe
Text: . 2 4 Package Pin-out (DIP28L, SKINNY28L, SOP28L , ~eSB040 & eSC015~eSC040 bodies do not support P4.0 ~P4.3 4 Package Pin-out (DIP28L, SKINNY28L, SOP28L , .3 11 18 P1.1 P2.2 12 17 P1.2 P2.1 13 16 P1.3 15 VDD P2.0 14 Figure 4-1 eSPA Series 28-Pin DIP Pin-out 2· Product Specification (V1.3) 09.17.2008 (This , of Port 2 14 P2.0 I/O Bit 0 of Port 2 15 VDD0 I VDD for Digital 16 P1


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