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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTC4090EDJC-5#TRPBF Linear Technology LTC4090/LTC4090-5 - USB Power Manager with 2A High Voltage Bat-Track Buck Regulator; Package: DFN; Pins: 22; Temperature Range: -40°C to 85°C
LTC4090EDJC#PBF Linear Technology LTC4090/LTC4090-5 - USB Power Manager with 2A High Voltage Bat-Track Buck Regulator; Package: DFN; Pins: 22; Temperature Range: -40°C to 85°C
LTC4090EDJC-5#PBF Linear Technology LTC4090/LTC4090-5 - USB Power Manager with 2A High Voltage Bat-Track Buck Regulator; Package: DFN; Pins: 22; Temperature Range: -40°C to 85°C
LTC4090EDJC#TRPBF Linear Technology LTC4090/LTC4090-5 - USB Power Manager with 2A High Voltage Bat-Track Buck Regulator; Package: DFN; Pins: 22; Temperature Range: -40°C to 85°C
TESTPN-SJA Texas Instruments Obsolete OPN-TEST
TMS320TEST1000 Texas Instruments TMS320TEST Test Generic

bat CR Li Mn lab test result Datasheets Context Search

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mn1400

Abstract: 7ROM panasonic tv diagram tc-20 PANASONIC FL series MN14823 tl 4823 m932 bt35f MN1480 ztt 8.0 mt
Text: MSB -TACU -sDoajíj (!) fll'^i'-t'V l-^i TACL.ACC «fâS- DAC «TÜ 4 t* -y Hc 77Í bÍt , PANASONIC INDL/ELEK -CIO 75 DËÏ k^EflSE □□0S741 4 MN1400 Family—3 MN14823/14826( MN 1480 Series) ?-rC7DD>^ZL-5^(4- BÌt ) _ . 6932852 PANASONIC INDL»ELECTRONIC „ 72C 057^1 MN14823 , —«-C07 BI3 —* 10 MN 14823 31 —~C06 SNS0 —- 11 30 —«-C05 RMIN(SNSl) 12 29 — C04 EOO 13 , €” HALT AI3 —• 6 23 — C09 SNS0 —I- 7 .22 — C08 RMIN(SNSl) —» 8 MN 14826 21 —C07 SDO


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PDF 0S741 MN1400 MN14823/14826 MN14823/MN14826 MN1480 MN14823, MN14826 40-SDIP 7ROM panasonic tv diagram tc-20 PANASONIC FL series MN14823 tl 4823 m932 bt35f ztt 8.0 mt
2006 - bq24081

Abstract: bq24081EVM HPA182 PTC36SAAN
Text: expensive test equipment. 2.3.1 Equipment 1. Power source: current limited 5-V lab supply with its , . Test Summary , Charge Management IC Evaluation Module 1 www.ti.com Test Summary 1.2 Background The , current (1) Power dissipation 2 MIN Supply voltage range IO(CHG) TEST CONDITIONS W I(CHG) x (V(DC+) - V( BAT +) This input voltage maximum is a function of the maximum allowable power


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PDF SLUU261 bq24081EVM bq24081 HPA182 PTC36SAAN
2006 - FLUKE 75

Abstract: HPA182 bq24081 bq24081EVM PTC36SAAN SLUU261
Text: expensive test equipment. 2.3.1 Equipment 1. Power source: current limited 5-V lab supply with its , . Test Summary , Charge Management IC Evaluation Module 1 www.ti.com Test Summary 1.2 Background The , current (1) Power dissipation 2 MIN Supply voltage range IO(CHG) TEST CONDITIONS W I(CHG) x (V(DC+) - V( BAT +) This input voltage maximum is a function of the maximum allowable power


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PDF SLUU261 bq24081EVM bq24081 FLUKE 75 HPA182 PTC36SAAN SLUU261
C945 p 331

Abstract: Q63100 ic pid-20 siemens PTC C860 s18k275 siemens ntc k45 siemens c890 K164 S863 S14k420
Text: . acoustic indication Battery test incl. "low bat " indication on display Input resistance Input voltage , Product Group Index Page Lab assortments Voltage testers Passive IR detector Special-purpose tubes 327 343 351 355 325 Lab Assortments Contents DIN M binder for COMP-CARDs NTC , will be supplied ex works. Inquire for prices and delivery schedules. Lab Assortments C m lab , Matsushita Components Lab Assortments S8S09I7-0 The COMP-CARDs can be stored in a 4-ring binder


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PDF CCO-70 CCR-66. CCR-66, CCR-67 CCR-65 CCR-62, CCR-63 SMR-11 SMC-34, SMC-35 C945 p 331 Q63100 ic pid-20 siemens PTC C860 s18k275 siemens ntc k45 siemens c890 K164 S863 S14k420
2012 - Not Available

Abstract: No abstract text available
Text: have been tested and verified in a lab environment at room temperature. However, you are solely , Circuits from the Lab circuits. (Continued on last page) One Technology Way, P.O. Box 9106, Norwood, MA , rights reserved. CN-0253 Circuit Note +18V –18V VDD GND VSS ADG5408 S1 BAT 1 BAT 2 BAT 3 S2 S3 S4 D BAT 4 BAT 5 BAT 6 BAT 7 S5 S6 S7 S8 BAT 8 1-OF-8 DECODER A0 , ADG5408 when subjected to a latch-up test . During the test , a stress current is applied to the pin for 1


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PDF CN-0253 com/CN0253. ADG5408/ ADG5409 AD8226 CN-0253 EVAL-CN0253-SDPZ) CN10374-0-5/12
2003 - J955

Abstract: bq24020 bq24023
Text: connecting the input power. Applying loads outside of the specified output range may result in unintended , . . . . . . . 4 2 Test Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , ) TEST CONDITIONS SPECIFICATION Input DC voltage, VI(DC) Battery charge current(1), IO(CHG) Power dissipation (1) 2 MIN VREG + 0.5 TYP MAX UNIT 5.2 V 0.7 ICHG × (V(DC+) ­ V( BAT , , then the maximum input voltage needs to be adjusted. PMAX(IC) = 1.5 W = ICHG (V(DC+) ­ V( BAT +). The


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PDF bq24020EVM bq24023EVM J955 bq24020 bq24023
2006 - Not Available

Abstract: No abstract text available
Text: www.ti.com Test Summary 2.3.2 1. 2. 3. 4. Equipment Setup Connect the load board to the BAT , meter, DMM1, to the BAT +/ BAT - output to monitor the output voltage (range is 0 V to 5 V). Set the lab , . 5 Performance Specification Summary 2.1 5 Test Setup , . 6 2.3 Alternative Test Procedure , . Test Summary


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PDF bq24022/7EVM SLUU243
1995 - Developer

Abstract: bd631 PowerPC 601 instructions set 52 signals PowerPC 601 SR15 SIMM 80 programmer 25SPR The PowerPC Architecture A Specification for a New Family of RISC Processors
Text: Address space register BAT Block address translation BUID Bus unit ID CR Condition register CTR Count register DAR Data address register DBAT Data BAT DEC Decrementer , integer instruction. CR1 can be the implicit result of a floating-point instruction. A specified CR , branch instructions are provided to test individual CR bits. 12 PowerPC Microprocessor Family: The , IBAT Instruction BAT IEEE Institute of Electrical and Electronics Engineers IU Integer


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PDF MPRPPCPRG-01 Developer bd631 PowerPC 601 instructions set 52 signals PowerPC 601 SR15 SIMM 80 programmer 25SPR The PowerPC Architecture A Specification for a New Family of RISC Processors
2008 - Not Available

Abstract: No abstract text available
Text: Specification Summary SPECIFICATION TEST CONDITIONS Power Dissipation (V(DC+) – V( BAT +) × I(CHG , 2008 Submit Documentation Feedback bq24085/6/7/8 Evaluation Module 1 www.ti.com Test Summary 2 Test Summary This section describes: • Input/Output and Jumper Connections • Test Procedure Using Single Cell Li-ion Battery • Alternative Test Procedures (Without Battery) • Required Equipment • Test Equipment Setup • Test Procedure 2.1 Input/Output and Jumper Connections The


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PDF SLUU305 bq24085/6/7/8
2005 - MPCFPE32B

Abstract: RTL 8188 RTL 8189 FRB 749
Text: ) . 2-3 Condition Register ( CR , ). 2-21 BAT Registers , ) . 3-15 Sign of Result , . 7-16 BAT Array Organization. 7-16 Recognition of Addresses in BAT Arrays


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PDF 32-Bit MPCFPE32B CH370 MPCFPE32B RTL 8188 RTL 8189 FRB 749
MN1380

Abstract: to-92 type mn1380l D0122 MN13822 MN1381 MN13802 MN13801 NF38 cmos series
Text: .:.17 19. TO-92 TYPE TAPING PACKAGING SPECIFICATIONS ( MN 20. MINhTYPE EMBOSSED TAPING PACKAGING SPECIFICATIONS ( MN 21. MN 1380 SERIES RELIABILITY TEST RESULTS , -65 rC , i = lOOOhrs . | 0/15 : I L High-temperature, High-humidity j Storage Test Ta = 85; CR H = , (Mini type, TO-92 type).3000 tapes' 1^32052 D0]i2Efi4 BAT y


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PDF Q0122Ã MN1380 132fl52 to-92 type mn1380l D0122 MN13822 MN1381 MN13802 MN13801 NF38 cmos series
MAX1555

Abstract: MAX1551 MAX1555EZK
Text: Reviewed by Jim Pedicord Quality Assurance Reliability Lab Manager Bryan J. Preeshl Quality , single-cell lithium-ion ( Li +) battery from both USB* and AC adapter sources. It operates with no external , to GND DC to BAT BAT , CHG, POK, USB to GND Operating Temperature Range Junction Temperature Range , . Description/Function: SOT23 Dual-Input USB/AC Adapter 1-Cell Li + Battery Charger B. Process: B8 - , : Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135°C biased


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PDF MAX1555EZK MAX1555 100pf 1551ESA/1555ESA PN20Z) MAX1551/1555) PN20Z MAX1551 MAX1555EZK
Not Available

Abstract: No abstract text available
Text: V bat = 1 6 V unless otherwise specified) Test Condition Config. in fig. 3a: V cpu <4V , CONNECTION T- D o CM rr n rr rr LU cr n cr cr LU CL > LU m _i m z c) o > CM T — LL LL LU cr > LU cr > cr n cr cr lu CO rr n rr , , -0.4 7 V V bat -0.4 8 V V reF -0.4 7 V BLOW, BEMP, V con -0.4 , synchronizing input 4, 30 V bat Power supply voltage 6, 28 GND Power ground 38 VREF 2


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PDF TDA7278 PQFP44 10x10)
Not Available

Abstract: No abstract text available
Text: Jim Pedicord Quality Assurance Reliability Lab Manager Bryan J. Preeshl Quality Assurance Executive , . Device Description A. General The MAX1551 charges a single-cell lithium-ion ( Li +) battery from both USB , -40°C to +85°C range. B. Absolute Maximum Ratings Item DC to GND DC to BAT BAT , CHG, POK, USB to GND , USB/AC Adapter 1-Cell Li + Battery Charger B8 - Standard 8 micron silicon gate CMOS 541 California, USA , . Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135


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PDF MAX1551EZK MAX1551 100pf 1551ESA/1555ESA PN20Z) MAX1551/1555) PN20Z
SDS S4 24V

Abstract: SDS S4 - 24V ti 8ak EVA-510 SI 1360 H DT-38-32.768KHZ lcd monitor ckt LC5732N LC5732 SDS 202 transistor
Text: li IS 20 21 22 23 □ □□□□□□□□□□□□□ 240 COMI TEST in jg £ J ¡J ¡q o , following Table shows how to connect external parts in each case. \ Ag bat . use . Li bat . use EXT-V use , : 3.0jiA typ. (Ag battery version, 32kHz crystal oscillation, during timekeeping operation) 1.5pA typ. ( Li , timekeeping (32.768kHz crystal connected externally) or CR oscillator ( CR connected externally) • Many , –¡ □□□□□□□□□□□□□ SO 49 49 47 45 45 U 43 42 41 40 3S 39 37 iff □ COM2 35 □ TEST 34 □ OSC OUT 33 □ 10 P


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PDF EN3379A LC5732N 32kHz SDS S4 24V SDS S4 - 24V ti 8ak EVA-510 SI 1360 H DT-38-32.768KHZ lcd monitor ckt LC5732 SDS 202 transistor
1997 - lt 8228

Abstract: 7 segment display LT 542 7 SEGMENT DISPLAY LT 543 D-16 D-18 lt 8225 LT 8229 microprocessor architecture programming
Text: Condition Register ( CR ) . , ) . 2-24 BAT Registers , ) . 3-21 Sign of Result , . 7-28 BAT Array Organization . 7-29 Recognition of Addresses in BAT Arrays .


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PDF G522-0290-00 Index-15 Index-16 lt 8228 7 segment display LT 542 7 SEGMENT DISPLAY LT 543 D-16 D-18 lt 8225 LT 8229 microprocessor architecture programming
1997 - 7 segment display LT 542

Abstract: 7 SEGMENT DISPLAY LT 543 LT 542 seven segment display data sheet RTL 8188 PowerPC Microprocessor Family Programming BLR MQ 06 MPCPRGREF/D MKP BC LM 4863 D D-16
Text: ) . 2-4 Condition Register ( CR , ) . 2-24 BAT Registers , ) . 3-21 Sign of Result , . 7-28 BAT Array Organization . 7-29 Recognition of Addresses in BAT Arrays .


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PDF G522-0290-00 Index-15 Index-16 7 segment display LT 542 7 SEGMENT DISPLAY LT 543 LT 542 seven segment display data sheet RTL 8188 PowerPC Microprocessor Family Programming BLR MQ 06 MPCPRGREF/D MKP BC LM 4863 D D-16
DNA 1001

Abstract: rcf art 200 455bk LCD Tcon eDP POE455 s1cx toP03 SANYO lcd TV circuit diagram free LC573102A 455bk ceramic
Text: Current System clock Oscillation Supply Dissipation generator frequency vokage )50}iA typ CR oscillation 455kHz 3.0V 400jiA typ CR oscillation 455kHz 5.0V n m o «* o g « «8 If) UCS73 i 04A/02A , 80}iA typ CR oscillation 455kHz 3.0V 300jiA typ CR oscillation 455kHz 5.0V c. HOLD mode Leakage current Condition Oscillation frequency Supply voltage 0.1 J!A typ When CR oscillation is at STOP mode , selected by timer at mask option, and when 455kHz CR oscillator is used] • Infrared carrier


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PDF S4I44 LC573104A, LC573102A LC573104A LC573302A LC573102A 16-bit LC573104A) LC573102A) DNA 1001 rcf art 200 455bk LCD Tcon eDP POE455 s1cx toP03 SANYO lcd TV circuit diagram free 455bk ceramic
SI 1360 H

Abstract: c5732 LA 4645 LC5732 LC5732N 3379A 32.768KHZ one light 1360 A/M29F010B(45/70/90/MT352/CG/SI 1360 H
Text: external parts in each case. I Ag bat . ule . Li bat . use EXT-V use \f static 1/2 tós static 1 , timekeeping operation) 1.5pA typ. ( Li battery version, 32kHz crystal os#if^ioii;iduringliinekeeping operation) • Crystal oscillator for timekeeping (32.768kHz crys&:;^nnected externally) or CR oscillator ( CR , M A □ 7 t 9 □ □ v. TEST O 4! UJ tu W UJ K u 111 u 111 HI u HI u winlnirtiflpjiniflwt/imi , «1 in, Ki m. m in ,/, m test ' 'k'Q oste out »a 'kip ose IN


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PDF EN3379A LC5732N 32kHz SI 1360 H c5732 LA 4645 LC5732 3379A 32.768KHZ one light 1360 A/M29F010B(45/70/90/MT352/CG/SI 1360 H
2001 - b0375

Abstract: D-12
Text: Title Page Number Condition Register ( CR , ) . 2-23 BAT Registers , ) . 3-16 Sign of Result , . 7-18 BAT Array Organization . 7-18 Recognition of Addresses in BAT Arrays


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PDF MPCFPE32B/AD 32-Bit b0375 D-12
2001 - S0146

Abstract: BLR MQ b0375 MP 7721 D-12 BLR MQ 06
Text: 2.3.15 2.3.16 2.3.17 Title Page Number Condition Register ( CR , ) . 2-23 BAT Registers , ) . 3-16 Sign of Result , . 7-18 BAT Array Organization . 7-18 Recognition of Addresses in BAT Arrays


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PDF MPCFPE32B/AD 32-Bit S0146 BLR MQ b0375 MP 7721 D-12 BLR MQ 06
1997 - D-10

Abstract: D-12 MPC500 rtl 8151
Text: ) . 2-4 Condition Register ( CR , ) . 2-23 BAT Registers , ) . 3-21 Sign of Result , . 7-20 BAT Array Organization . 7-20 Recognition of Addresses in BAT Arrays .


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PDF MPC500 32-Bit MPCFPE32B/AD Index-13 Index-14 32-Bit) D-10 D-12 rtl 8151
1997 - MKP BC

Abstract: RTL 8188 doz 112 MPC604UMAD D-10 D-12 u 741 FE0021
Text: ) . 2-4 Condition Register ( CR , ) . 2-23 BAT Registers , ) . 3-21 Sign of Result , . 7-20 BAT Array Organization . 7-20 Recognition of Addresses in BAT Arrays .


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PDF MPCFPE32B/AD 32-Bit Index-13 Index-14 32-Bit) MKP BC RTL 8188 doz 112 MPC604UMAD D-10 D-12 u 741 FE0021
Ishizuka Denshi

Abstract: No abstract text available
Text: , R current i OSC oscillation cycle - CR co E BAT pin reverse current - BAT pin voltage 0.1 , BAT 35)- Test pin 1 Pre-charge timer test pin 3 TP1 Input/ Output Inverts while counting , counter.) Test pin 2 4 TP2 Input/ Output Full charge timer test pin Same structure as TP1 , comparing ADJ2 pin voltage and 12dB voltage drop value between CS and BAT . Pre-charge current adjustment pin


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PDF MM1433 P-24A Ishizuka Denshi
2000 - STE 072C

Abstract: VXIS Technology CHIP 8202 L code f54 G522-0290-01 2312t BLR MQ RA49D D-12 D-10
Text: (FPRs)- - - - - - - - - - - - - - - - - 2.1.3-Condition Register ( CR ) - - - - - - - - - - - - - - - - - , -Processor Version Register (PVR) - - - - - - - - - - - - - - - 2.3.3- BAT Registers - - - - - - - - - - - - - - - - , (NaNs) - - - - - - - - - - - - - - - - - 3.3.2-Sign of Result - - - - - - - - - - - - - - - - - - - - - , -Block Address Translation - - - - - - - - - - - - - - - - - - - - - - - - - - - 7.4.1- BAT Array Organization - - - - - - - - - - - - - - - - - - - - - - 7.4.2-Recognition of Addresses in BAT Arrays- - - - - - -


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PDF G522-0290-01 32-Bit Index-13 STE 072C VXIS Technology CHIP 8202 L code f54 G522-0290-01 2312t BLR MQ RA49D D-12 D-10
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