1991 - fft matlab code using 16 point DFT butterfly
Abstract: adsp 210xx architecture matlab code using 8 point DFT butterfly ADSP-210xx addressing mode S2Y3 radix-2 ADSP-210xx radix-4 DIT FFT C code assembly language programs for dft addressing mode in core i7
Text: FFT execution time is spent within the middle stage butterflies. The ADSP-210xx architecture executes , -2 DIT FFT, which is the FFT structure used in the ADSP-210xx radix2 implementation shown later in this , requires a high transfer rate of data between memory and the computation units. The ADSP-210xx meets , and subtraction instructions on the ADSP-210xx support the frequent A + B and A B operations used within butterfly calculations. A bit-reversed addressing mode is available on the ADSP-210xx to allow
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HKMSHD88]
HAYKIN83]
OPPENHEIM75]
PROAKIS88]
RABINER75]
fft matlab code using 16 point DFT butterfly
adsp 210xx architecture
matlab code using 8 point DFT butterfly
ADSP-210xx addressing mode
S2Y3
radix-2
ADSP-210xx
radix-4 DIT FFT C code
assembly language programs for dft
addressing mode in core i7
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1995 - adsp-210XX
Abstract: super harvard architecture block diagram adsp 210xx architecture ADSP-21000 adsp 210xx architecture diagram adsp-210XX instruction set harvard architecture block diagram ADSP-210xx assembly language instructions ADSP-21060 ADSP21000
Text: Unconstrained Data Flow The ADSP-210xx has a Harvard architecture combined with a 10-port, 16 word data , Single-Cycle Fetch of Instruction & Two Operands The ADSP-210xx features an enhanced Harvard architecture in , summary of available resources and an introduction to the ADSP -21000 Family architecture . (Complete architecture and programming details are found in each processor's data sheet, the ADSP -21060 SHARC User , ® evaluation boards are complete ADSP-210xx systems that include memory, an audio codec, an analog interface
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ADSP-21000
ADSP-21060
ADSP-21020
32-bit
adsp-210XX
super harvard architecture block diagram
adsp 210xx architecture
adsp 210xx architecture diagram
adsp-210XX instruction set
harvard architecture block diagram
ADSP-210xx assembly language instructions
ADSP21000
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1995 - adsp 210xx architecture
Abstract: adsp 210xx architecture diagram ADSP-21000 adsp-210XX ADSP-210x ADDS21020-EZ-LAB ADDS-210XX-SW-PC ADSP21000 ADSP-21020 adsp-210XX instruction set
Text: BACK a FEATURES FEATURES ADSP -21000 Family Development Tools ADDS- 210xx -TOOLS DEVELOPMENT HARDWARE TOOLS EZ-LAB® DEVELOPMENT BOARD Enables Evaluation, Prototyping, and Development of ADSP , . Figure 1. ADSP -21000 Family Simulator and Emulator User Interface REV. B 3 ADDS- 210xx , following provide direct access to actual assembly instructions in the ADSP-210xx Family SCALB(X,Y) MANT(X , assembly. 10 REV. B ADDS- 210xx -TOOLS ORDERING INFORMATION The ADSP -21000 Family Development
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ADSP-21000
ADDS-210xx-TOOLS
16-Bit
11-Pin
ADSP-2106x
ASSEMB2106x-EZ-KIT
ADSP-21020
adsp 210xx architecture
adsp 210xx architecture diagram
adsp-210XX
ADSP-210x
ADDS21020-EZ-LAB
ADDS-210XX-SW-PC
ADSP21000
adsp-210XX instruction set
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1995 - adsp 210xx architecture
Abstract: 12pin connector circular ADSP-21020 ADDS-21020-EZ-ICE c1855 INVERSE FAST FOURIER TRANSFORM ADSP-21000 ADSP-21010 AD1849 ADSP21020
Text: a ADSP -21000 Family Development Tools ADDS- 210xx -TOOLS FEATURES FEATURES DEVELOPMENT , instructions in the ADSP-210xx Family SCALB(X,Y) MANT(X) LOGB(X) FIXBY(X,Y) FLOATBY(X,Y) RECIPS(X , Connector for ADSP -2106x EZ-ICE (Jumpers in Place) 7 ADDS- 210xx -TOOLS The EZ-ICE probes plug , and PROM splitter. ADSP -2100 Family Ordering Guide ADI Part Number Description1, 2 ADDS- 210xx , ® DEVELOPMENT BOARD Enables Evaluation, Prototyping, and Development of ADSP -21000 Family-Based Systems 16
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ADSP-21000
ADDS-210xx-TOOLS
16-Bit
EDSP-21020
ADDS-21020-EZ-ICE
ADSP-21020
ADDS-21020-EZKITPL
ADDS-2106x-EZ-LAB
adsp 210xx architecture
12pin connector circular
ADDS-21020-EZ-ICE
c1855
INVERSE FAST FOURIER TRANSFORM
ADSP-21010
AD1849
ADSP21020
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1991 - adsp-210XX
Abstract: adsp-210XX instruction set assembly language programs for dft ASM21K assembly language instructions of ADSP-210XX EMM386 ADSP-21000 ADSP-21020 ADSP21062 adsp 210xx architecture
Text: enable you to take your ADSP-210xx assembly language programs from text files to executable machine code , these PROMs in your prototype hardware so that the ADSP-210xx processor can load instructions and data , ADSP-210xx source code and assembler directives and outputs a relocatable object file. Linker. The , outputs an executable file. Simulator. The simulator executes an ADSP-210xx executable program in software in the same way that an ADSP-210xx processor would in hardware. The simulator also simulates the
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ADSP-21000
DSP/21k/examples/06x/dft
adsp-210XX
adsp-210XX instruction set
assembly language programs for dft
ASM21K
assembly language instructions of ADSP-210XX
EMM386
ADSP-21020
ADSP21062
adsp 210xx architecture
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1991 - adsp 210xx architecture
Abstract: sharc parametric equalizer DM 311 BG 30 sonar beamforming PID controller equation ADSP-21000 ADSP-210xx VOCODER lms.asm ADSP21000
Text: handling. 1.3.3.2 Unconstrained Data Flow The ADSP-210xx has a Harvard architecture combined with , ARCHITECTURE OVERVIEW . 7 ADSP -21000 Family Base Architecture , includes a summary of available resources and an introduction to the ADSP -21000 Family architecture . (Complete architecture and programming details are found in each processor's data sheet, the ADSP , . 1.2.2.1 EZ-LAB EZ-LAB® evaluation boards are complete ADSP-210xx systems that include memory, an audio
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ADSP-21000
adsp 210xx architecture
sharc parametric equalizer
DM 311 BG 30
sonar beamforming
PID controller equation
ADSP-210xx
VOCODER
lms.asm
ADSP21000
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1998 - Mobile Controlled Robot using DTMF applications
Abstract: 5.1 home theatre circuit datasheet 5.1 home theater voice control robot fingerprint scanner circuit echo delay reverb 2164 dynamic ram ST EZ 728 218x example adsp-2186 instruction set
Text: -2100 Family members share the same base architecture and assembly language · All ADSP -21000 SHARC Family , -Bit Family The ADSP -2100 Family is built around a common base architecture which is optimized for signal , ; Supports ADSP -21060, 21061, 21062, 21065L VDSP-2106X-PC-5 VDSP-2106X-PC-10 ADDS- 210XX , SHIFTER SPORT 0 SPORT 1 DMA PORT INTERRUPTS ADSP -2100 BASE ARCHITECTURE DSP Selection , SPORT 1 INTERNAL DMA PORT INTERRUPTS ADSP -2100 BASE ARCHITECTURE 18 DSP Selection Guide
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ADSP-2100
16-Bit
To-03
ADSP-21XX-DSW-ML
ADSP-21XX-CTOOL-ML
ADSP-21XX-CRTL-MAN
ADSP-21XX-EZ-MAN
ADSP-210XX-DSW-MAN
ADSP-210XX-CTOOLML
ADSP-210XX-CRTL-ML
Mobile Controlled Robot using DTMF applications
5.1 home theatre circuit datasheet
5.1 home theater
voice control robot
fingerprint scanner circuit
echo delay reverb
2164 dynamic ram
ST EZ 728
218x example
adsp-2186 instruction set
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1995 - ADSP-21000
Abstract: ADSP21000 adsp 210xx architecture ADSP-210xx ADSP-21020 ADSP21060
Text: Overview 1.1 1 INTRODUCTION The C Tools of the ADSP -21000 Family development software let system developers program ADSP-210xx digital signal processors with the ANSI C programming , Free Software Foundation, for the ADSP -21000 family of digital signal processors. G21K supports , processing, and standard C operations. The functions are hand-coded in ADSP -21000 family assembly language , ADSP21000 Family Simulators and the ADSP -21020 EZ-ICE® and the ADSP21060 EZ-ICE® Emulators. CBUG lets you
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ADSP-21000
ADSP-210xx
ADSP21000
adsp 210xx architecture
ADSP-21020
ADSP21060
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1995 - ADSP21000
Abstract: adsp 210xx architecture adsp-210XX ADSP-21020 ADSP-21060 reference manual ADSP-21000 ADSP-21060 ADSP-21062 sharc ADSP-2106x architecture
Text: complete reference for software simulation of the ADSP -21000 Family of DSP processors. At the time of Release 3.2 of the development software, the ADSP -21000 Family includes the following processors: Processor ADSP -21020 ADSP -21060 SHARC ADSP -21062 SHARC For information on the architecture and system interface of each processor, refer to the ADSP -21020 User's Manual or the ADSP -2106x SHARC User's Manual , " ADSP-210xx " generically refers to one or all of the ADSP -21000 Family processors. Please note that any
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ADSP-21000
ADSP-21000
ADSP-21020
ADSP-21060
ADSP-21062
ADSP-21020
ADSP-2106x
ADSP-210xx"
ADSP21000
adsp 210xx architecture
adsp-210XX
ADSP-21060 reference manual
sharc ADSP-2106x architecture
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1995 - addressing modes of ADSP-210XX
Abstract: syntax for writing the assembly codes in ADSP-210XX tools addressing modes in adsp-210xx ADSP-210xx addressing modes Write the addressing modes used in ADSP-210XX adsp 210xx architecture ADSP-210xx ADSP-21020 ADSP21020 ADSP-21060
Text: Writing The Architecture Description File 3.1 3 INTRODUCTION Each ADSP-210xx system can , Manual for further information. 33 3 Writing The Architecture Description File 3.3.1 ADSP -21020 Example Listing 3.1 is an example of an architecture description file for an ADSP -21020 system , _1; dmport_1; = = = = = = Listing 3.1 Example Architecture Description File For The ADSP -21020 The , ADSP -21020 processor after a reset. The last statement in an architecture description file is the
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ADSP-210xx
ADSP-2106x
addressing modes of ADSP-210XX
syntax for writing the assembly codes in ADSP-210XX tools
addressing modes in adsp-210xx
ADSP-210xx addressing modes
Write the addressing modes used in ADSP-210XX
adsp 210xx architecture
ADSP-21020
ADSP21020
ADSP-21060
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1995 - ADSP-210xx
Abstract: 6E20 8 bit square root ADSP-21000 ADSP21000
Text: relative error of less than 10-7. To use these routines on fixed-point data, execute the ADSP-210xx data , ) Librarian 8 The RSQRTS instruction of the ADSP-210xx processor provides a seed value of x0 with about , result occupies the lowest 8 bits of the 32-bit field (bits 15-8 of the full 40-bit ADSP-210xx register , Librarian 8.1 8 INTRODUCTION The ADSP -21000 Family development software tools support , and the default architecture file 21K.ach are linked to create the executable file ( main.exe).
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ADSP-21000
ADSP-210xx
6E20
8 bit square root
ADSP21000
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1997 - addressing modes of ADSP-210XX
Abstract: adsp-210XX ADSP-210xx addressing modes PM48 multi timer ADSP-2100 ADSP-21000 ADSP-21020 ADSP-2106X sharc ADSP-2106x architecture VGA 65530
Text: reset. The architecture file is named 060_ldr.ach. 060_link.asm is the source file for the ADSP , ADSP -21000 Family Development Tools Release Note for 3.3 PC Release 3.3.1 UNIX Release , .1 1.2 CONTENTS OF ADSP -21000 FAMILY DEVELOPMENT TOOLS , .25 5.7.2 ADSP -21010/ ADSP -21020 EZ-ICE Specific Restrictions , .29 APPENDIX A: ADSP -2106X COMPACTOR REFERENCE MANUAL
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ADSP-21000
M111K
M111K:
addressing modes of ADSP-210XX
adsp-210XX
ADSP-210xx addressing modes
PM48 multi timer
ADSP-2100
ADSP-21020
ADSP-2106X
sharc ADSP-2106x architecture
VGA 65530
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ADDS-210XX-GNU-SRC
Abstract: AD2100
Text: fundamental debugging software. PC Hosted tool set. JTAG Header, CE certified, ADSP -21160M 80 MHz processor , requirements: Pentium 166 MHz> + Windows 95/98/NT ADSP -2101,2103,2104,2105,2115, & 216x family: IN CIRCUIT , WIN 95/98/NT(Only for older AD2100>2170 fixed-point DSPs) VisualDSP package for ADSP -218Xand ADSP -219X DSP families : IDE, debugger, compiler, assembler, linker, simulator VisualDSP package for ADSP -218Xand ADSP -219X DSP families : IDE, debugger, simulator and emulation support Assembler package for ADSP
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ADDS-2101-EZ-KIT
ADDS-21XX-EZLITE
ADDS-2171-EZ-LAB
75MHz
AD73322L
RS-232
95/98/NT/
ADSP2192-12
AD1885
ADDS-210XX-SW-SUN
ADDS-210XX-GNU-SRC
AD2100
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1998 - adsp-210XX
Abstract: adsp 210xx architecture adsp-210XX instruction set
Text: programmers develop programs for the ADSP-210xx family processors. This book tells you everything you need , audience has a working knowledge of Analog Devices DSP architecture and DSP instruction set. 1-2 , user's manual) describing the Analog Devices DSP architecture and DSP instruction set. 0DQXDO , documents: · VisualDSP Release Note · ADSP -2106x SHARC User's Manual (second edition) · An Analog Devices , Debugger Guide & Reference · C Compiler Guide & Reference for the ADSP -2106x Family DSPs Note that this
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1991 - dumper
Abstract: ADSP-21xxx adsp-210XX diode dumper adsp 210xx architecture
Text: line: C:\Program Files\Analog Devices\VisualDSP>cswap Analog Devices ADSP-210xx Coff Executable , symbol table -arall Print every archive member Linker & Utilities Manual for ADSP -21xxx Family , combine their capablities. One interesting appli- B-2 Linker & Utilities Manual for ADSP , disassembly technique. Linker & Utilities Manual for ADSP -21xxx Family DSPs B-3 Mem21k - Memory , the following command line: C:\Program Files\Analog Devices\VisualDSP>mem21k Analog Devices ADSP
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ADSP-210xx
ADSP-21xxx
dumper
diode dumper
adsp 210xx architecture
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1997 - ADSP-210xx
Abstract: IXI1222 IXI1688S ixthos 741G ADSP-2101 IXI1204 IXI1210 IXI1241 IXI1688P
Text: Tools Model No. ADI21KBUN ICE-SHARC IXZtools IXLibs-21K Description Complete set of ADSP-210xx , libraries for ADSP-210xx DSPs. Comprehensive set of functions includes: vector, matrix, math, statistics , experience to tackle your signal processing problems in a timely fashion. IXZ8xxx Quad SHARC ( ADSP -2106x) Real-Time Signal Processing VME Board · 8 SHARCs ( ADSP -2106x); 2 clusters of 4 · 960 peak MFLOPS (640 , ; up to 256 MBytes each · Full featured VME64 master/slave interface IXZ4xxx Quad SHARC ( ADSP
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741-G
ADSP210xx)
2106x
ADSP-210xx
IXI1222
IXI1688S
ixthos
741G
ADSP-2101
IXI1204
IXI1210
IXI1241
IXI1688P
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1999 - addressing modes of ADSP-210XX
Abstract: ADSP-210xx addressing modes addressing modes in adsp-210xx Cc21k 7 segment digital display ADSP21020 adsp-210XX interrupt Assembly sharc memory compiler ADSP21060
Text: space, modified Harvard architecture of the ADSP-210xx Family processors. There are two keywords used , ) compiles ANSI standard C code for ADSP-210xx DSP systems. A number of C language extensions in the , . These extensions support hardware features of the ADSP-210xx family DSPs. For information on these , ) Places ADSP-210xx Family assembly language commands directly in your C program-For more information , Language Support Keyword (asm) The Cc21k asm() construct lets you code ADSP-210xx Family assembly
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Cc21k)
ADSP-210xx
80-bit
R0-R15
F0-F15
ADSP-2106x
addressing modes of ADSP-210XX
ADSP-210xx addressing modes
addressing modes in adsp-210xx
Cc21k
7 segment digital display
ADSP21020
interrupt Assembly sharc
memory compiler
ADSP21060
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1997 - Write the addressing modes used in ADSP-210XX
Abstract: ADSP-210xx addressing modes 386SX 486SX ADSP-2100 ADSP21000 ADSP-21000 ADSP-21020 16-slot "run g21k in a DOS box from windows"
Text: architecture file is named 060_ldr.ach. 060_host.asm is the source file for the ADSP -2106x HOST default loader , ADSP -21000 Family Development Tools 3.3 Release Note Copyright ©1997 Analog Devices, Inc. #83-000855-05 ADSP -21000 Family Development Software 5/8/97 a Release 3.3 page 2 ADSP , . 5 1.2 CONTENTS OF ADSP -21000 FAMILY DEVELOPMENT TOOLS , . 29 5.7.2 ADSP -21010/ ADSP -21020 EZ-ICE Specific Restrictions
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ADSP-21000
Write the addressing modes used in ADSP-210XX
ADSP-210xx addressing modes
386SX
486SX
ADSP-2100
ADSP21000
ADSP-21020
16-slot
"run g21k in a DOS box from windows"
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sharc ADSP-21xxx architecture
Abstract: addressing modes of ADSP-210XX ADSP-210xx addressing mode ADSP-21xxx ADSP-21XXX MEMORY cc21k adsp-210XX instruction set ADSP-210xx sharc 21xxx reference manual compiler ADSP21060
Text: 2-22. asm("assembly") Places ADSP-210xx Family assembly language commands directly in your C , ADSP-210xx family assembly language instructions within a C function. The asm() construct is useful , to the ADSP-210xx Family assembly language clip instruction: { int result x, y; . asm , C Compiler & Library Manual for ADSP -21xxx Family DSPs Compiler ADSP-210xx Family processors , compiler (cc21k) compiles ANSI standard C code for ADSP -21xxx DSP systems. A number of C language
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cc21k)
ADSP-21xxx
ADSP-210xx
80-bit
R0-R15
F0-F15
ADSP-21xxx
sharc ADSP-21xxx architecture
addressing modes of ADSP-210XX
ADSP-210xx addressing mode
ADSP-21XXX MEMORY
cc21k
adsp-210XX instruction set
sharc 21xxx reference manual compiler
ADSP21060
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1995 - median Filter
Abstract: adsp-210XX FIR FILTER implementation in c language ADSP filter algorithm implementation c code for convolution convolution of two matrices diode r4 implementation of data convolution algorithms ADSP-21000 convolution implementation in c language
Text: for program memory read within the loop. (The ADSP-210xx multifunction operations allow a data , operation is always valid because the ADSP-210xx updates the ASTAT register after every operation. The AZ , Image Processing The ADSP-210xx has a sufficient number of registers to perform the memory read and , stored in bin 255, the last bin. The ADSP-210xx supports a 32-bit integer data type, and thus can tally , 9.4 is a fixed point implementation of the median filter for an ADSP-210xx family DSP. The first task
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GLASSNER90]
GONZALEZ87]
JAIN89]
median Filter
adsp-210XX
FIR FILTER implementation in c language
ADSP filter algorithm implementation
c code for convolution
convolution of two matrices
diode r4
implementation of data convolution algorithms
ADSP-21000
convolution implementation in c language
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1998 - EE-42
Abstract: EE42 core interrupt in assembly for sharc EE42 ADSP-21060 21062C def21060 g21k EE42/42/20
Text: , EMAIL: dsp.support@analog.com C Programs on the ADSP -2106x Last Modified: 6/25/96 This , given below. All programs have been written with the development software ADDS- 210XX -SW-PC release 3.3 , firm with the restrictions of your development software. 2. Writing An Architecture File The architecture file is used to describe your target system on which the C program should run. There are two .ACH , 21060c.ACH is for people who upgraded their EZ-LAB with an ADSP -21060. The /CINIT, /CSTACK and /CHEAP
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EE-42
ADSP-2106x
ADDS-210XX-SW-PC
ADDS-2106x-EZ-LAB.
0x03f03f;
0x0b300;
def21060
EE-42
EE42 core
interrupt in assembly for sharc
EE42
ADSP-21060
21062C
g21k
EE42/42/20
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1999 - 0x3e000
Abstract: ADSP21060 ADSP-21060 EE-62 ADSP21000 ADSP-21000
Text: Example // Link for 21060 system ARCHITECTURE ( ADSP -21060) SEARCH_DIR ( $ADI_DSP\21k\lib ) MAP (SUM.map , 20, 1999 Introduction The ADSP -2106x SHARC family processors' C runtime environment natively , Reference Manual, first edition. V3.3 210xx Family Development Tools Example For the v3.3 version of our , architecture file. Here is an excerpt of this file below: .SEGMENT/RAM/BEGIN=0x0007c000 /END=0x0007ffff /DM , =0x0007ffff /DM/WIDTH=16 alt_dmda; .ENDSYS; Example Architecture File for v3.3 Development Tools g21k
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EE-62
Short-33
0x3e000
ADSP21060
ADSP-21060
EE-62
ADSP21000
ADSP-21000
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1999 - sharc ADSP-21xxx architecture
Abstract: FIR FILTER implementation in c language sharc iir filter ADSP-21xxx ADSP-21020 sharc ADSP-21xxx 16 segment alphanumeric adsp-210XX interrupt Assembly sharc C PREPROCESSOR AND APPLICATION OF C IN REAL TIME
Text: ADSP-210xx family assembly language. C programs depend on library functions to perform operations that , systems based on ADSP-210xx family processors. For more information on the algorithms on which many of , librarian, lib21k, described in the VisualDSP User's Guide & Reference (for ADSP-210xx DSPs), to build , files, you need proficiency in ADSP-210xx assembly language and an understanding of the runtime , . asm_sprt.h Mixed C/Assembly Support This category consists of ADSP-210xx Family assembly language macros
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ADSP-210xx
ADSP-2106x
sharc ADSP-21xxx architecture
FIR FILTER implementation in c language
sharc iir filter
ADSP-21xxx
ADSP-21020
sharc ADSP-21xxx
16 segment alphanumeric
interrupt Assembly sharc
C PREPROCESSOR AND APPLICATION OF C IN REAL TIME
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1995 - F12-F0
Abstract: trigonometric, mathematical transcendental function 6E20 ADSP 2015 ADSP-21000 ADSP-210xx addressing mode diode F4 F12-F4 F15F15 F12d
Text: describes how to calculate the sine and cosine functions. This ADSP-210xx implementation of sin(x) is , four decimal places beyond the precision of the ADSP-210xx . For devices that represent floating-point , critically depends on the accuracy of g, the effective precision of the ADSP-210xx processor must be , using the FIX and FLOAT conversion features of the ADSP-210xx processors. 54 Given g and XN, it , algorithm on ADSP -21000 family processors is straightforward. In the first listing below, sin.asm , two
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ilc7660
Abstract: SSM2126a max1440 AD698 AD633 application notes LM35 application circuits with OP07 AD1671 evaluation board ADDS-2101-EZ-LAB ssm-2126A AD7874
Text: DIGITAL SIGNAL PROCESSING FIXED-POINT FLOATING-POINT WITHOUT HOST INTERFACE PORT MIPS ADSP -2101 ADSP -21032 ADSP -2105 ADSP -2115 ADSP -2161 ADSP -21622 ADSP -2163 ADSP -21642 ADSP -2165 ADSP -21662 16.7/20 10.2 13 13.8/16.7/20 16.7 10.2 16.7 10.2 20 20 Cycle Time ns ADSP -21020 ADSP -21060 ADSP -21062 On-Chip Memory PM/DM/ROM1 2 k/1 k/0 k 2 k/1 k/0 k 1 k/512 k/0 k 1 k/512 k/0 k 0 k/1 , PORT WITH HOST INTERFACE PORT ADSP -2111 ADSP -21713 ADSP -21723 ADSP -21732 ADSP -21813, 4 ADSP
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ADDS-21xx-SW
ADDS-210xx-SW
ADDS-2101-EZ-KIT
ADDS-21-EZ-KIT-LITE
ADSP-2181)
ADDS-2111-EZ-KIT
ADDS-21020-EZKITPL
ilc7660
SSM2126a
max1440
AD698
AD633 application notes
LM35 application circuits with OP07
AD1671 evaluation board
ADDS-2101-EZ-LAB
ssm-2126A
AD7874
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