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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
TNETD3000C Texas Instruments TNETD3000 ADSL Chipset
TNETD3000R Texas Instruments TNETD3000 ADSL Chipset
TNETD3200GJL Texas Instruments ADSL Transceiver for the TNETD3000 ADSL Chipset family 352-FCBGA
TNETD3200GJC Texas Instruments ADSL Transceiver for the TNETD3000 ADSL Chipset family 352-FCBGA
TLV320AD15GGW Texas Instruments Eight Channel Integrated ADSL Analog Front End 240-BGA MICROSTAR -40 to 85
AC5 CHIPSET Texas Instruments AC5 Octal Port Central Office ADSL Chipset

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1999 - ADSL circuit diagram

Abstract: ADSL Modem circuit diagram MB86626 MB86626PFV delay echo circuit diagram adsl modem input circuit
Text: DAC Tx2 PA Control 15 PGA ADC Rx1 15 ADC PAC2 PGA Trim Rx2 R/W , ADSL Analog Front End Application Configurations Transmit Line Driver Tx 15 DAC PA Control 15 Data Interface ADSL Modem Tx/EC Rx data 16 DAC Twisted Pair line PA Control 15 , Central Office - Full Rate ADSL (G.dmt) Transmit Line Driver Tx 15 DAC PA Control 16 Data Interface ADSL Modem Tx/EC Rx data 15 ECout DAC Twisted Pair line PA Control


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PDF MB86626 MB86626 FML/MS/ADSLAFE/FL/4282 LQFP-80 FML/MS/ADSLAFE/FL/4282 ADSL circuit diagram ADSL Modem circuit diagram MB86626PFV delay echo circuit diagram adsl modem input circuit
digital thermometer using ic 741

Abstract: DPS8000 TXPA DA10 DA11 DPS8001
Text: ) and 1.104 MHz (G.dmt) · 14-bit linear 4.416 MS/s ADC · Dual 14-bit linear 4.416 MHz DAC , Filter PAA DAC TX Filter Echo Out PAA ADC RX In RX Filter Fine PGA Low-Noise Coarse PGA Support Blocks: Wakeup detect VCXO DAC ADSL Analog Front End IC Data Sheet V1.1.1 01 , functions required in an ADSL modem. To assist in timing recovery, a 12-bit DAC is present to drive an , evaluation. The primary digital ADC / DAC interfaces are on separate 16-bit wide busses. Although the chip


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PDF DPS8000 DPS8001 digital thermometer using ic 741 DPS8000 TXPA DA10 DA11 DPS8001
1999 - MB86626

Abstract: MB86626PFV ADSL circuit diagram adsl dac adc Remote Control tx2
Text: 15 DAC Tx2 PA Control 15 PGA ADC Rx1 15 ADC PAC2 PGA Trim Rx2 , Application Configurations Transmit Line Driver Tx 15 DAC PA Control 16 Data Interface ADSL , Central Office - Full Rate ADSL (G.dmt) Transmit Line Driver Tx 15 DAC PA Control 16 15 Data Interface ADSL Modem Tx/EC Rx data ECout DAC Twisted Pair line PA Control , DAC PA Control 16 Data Interface ADSL Modem Tx/EC Rx data 15 Tx 2 DAC PA Control


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PDF MB86626 MB86626 LQFP-80 MB86626PFV ADSL circuit diagram adsl dac adc Remote Control tx2
1999 - cmos bandgap reference 0.35u

Abstract: 8832M 8309 208M 416M S5N8943B VCXO 35.328MHz capacitor 39n k 63
Text: 10 3.1 ADC / DAC . 10 3.2 , , LPF, ADC , DAC . The AGC has 42dB gain 0.4dB step in RX mode and ­24dB gain 2dB step in TX mode with , . Samsung' s ADSL AFE chip provides 14bit ADC at 2.208M, 4.416M or 8.832M sample rates and 14bit 4.416MHz , 2.208MS/s, 4.416MS/s or 8.832MS/s ADC l 14bit 4.416MHz or 8.832MHz DAC l 5th-order Low Pass , AVSS_DAX 39 Supply - VCXO DAC Analog VSS AVDD_ADC 35 Supply - Rx Analog ADC VDD


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PDF S5N8943B cmos bandgap reference 0.35u 8832M 8309 208M 416M S5N8943B VCXO 35.328MHz capacitor 39n k 63
1999 - 8309

Abstract: 021F 416M S5N8951X S5N8951X01 138-kHz capacitor 39n k 63
Text: 10 3.1 ADC / DAC . 10 3.2 , , LPF, ADC , DAC . The AGC has 42dB gain 0.4dB step in RX mode and ­24dB gain 2dB step in TX mode with , . Samsung' s ADSL AFE chip provides 14bit ADC at 4.416M or 8.832M sample rates and 14bit 4.416MHz , 14bit 4.416MS/s or 8.832MS/s ADC l 14bit 4.416MHz or 8.832MHz DAC l 5th-order Low Pass , End IC 3. BLOCK DESCRIPTIONS 3.1 ADC / DAC S5N8951X01 has a 14bit resolution ADC 4.416M/8.832M


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PDF S5N8951X 8309 021F 416M S5N8951X S5N8951X01 138-kHz capacitor 39n k 63
2002 - adsl modem input circuit

Abstract: ADSL Modem circuit diagram MB86626 MB86626PFV circuit diagram adsl modem board
Text: for ADSL modems. The device integrates high resolution analog to digital converters ( ADC ) and , Interface DAC ADSL Modem 16 PA Control 15 Data Interface ADSL Modem Tx/EC Rx data ECout DAC Twisted Pair line PA Control ECin 15 PGA PGA ADC Rx ADC PGA PGA , Tx/EC Rx data 16 15 Data Interface DAC ADSL Modem Data Interface ADSL Modem 16 , Driver Tx 15 Tx 1 DAC Analog Modem (option) DAC PA Control 15 ADC Trim 15


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PDF MB86626 MB86626 LQFP-80 adsl modem input circuit ADSL Modem circuit diagram MB86626PFV circuit diagram adsl modem board
transistor c 6073

Abstract: DPS8000 DPS8001 DPS8002
Text: Interface V0.1.0 04/22/2000 5/12 4 Digital Interfaces 4.1 ADC and DAC Digital Interfaces , ] AD0[0] AD0[15] AD0[14] DA0[6] Two 16-bit DAC words One 16-bit ADC sample . . , ] DA0[0] DA0[7] AD0[0] DA0[6] AD0[15] Four 16-bit DAC words One 16-bit ADC sample . , digital interfaces for future DataPath multi-channel CO ADSL AFE's for product generations following , stream at 17.6 MHz, to support a 2.208 MHz incoming TX data rate, with a 16-bit DAC word. For each


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PDF DPS8002 transistor c 6073 DPS8000 DPS8001
DAC Combo

Abstract: Combo Driver DPS8001 DPS8100
Text: -bit linear 4.4 MS/s ADC · 14-bit linear 4.4 MS/s DAC · 4th-order continuous time lowpass filters for RX and , and evaluation. The primary digital ADC / DAC interfaces are on separate 16-bit wide busses: 16 for the ADC , and 16 for the DAC . Although the chip itself utilizes a 5V supply voltage, the digital , DPS8100 ATU-R ADSL Analog Front End with Integrated Line Driver Combo IC Features · ADSL , kHz (for ADSL over ISDN) · TX (downstream) channel: support for both 552 kHz (G.lite) and 1.104 MHz


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PDF DPS8100 14-bit DAC Combo Combo Driver DPS8001
DPS8100

Abstract: TLFD600 schematic diagram modem adsl echo cancellation schematic diagram 3bit flash adc ISSCC99
Text: automatic tuning, 14 bit ADC and DAC as well as a digitally controlled crystal oscillator. The IC has been , ADSL over ISDN (DTS 06006). The transmit path consists of an sigma-delta DAC followed by a tuneable , Current Steering DAC 3bit flash adc 1 U Y1 64 2 z unity current cell Plus DAC , adc Y2 (1-z -1 )2 1 Fig.4 schematic of the current steering DAC DAC 5bit Fig , performed by a multi-bit sigma-delta ADC running at 26 MHz (13 MHz for half rate ADSL ). Apart form the


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PDF 800mW, ISSCC99, TLFD600, DPS8100 TLFD600 schematic diagram modem adsl echo cancellation schematic diagram 3bit flash adc ISSCC99
IC TX-2

Abstract: ic 8 pin ad DPS8000 DPS8001 DA12AD RX-3 DPS8101 RX-2 remote
Text: AFE I/O's TX DAC path 4 Serial port control ADC /RX path AFE Internal Signals DPS8101 , and EC are identical. 3 Below in Figs. 1­8 are diagrams showing explicitly the way DAC and ADC , ] AD[4] AD[7] AD[6] AD[1] AD[0] AD[3] AD[2] One 16-bit DAC word Four 16-bit ADC , [6] One 16-bit DAC word Two 16-bit ADC words; 16 time slots of IFCLK First ADC word Second , highly integrated component containing a complete ADSL analog front end for the remote terminal side


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PDF DPS8101 IC TX-2 ic 8 pin ad DPS8000 DPS8001 DA12AD RX-3 RX-2 remote
2001 - LSI 2208

Abstract: 276-kHz LSI LOGIC modem LSI LOGIC DPS8001 DPS8003
Text: ) 16 16 DAC 4.4MHz ADC 2.2MS/s TX LPF 138kHz/ 276kHz Echo Out PAA · TX path PAAs , of design-in and evaluation. The primary digital ADC / DAC interfaces are on separate 16-bit wide busses: 16 for the ADC , and 16 for the primary TX path DAC . When the echo path is used, the chip accepts , SpeedREACH DPS8003 - G.lite ADSL Analog Front End for CPE TM OVERVIEW FEATURES Asymmetric digital subscriber line ( ADSL ) technology provides a viable solution to meet the emerging need


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PDF DPS8003 DPS8003, R20031 LSI 2208 276-kHz LSI LOGIC modem LSI LOGIC DPS8001
1997 - C3228

Abstract: AD6437 c3228 transistor AD6435 AD6436 AD816 ADSP-2183 adsl splitter circuit diagram
Text: DAC (up to 20 MSPS, allowing for oversampling of the downstream transmit signal), ADC (up to 10 MSPS , All the internal bias points of the AD6437 DAC and ADC are decoupled as shown in Figures 2 and 3. All , a FEATURES Complete Analog Front End for ADSL Modems Part of ADI ADSL Chipset (AD20msp910 , . Suitable for CO or Residence (ATU-C and ATU-R) Includes Transmit and Receive Signal Paths: DAC : 20 MSPS 12-Bit Current Output ADC : 10 MSPS 12-Bit PGA: 0 dB­25 dB of Gain with 1 dB Steps Programmable


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PDF AD20msp910) 413/ETSI TR238/ITU 12-Bit 12-Bit 80-Lead AD6437 AD6437) S-80A) C3228 c3228 transistor AD6435 AD6436 AD816 ADSP-2183 adsl splitter circuit diagram
1997 - c3228 transistor

Abstract: C3228 AD6436 AD6437 ATU-C ATU-R ADSP-2183 AD816 AD6435 ADSL Modem circuit diagram adsl splitter circuit diagram
Text: DAC (up to 20 MSPS, allowing for oversampling of the downstream transmit signal), ADC (up to 10 MSPS , Data Input to Timing Recovery DAC . Factory Test Digital Output (Receive) Data from ADC . ADC Clock , bias points of the AD6437 DAC and ADC are decoupled as shown in Figures 2 and 3. All AD6437 power pins , a FEATURES Complete Analog Front End for ADSL Modems Part of ADI ADSL Chipset (AD20msp910 , . Suitable for CO or Residence (ATU-C and ATU-R) Includes Transmit and Receive Signal Paths: DAC : 20 MSPS


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PDF AD20msp910) 413/ETSI TR238/ITU 12-Bit 12-Bit 80-Lead AD6437 AD6437) AD6437 c3228 transistor C3228 AD6436 ATU-C ATU-R ADSP-2183 AD816 AD6435 ADSL Modem circuit diagram adsl splitter circuit diagram
2003 - ADSL Modem circuit diagram

Abstract: modem LSI LOGIC AR8202 AFE LINE DRIVER
Text: -bit linear 4.4 MS/s ADC and 14-bit linear 4.4 MS/s DAC · Entire RX channel linearity: 80 dB MTPR and TX , to generate internal clocks for ADC , DAC , digital interface, and MCLK output (either 35.328 MHz or , power savings. The primary digital ADC / DAC interfaces are programmable to 1-bit/ 2-bit/4-bit mode. A 4 , SpeedREACHTM AR8202 ADSL AFE for CPE with +5V Line Driver+Line Receiver+DCXO OVERVIEW FEATURES Asymmetric digital subscriber line ( ADSL ) technology provides a viable solution to meet the exploding need


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PDF AR8202 ADSL Modem circuit diagram modem LSI LOGIC AFE LINE DRIVER
1999 - AD6449

Abstract: AD6440 AEC11 AEC13 AEC12 aec capacitors WSD7 104 AEC capacitor PPD14 22 aec capacitor
Text: Receive Signal Paths: DAC : 20 MSPS 14-Bit Current Output ADC : 10 MSPS 12-Bit PGA: ­6 dB­30 dB of Gain , DMT-based ADSL . The AD6440 includes both transmit and receive paths. These include the DAC (up to 20 MSPS , Registers. Clock Input Qualifying ADC Data. Serial Data Input to Timing Recovery DAC . Clock for Timing , a Analog Front End for ADSL AD6440 FEATURES Complete Analog Front End for ADSL Modems Part of ADI ADSL Chipset (AD20msp930) Designed to ANSI T1.413/ETSI TR238/ITU G.adsl Performance e.g


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PDF AD6440 AD20msp930) 413/ETSI TR238/ITU 14-Bit 12-Bit 80-Lead AD6440 AD6440) AD6449 AEC11 AEC13 AEC12 aec capacitors WSD7 104 AEC capacitor PPD14 22 aec capacitor
2003 - dac 0803

Abstract: AR8203 LSI LOGIC modem LSI LOGIC diagram of adsl modem
Text: -bit analog-to-digital converter ( ADC ). The TX portion consists of a 16-bit digital-to-analog converter ( DAC ), a , crystal to generate internal clocks for ADC , DAC , digital interface, and MCLK output (either 35.328 MHz , SpeedREACHTM AR8203 ADSL AFE for CPE with +5 V Line Driver + DCXO OVERVIEW FEATURES Asymmetric digital subscriber line ( ADSL ) technology provides a viable solution to meet the exploding need , the Receive (RX) and Transmit (TX) paths for ADSL customer premise modems full-rate and G.lite. The


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PDF AR8203 dac 0803 LSI LOGIC modem LSI LOGIC diagram of adsl modem
2001 - AC8200

Abstract: LSI 2208 LSI LOGIC
Text: SpeedREACHTM AC8200 - Octal ADSL Analog Front End for CO OVERVIEW FEATURES Central offices providing asymmetric digital subscriber line ( ADSL ) service are seeking a digital subscriber line , lowest power consumption. DSLAM providers are limited by the power dissipation of the ADSL transceiver , complete analog front ends (AFEs) for G.dmt (full-rate) or G.lite ADSL operation in a small 14 mm x 20 mm 128-pin package, with a power dissipation of 150 mW per channel. · ADSL CO AFE with eight full RX


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PDF AC8200 AC8200, 128-pin R20027 LSI 2208 LSI LOGIC
1996 - pioneer PA 2030 A

Abstract: AD6521 GSM based motor control circuit diagram speed control of dc motor by using gsm gsm controlled dc motor speed control circuit Gsm based motor controlling gsm based speed control of single phase induction motor AD6522 speed control of induction motor by using gsm AD6523
Text: . This requires and ADC / DAC in both the transmit and receive path as shown in the diagram. The V , second ADC / DAC combination is eliminated, thereby allowing the faster downstream data rate of 56Kbits/s , .90 MODEMS 33.6K bps A V.34 ANALOG MODEM QAM DATA DAC PSTNANALOG OR DIGITAL ADC ADC , Telephone Service (POTS) I Remote Access Server (RAS) Modems I ADSL (Assymetric Digital , Motor Control I Codecs and DSPs in Voiceband and Audio Applications I A Sigma-Delta ADC with


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2000 - ADSL Integrated Circuits

Abstract: PEB22715 P-MQFP-80-1 adsl dac adc Infineon - Smart Power
Text: requiring minimal external components. It uses high performance multi-bit sigma-delta ADC and DAC and , ADC Generic Data Interface DAC Anti-Aliasing Filter Analog Channel Equalizer LD Tx , Analog Front-End, Line Driver and other peripheral components into a single chip for ADSL CPE , fabrication process. LiDrAFE offers multiple interface options to allow easy connection to different ADSL , the tip/ring to the ADSL datapump Flexibility, best of class performance and cost effectiveness


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PDF B000-H0000-X-X-7600 ADSL Integrated Circuits PEB22715 P-MQFP-80-1 adsl dac adc Infineon - Smart Power
2001 - R20030

Abstract: G9941 DAC De-glitched circuit LSI LOGIC modem LSI LOGIC DPS8002 552KHZ
Text: Programmable gain stages and PAA attenuators in RX and TX paths DAC 4.4MHz ADC 1.1MS/s TX LPF , SpeedREACH DPS8002 - Dual ADSL Full Rate Analog Front End TM OVERVIEW FEATURES LSI , (AFEs) for full-rate or G.lite ADSL in a small 12 mm X 12 mm 80-pin package for central office (CO , converter ( ADC ). The CT section consists of a number of stages of programmable gain followed by a 4thorder , . The output of the filter is fed directly to the ADC , which samples at 1.104 MS/s and outputs a 16


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PDF DPS8002 80-pin R20030 R20030 G9941 DAC De-glitched circuit LSI LOGIC modem LSI LOGIC 552KHZ
2002 - interfacing ADC with 8086 microprocessor

Abstract: teaklite 3 instruction opcode MC86000 0.18-um CMOS Flash technology mc8600 8086-bus DRAM 4416 I8086 teaklite hdl code for 32bit parity generator with less num
Text: Package 240 QFP 208 LQFP Performance 1-1 SAMSUNG ADSL CPE SOLUTION FEATURES - 8 , SAMSUNG ADSL CPE SOLUTION Mode 2 (1 SAR + 2 MII + 1 USB) ARM7TDMI 32bit RISC CPU 3-Bank ROM , interface (7-wire 10-Mbps interface is also supported). 1-5 SAMSUNG ADSL CPE SOLUTION USB , . CM47_M66_MANUAL_V1.0.doc CM47_M72_MANUAL10.doc 1-7 SAMSUNG ADSL CPE SOLUTION PIN DESCRIPTIONS S5N8947 , Symbol Diagram (Mode 1) 1-9 SAMSUNG ADSL CPE SOLUTION Mode 2 (1 SAR + 2 MII + 1 USB) S5N8947


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PDF S5N8947 16/32-bit 10/100Mbps interfacing ADC with 8086 microprocessor teaklite 3 instruction opcode MC86000 0.18-um CMOS Flash technology mc8600 8086-bus DRAM 4416 I8086 teaklite hdl code for 32bit parity generator with less num
2001 - AR8201

Abstract: 11MHz CRYSTAL OSCILLATOR g.hs
Text: TX/RX Data I/F 16 STRB TX LPF 138kHz/ 276kHz DAC 4.4MHz ADC 4.4MS/s / 2.2 MS/s , in an ADSL modem. To assist in timing recovery, a 12-bit DAC is present to drive an off-chip voltage , SpeedREACHTM AR8201 - ADSL AFE for CPE with +5V Line Driver+DCXO OVERVIEW FEATURES Asymmetric digital subscriber line ( ADSL ) technology provides a viable solution to meet the emerging need , ) and transmit (TX) paths for ADSL customer premise modems - full-rate and G.lite. The AR8201 is also


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PDF AR8201 R20028 11MHz CRYSTAL OSCILLATOR g.hs
2001 - DPS8001

Abstract: AFE LINE DRIVER AR8101
Text: -bit analog-to-digital converter ( ADC ). The TX portion consists of a 16-bit digital-to-analog converter ( DAC ), a , required in an ADSL modem. To assist in timing recovery, a 12-bit DAC is present to drive an off-chip , SpeedREACHTM AR8101 - ADSL AFE for CPE with +5 V Line Driver OVERVIEW FEATURES Asymmetric digital subscriber line ( ADSL ) technology provides a viable solution to meet the emerging need , significant cost reduction for ADSL modem manufacturers, while maintaining the excellent linearity


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PDF AR8101 AR8101, R200026 DPS8001 AFE LINE DRIVER
2000 - MB86670A

Abstract: HQFP240 ADSL type 1 circuit diagrams
Text: Programmable gain amplifier ADC - Analogue to digital converter DAC - Digital to analogue converter /FML , Product Datasheet 1.11 2000 MB86670A KeyWaveTM August 2000 Version 1.11 ADSL Transceiver/Controller The KeyWaveTM ADSL Transceiver/Controller from Fujitsu is the key component for Asymetrical Digital Subscriber Line ( ADSL ) modems supporting Discrete Multi Tone (DMT) modulation. /FML , significantly reduces the requirement for external components. The KeyWaveTM ADSL Transceiver/Controller is


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PDF MB86670A /FML/NPD/KEYWAVE/DS/2265 HQFP240 /FML/NPD/KEYWAVE/DS/2265 MB86670A HQFP240 ADSL type 1 circuit diagrams
GSM 900 basestation transmitter processing chain

Abstract: fsk ad607 ad815 VDSL transformer sonar transmitter 40 khz AD7720 G 5643 AD7729 AD7472 AD6640
Text: generate I & Q in the AD7339 transmit channel. The AGC SER DAC #2 LNA LO ADC has its own , AD6121 AD607 AD6458 AD6459 AD9201 REGISTER AD6432 "Q" ADC LO DSP "I" DAC 90 , IF applications the receive ADC must have high input bandwidth, as well as excellent distortion and , -bit, 65, 40 and 25 MSPS ADC converters · cost savings over traditional multiple IF stage receivers , FILTER & LNA X LO FILTER & AMP DSP or ASIC ADC AD6620 AD6640 AD9224 AD9225


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PDF 10-bit 400-page GSM 900 basestation transmitter processing chain fsk ad607 ad815 VDSL transformer sonar transmitter 40 khz AD7720 G 5643 AD7729 AD7472 AD6640
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