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Analog Devices Inc
AD9512BCPZ Low Skew Clock Driver, 9512 Series, 5 True Output(s), CMOS
AD9512BCPZ ECAD Model
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Rochester Electronics AD9512BCPZ 93 $8.92 $8.92 $8.57 $8.21 $8.21 More Info
RS Components (2) AD9512BCPZ Bulk 1 1 $14.06 $13.32 $12.02 $11.883 $11.883 More Info
AD9512BCPZ Tray 0 1 - $13.32 $12.02 $11.883 $11.883 More Info
Chip1Stop AD9512BCPZ 75 1 $15.8 $11.7 $10.9 $10.9 $10.9 More Info
Analog Devices Inc
AD9512UCPZ-EP Low Skew Clock Driver, 9512 Series, 10 True Output(s), CMOS
AD9512UCPZ-EP ECAD Model
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Rochester Electronics AD9512UCPZ-EP 3,129 $25.79 $25.79 $24.76 $23.73 $23.73 More Info
Richardson RFPD AD9512UCPZ-EP 0 26 - - $26.06 $25.05 $25.05 More Info
Analog Devices Inc
AD9512UCPZ-EP-R7 Low Skew Clock Driver, 9512 Series, 10 True Output(s), CMOS
AD9512UCPZ-EP-R7 ECAD Model
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000
Rochester Electronics AD9512UCPZ-EP-R7 1,500 $25.79 $25.79 $24.76 $23.73 $23.73 More Info
Richardson RFPD AD9512UCPZ-EP-R7 0 750 - - - $25.05 $25.05 More Info

ad9512 datasheet (8)

Part ECAD Model Manufacturer Description Type PDF
AD9512BCPZ AD9512BCPZ ECAD Model Analog Devices 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs Original PDF
AD9512BCPZ-REEL7 AD9512BCPZ-REEL7 ECAD Model Analog Devices 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs Original PDF
AD9512/PCB AD9512/PCB ECAD Model Analog Devices 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs Original PDF
AD9512/PCBZ AD9512/PCBZ ECAD Model Analog Devices AD9512 - 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs; No of Pins: 0; Container: 1/No packing Original PDF
AD9512UCPZ-EP AD9512UCPZ-EP ECAD Model Analog Devices Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC CLK BUFFER 1:5 1.2GHZ 48LFCSP Original PDF
AD9512UCPZ-EP AD9512UCPZ-EP ECAD Model Analog Devices AD9512 - IC LOW SKEW CLOCK DRIVER, Clock Driver Original PDF
AD9512UCPZ-EP-R7 AD9512UCPZ-EP-R7 ECAD Model Analog Devices Clock/Timing - Clock Buffers, Drivers, Integrated Circuits (ICs), IC CLK BUFFER 1:5 1.2GHZ 48LFCSP Original PDF
AD9512UCPZ-EP-R7 AD9512UCPZ-EP-R7 ECAD Model Analog Devices AD9512 - IC LOW SKEW CLOCK DRIVER, Clock Driver Original PDF

ad9512 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2005 - AD9512

Abstract: AN-501 AN-586 AN-756 TLO 82 circuit degree
Text: SYNCB: 58h<6:5> = 01b Figure 23 shows a block diagram of the AD9512. The AD9512 accepts inputs on , CLOCK INPUTS Two clock inputs (CLK1, CLK2) are available for use on the AD9512. CLK1 and CLK2 can , 1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs AD9512 , GND RSET VREF AD9512 PROGRAMMABLE DIVIDERS AND PHASE ADJUST OUT0 OUT0B LVPECL OUT1 , The AD9512 provides a multi-output clock distribution in a design that emphasizes low jitter and low


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PDF AD9512 CP-48-1) AD9512BCPZ AD9512BCPZ-REEL71 AD9512/PCB 48-Lead CP-48-1 AD9512 AN-501 AN-586 AN-756 TLO 82 circuit degree
2005 - Not Available

Abstract: No abstract text available
Text: OVERALL SYNCB: 58h<6:5> = 01b Figure 23 shows a block diagram of the AD9512. The AD9512 accepts , section). CLOCK INPUTS Two clock inputs (CLK1, CLK2) are available for use on the AD9512. CLK1 and , 1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs AD9512 , GND RSET VREF AD9512 PROGRAMMABLE DIVIDERS AND PHASE ADJUST OUT0 OUT0B LVPECL OUT1 , The AD9512 provides a multi-output clock distribution in a design that emphasizes low jitter and low


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PDF AD9512 CP-48-1) AD9512BCPZ AD9512BCPZ-REEL71 AD9512/PCB 48-Lead CP-48-1
2005 - sine wave generator using ic 555

Abstract: 555 off delay AD9512 AN-501 AN-586 AN-756
Text: DESCRIPTION OVERALL SYNCB: 58h<6:5> = 01b Figure 23 shows a block diagram of the AD9512. The AD9512 , CLOCK INPUTS Two clock inputs (CLK1, CLK2) are available for use on the AD9512. CLK1 and CLK2 can , 1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs AD9512 , GND RSET VREF AD9512 PROGRAMMABLE DIVIDERS AND PHASE ADJUST OUT0 OUT0B LVPECL OUT1 , . GENERAL DESCRIPTION The AD9512 provides a multi-output clock distribution in a design that emphasizes


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PDF AD9512 MO-220-VKKD-2 48-Lead CP-48-1) AD9512BCPZ1 AD9512BCPZ-REEL71 AD9512/PCB sine wave generator using ic 555 555 off delay AD9512 AN-501 AN-586 AN-756
2004 - AD9512

Abstract: 39 pin lvds converter pin connection lvds wire
Text: , Five Outputs AD9512 FEATURES Two 1.5 GHz, differential clock inputs 5 programmable dividers, 1 to , SYNCB, RESETB PDB DETECT SYNC GND RSET VREF AD9512 SYNC STATUS PROGRAMMABLE , High performance instrumentation Broadband infrastructure GENERAL DESCRIPTION The AD9512 provides , ADJUST LVDS/CMOS /1,/2,/3 . /31,/32 T OUT4 OUT4B Figure 1. The AD9512 is ideally , encode signals with subpicosecond jitter. The AD9512 is available in a 48-lead LFCSP and may be


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PDF AD9512 Hz/250 48-lead PR05287-0-11/04 AD9512 39 pin lvds converter pin connection lvds wire
2005 - AD9512

Abstract: AD9512BCPZ AN-501 AN-586 AN-756
Text: FUNCTIONAL DESCRIPTION OVERALL SYNCB: 58h<6:5> = 01b Figure 23 shows a block diagram of the AD9512. , Synchronization section). CLOCK INPUTS Two clock inputs (CLK1, CLK2) are available for use on the AD9512. , 1.2 GHz Clock Distribution IC, 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs AD9512 , GND RSET VREF AD9512 PROGRAMMABLE DIVIDERS AND PHASE ADJUST OUT0 OUT0B LVPECL OUT1 , The AD9512 provides a multi-output clock distribution in a design that emphasizes low jitter and low


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PDF AD9512 CP-48-1) AD9512BCPZ AD9512BCPZ-REEL71 AD9512/PCB 48-Lead CP-48-1 AD9512 AN-501 AN-586 AN-756
AD9512

Abstract: No abstract text available
Text: 9512_quick_start.clk a Design Example Description In this design the AD9512 , 1.2GHz, 5 , times are met. The AD9512 is a distribution-only chip - no jitter clean-up is done on-chip. Therefore , of the five clock distribution channels of the AD9512 has an independent programmable divider which , . Finally, by taking advantage of the multiple logic families available on the AD9512 , the required , user can determine the jitter limitation of the AD9512 clock distribution section. This serves as a


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PDF AD9512, 52MHz. 52MHz 88MHz. -160dBc/Hz AD9512 AD9512
2010 - HSC-DAC-DPG-BZ

Abstract: R1242 UG-073 JP89 AD9716 AD9717 AD911x UG073 r154 ADL5375
Text: internal clock distribution IC AD9512. By default, on-board voltage regulators are selected to supply , distribution IC AD9512. One output of the AD9512 is configured to be used as a DAC clock input and a data , External clock Clock input ­ On Off On On On On On 1 Required for the AD9512. DAC , R122 External Clock and AD9512 Default OUT0 from AD9512 OUT0 from AD9512 OUT2 from AD9512 ­ , . Figure 4. AD9512 Clock Divider Setting 5. USING THE SOFTWARE FOR TESTING Set Up the DPG2 Software


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PDF UG-073 AD9114/AD9115/AD9116/AD9117 AD9714/AD9715/AD9716/AD9717 AD9114/AD9115/AD9116/AD9117 AD911x) AD9714/AD9715/AD9716/AD9717 AD971x) ADL5375 AD911x AD971x HSC-DAC-DPG-BZ R1242 UG-073 JP89 AD9716 AD9717 UG073 r154
2008 - AD9230BCPZ11-200

Abstract: hsm2812 AN501 "pin-compatible" AD9211 AD9230 AD9230-11 AN-835 ANSI-644 AD923011-200EBZ
Text: AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK 50* CMOS DRIVER OPTIONAL 0.1µF 100 , : HSM2812 Figure 24. Transformer-Coupled Differential Clock AD9510/AD9511/ AD9512 /AD9513/ AD9514 , /AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF 0.1µF CLK+ CLK 0.1µF CLOCK INPUT LVDS , /AD9511/ AD9512 /AD9513/ AD9514/AD9515 family of clock drivers offers excellent jitter performance. CLOCK INPUT CLOCK INPUT AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 07101-021 0.1µF


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PDF 11-Bit, AD9230-11 12-BIT ANSI-644 56-Lead CP-56-2) AD9230BCPZ11-200 AD923011-200EBZ1 hsm2812 AN501 "pin-compatible" AD9211 AD9230 AD9230-11 AN-835 AD923011-200EBZ
2007 - AD9230-250EBZ

Abstract: AD9211 AD9230 AD9230-170 AD9230-210 AD9230-250 AN-835 ANSI-644 0125P
Text: 50 CLOCK INPUT AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK 50 1 CMOS , sample clock input pins, as shown in Figure 56. The AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512 /AD9513/ AD9514 , . CLK­ 50 1 06002-070 CLOCK INPUT 50 1 AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 LVDS , . Single-Ended 3.3 V CMOS Sample Clock 0.1µF 501 0.1µF CLK AD9510/AD9511/ AD9512 /AD9513/ AD9514


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PDF 12-Bit, MSPS/210 MSPS/250 AD9230 12-BIT ANSI-644 170EBZ1 AD9230-210EBZ1 AD9230-250EBZ1 AD9230-250EBZ AD9211 AD9230 AD9230-170 AD9230-210 AD9230-250 AN-835 0125P
2007 - HSM2812

Abstract: AD9513 ANSI-644 AN-835 AD9230 AD9211-300 AD9211-250 AD9211-200 AD9211 AD9211BCPZ200
Text: ­1WT, 1:1Z 0.1µF XFMR 50 CLOCK INPUT AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF , ADC AD9211 06041-059 SCHOTTKY DIODES: HSM2812 CLOCK INPUT AD9510/AD9511/ AD9512 , differential PECL signal to the sample clock input pins, as shown in Figure 43. The AD9510/AD9511/ AD9512 , 44. Differential LVDS Sample Clock 06041-067 CLOCK INPUT 50* AD9510/AD9511/ AD9512 /AD9513 , Considerations 0.1µF 240 CLK 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 50* 0.1µF


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PDF 10-Bit, MSPS/250 MSPS/300 AD9211 10-BIT ANSI-644 AD9211BCPZ-200 AD9211BCPZ-2501 AD9211BCPZ-3001 HSM2812 AD9513 AN-835 AD9230 AD9211-300 AD9211-250 AD9211-200 AD9211 AD9211BCPZ200
2007 - Not Available

Abstract: No abstract text available
Text: INPUT AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK ADC 0.1µF CLKâ , /AD9511/ AD9512 /AD9513/ AD9514/AD9515 100Ω 0.1µF PECL DRIVER Figure 46. Single-Ended 3.3 V , 43. Differential PECL Sample Clock AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK , „¦ 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 240Ω CLK CMOS DRIVER If a low jitter , pins, as shown in Figure 43. The AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 family of clock drivers


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PDF 10-Bit, MSPS/250 MSPS/300 AD9211 10-BIT ANSI-644 AD9211BCPZ-200 AD9211BCPZ-2501 AD9211BCPZ-3001
2008 - Not Available

Abstract: No abstract text available
Text: INPUT AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK OPTIONAL 0.1µF 100Ω 50â , AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK 50Ω* If a low jitter clock is , shown in Figure 25. The AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLOCK INPUT , / AD9512 /AD9513/ AD9514/AD9515 0.1µF 0.1µF CLK+ CLK 0.1µF CLOCK INPUT LVDS DRIVER


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PDF 11-Bit, AD9230-11 12-BIT ANSI-644 56-Lead CP-56-2) AD9230BCPZ11-200 AD923011-200EBZ1
2006 - ad9970

Abstract: AD7763 AD7796 AD9770 AD7760 AD9460-80 AD7690 PWM32 AD9461 AD9230
Text: AD9511 1200/800/250 3 LVPECL 2 LVDS/CMOS 225 1.6GHz PLL 5 48 LFCSP AD9512


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PDF AD7294 com/jp/AD7294 AD7266 AD7400 10MSPS ad9970 AD7763 AD7796 AD9770 AD7760 AD9460-80 AD7690 PWM32 AD9461 AD9230
2008 - ADF4026

Abstract: ADATE207 SERDES 10G AD9910 AD790 adcmp605 adcmp565 AD9512 ADCMP582 ADN2814
Text: ) (MHz) AD9510 4 2 1.6 250 8 AD9511 2 1.6 250 5 AD9512 2 1.6 -


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PDF ADCMP565/ADCMP566/ ADCMP567 ADCMP561/ADCMP562/ ADCMP563/ADCMP564 ADCMP572/ADCMP573 ADCMP580/ADCMP581/ ADCMP582 ADCMP600/ADCMP601/ ADCMP602/ADCMP603 ADCMP604/ADCMP605/ ADF4026 ADATE207 SERDES 10G AD9910 AD790 adcmp605 adcmp565 AD9512 ADCMP582 ADN2814
2007 - AD9513 packaging

Abstract: No abstract text available
Text: 1 CMOS DRIVER CLK 0.1µF 0.1µF 150 RESISTOR IS OPTIONAL. AD9510/AD9511/ AD9512 /AD9513/ AD9514 , CLOCK INPUT 0.1µF CLK 501 AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 OPTIONAL 0.1µF 100 , shown in Figure 56. The AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 CLOCK INPUT 0.1µF CLK PECL , 56. Differential PECL Sample Clock CLOCK INPUT 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514


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PDF 12-Bit, MSPS/210 MSPS/250 AD9230 ANSI-644 AD9230-250 AD9230-170 AD9233-125 AD9233-105 AD9236 AD9513 packaging
2012 - Not Available

Abstract: No abstract text available
Text: GUIDE Model 1 AD9512UCPZ-EP AD9512UCPZ-EP-R7 1 Temperature Range -55°C to +85°C -55°C to +85°C , in Channel 4 of the AD9512 standard product is not supported in this AD9512-EP version. Rev. 0 , AD9512-EP FUNCTIONAL BLOCK DIAGRAM SYNCB, RESETB PDB DETECT SYNC VREF FUNCTION AD9512-EP SYNC STATUS , GENERAL DESCRIPTION The AD9512-EP provides a multi-output clock distribution in a design that emphasizes , means of a divider phase select function that serves as a coarse timing adjustment. The AD9512-EP is


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PDF Hz/250 48-lead AD9512-EP CP-48-1) AD9512UCPZ-EP AD9512UCPZ-EP-R7
2008 - Not Available

Abstract: No abstract text available
Text: AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 0.1µF CLK+ 0.1µF CLK+ CLK , sample clock input pins as shown in Figure 53. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512 , Clock CLK+ 39kΩ *50Ω RESISTOR IS OPTIONAL. CLK– AD9510/AD9511/ AD9512 /AD9513 , /AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 06980-021 For optimum performance, the


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PDF AD9239 AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 AD9239-250KITZ 72-Lead CP-72-3
2008 - pn sequence generator

Abstract: ADT1-1WT-1 6462D d45h3 D40P3 AD9239 AN-835 sine wave inverter using pic INVERTER TRANSFORMER 101 HSM2812
Text: + CLK 0.1µF CLK­ AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 LVDS DRIVER , Figure 53. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 CLK , Differential Clock 0.1µF ADC AD9239 CLK­ 0.1µF CLK+ AD9510/AD9511/ AD9512 /AD9513/ AD9514 , CLK­ CLK+ CMOS DRIVER CLK+ 0.1µF 0.1µF CLK 50* AD9510/AD9511/ AD9512 /AD9513


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PDF 12-Bit, MSPS/210 MSPS/250 AD9239 CP-72-3) AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 AD9239-250KITZ pn sequence generator ADT1-1WT-1 6462D d45h3 D40P3 AD9239 AN-835 sine wave inverter using pic INVERTER TRANSFORMER 101 HSM2812
2009 - Not Available

Abstract: No abstract text available
Text: RESISTORS ARE OPTIONAL. Figure 44. Differential PECL Sample Clock AD9510/AD9511/ AD9512 /AD9513/ AD9514 , clock input pins as shown in Figure 44. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512 /AD9513/ AD9514 , Figure 43. Transformer-Coupled Differential Clock CLK+ AD9510/AD9511/ AD9512 /AD9513/ AD9514 , OPTIONAL 100 CMOS DRIVER 0.1µF ADT1-1WT, 1:1Z 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514


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PDF 12-Bit, MSPS/210 AD9639 AD9639BCPZ-170 AD9639BCPZRL-170 AD9639BCPZ-210 AD9639BCPZRL-210 AD9639-210KITZ 72-Lead
2008 - 6462D

Abstract: AD9239BCPZ-210 AN-835
Text: + CLK 0.1µF CLK­ AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 LVDS DRIVER , Figure 53. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 CLK , Differential Clock 0.1µF ADC AD9239 CLK­ 0.1µF CLK+ AD9510/AD9511/ AD9512 /AD9513/ AD9514 , CLK­ CLK+ CMOS DRIVER CLK+ 0.1µF 0.1µF CLK 50* AD9510/AD9511/ AD9512 /AD9513


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PDF 12-Bit, MSPS/210 MSPS/250 AD9239 CP-72-3) AD9239BCPZ-170 AD9239BCPZ-2101 AD9239BCPZ-2501 AD9239-250KITZ1 6462D AD9239BCPZ-210 AN-835
2007 - NRC10ZOTRF

Abstract: HSM2812 d07100011 NC7WZ07P6 balun transformer JOHNSON142 AN-835 AD9626 AD9601-250 AD9601-200
Text: 0.1µF XFMR 50 CLOCK INPUT AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK 50 , 0.1µF 07100-011 SCHOTTKY DIODES: HSM2812 CLOCK INPUT AD9510/AD9511/ AD9512 /AD9513 , Sample Clock AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK+ CLK 100 0.1µF CLK 50 , DRIVER Clock Duty Cycle Considerations 0.1µF 240 CLK 0.1µF AD9510/AD9511/ AD9512 , AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 family of clock drivers offers excellent jitter performance


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PDF 10-Bit, MSPS/250 AD9601 56-Lead CP-56-2) AD9601BCPZ-200 AD9601BCPZ-2501 AD9601-250EBZ1 NRC10ZOTRF HSM2812 d07100011 NC7WZ07P6 balun transformer JOHNSON142 AN-835 AD9626 AD9601-250 AD9601-200
2006 - Not Available

Abstract: No abstract text available
Text: DIODES: HSM2812 AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK– CLK 50Ω1 , shown in Figure 41. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK– 150â , Sample Clock AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 0.1µF CLK+ CLK– CLK+ LVDS , . Mini-Circuits® ADT1-1WT, 1:1Z 0.1µF XFMR 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515


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PDF 14-Bit, AD9252 AD9252 AN-877
2008 - Not Available

Abstract: No abstract text available
Text: / AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 0.1µF CLK+ 0.1µF CLK+ CLK 0.1µF CLKâ , Figure 53. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 , „¦ RESISTOR IS OPTIONAL. CLK– AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 ADC , + OPTIONAL 100Ω 0.1µF 0.1µF 0.1µF 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515


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PDF AD9239 AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 AD9239-250KITZ 72-Lead CP-72-3
2009 - AD9639

Abstract: s31 schottky diode mdac s29 JESD204 radar AD9516 generic Packaging Top Mark LFCSP JESD204 AN-835 AN-827 proportional controller 2812
Text: PECL Sample Clock AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 0.1µF CLK , pins as shown in Figure 44. The AD9510/ AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter performance. AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 , 43. Transformer-Coupled Differential Clock CLK+ AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515 , /AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 07973-021 For optimum performance, the


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PDF 12-Bit, MSPS/210 AD9639 endP-72-3) AD9639BCPZ-170 AD9639BCPZRL-170 AD9639BCPZ-210 AD9639BCPZRL-210 AD9639-210KITZ AD9639 s31 schottky diode mdac s29 JESD204 radar AD9516 generic Packaging Top Mark LFCSP JESD204 AN-835 AN-827 proportional controller 2812
2008 - Not Available

Abstract: No abstract text available
Text: /AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 0.1µF CLK+ 0.1µF CLK+ CLK 0.1µF , * AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 0.1µF Another option is to ac-couple , / AD9511/ AD9512 /AD9513/AD9514/AD9515/AD9516/AD9518 family of clock drivers offers excellent jitter , €“ 0.1µF ADC AD9239 AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518 CLK+ CLK , DRIVER CLK+ 50 0.1µF AD9510/AD9511/ AD9512 /AD9513/ AD9514/AD9515/ AD9516/AD9518


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PDF 12-Bit, MSPS/210 MSPS/250 AD9239 AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 AD9239-250KITZ 72-Lead
Supplyframe Tracking Pixel