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Part Manufacturer Description Datasheet Download Buy Part
LTC1643AHCGN#TR Linear Technology LTC1643A - PCI-Bus Hot Swap Controller; Package: SSOP; Pins: 16; Temperature Range: 0°C to 70°C
LTC4242CG Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
LTC1643AL-1CGN#TRPBF Linear Technology LTC1643A - PCI-Bus Hot Swap Controller; Package: SSOP; Pins: 16; Temperature Range: 0°C to 70°C
LTC4242CUHF#PBF Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: QFN; Pins: 38; Temperature Range: 0°C to 70°C
LTC4242CG#TR Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
LTC1643AL-1IGN#PBF Linear Technology LTC1643A - PCI-Bus Hot Swap Controller; Package: SSOP; Pins: 16; Temperature Range: -40°C to 85°C

Xilinx PCI logicore Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1999 - "Data Acquisition"

Abstract: XILINX EEprom Xilinx PCI logicore "Video RAM" XC4013 XC4013E
Text: data acquisition board for one of our customers, based on the XC4013E FPGA and a Xilinx PCI LogiCORE , adjusted to your changing needs without even opening your computer. We chose a Xilinx PCI LogiCORE , built in less than 6 weeks. Thanks to the Xilinx PCI LogiCORE and our own hardware and software PCI , development of Xilinx FPGA/CPLD for video, telecom, PCI and other applications where speed and/or density is , CUSTOMER SUCCESS STORY PCI A Acquisition Board Using the XC4013 A unique PCI bus data


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PDF XC4013 XC4013E 40MHz. "Data Acquisition" XILINX EEprom Xilinx PCI logicore "Video RAM" XC4013
1999 - XCV300

Abstract: XCV800 DMA engine
Text: (running on Windows 95/98 and Windows NT) and the Spartan firmware handles the following operations: PCI Interfacing through the Xilinx PCI LogiCORE . PCI Master DMA Engine capable of burst transfers. Two , of standard modules.) allatech Ltd. has released the first PCI card, called Ballynuey, that uses , to the PCI bus without hindering the functions that are implemented in the Virtex FPGA. Operation The card uses a Xilinx Spartan device, preprogrammed to interface between the software on the PC


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1998 - REQ64

Abstract: "tape storage"
Text: limited only by the depth of the FIFO. Some Xilinx PCI LogiCORE customers have achieved PCI bandwidth of , and giving valuable suggestions, and to thank Xilinx PCI LogiCORE team member Eric Crabill for , ", Computer magazine " PCI Local Bus Specification", 1995 (Revision 2.1) Xilinx , " LogiCore PCI Master and , Approaching PCI Bandwidth Limits with FPGAs Jayant Mittal, Xilinx Inc. Introduction Embedded , of these issues. In the end, we will elaborate on how the Xilinx PCI core addresses some of the key


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PDF 32-bit REQ64 "tape storage"
1997 - XC95288 equivalent

Abstract: socket cpld plcc 44 pins
Text: design, including the LogiCORE module. For example, user-specific PCI designs can be implemented very cost-effectively for high-volume production using the Xilinx PCI LogiCORE module and HardWire ASIC devices. A , HardWire ASIC + LogiCORE = Reduced Time-to-Volume by RICK PADOVANI x Marketing Director , , pioneered by Xilinx in 1989, has gained broad market acceptance. Xilinx FPGA-to-HardWire ASIC migration , has the option of requesting a HardWire conversion from Xilinx , leaving no gap between development


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2001 - programming for embedded systems theory and applications

Abstract: xcv18
Text: reconfiguration), Chipscope ILA (giving built-in logic analyzer capability), Xilinx PCI LogiCORE development (for , using the Xilinx 32-bit PCI LogiCORE or an in house PCI core. Support for 3.3V and 5V PCI is , -seat laboratory for teaching undergraduates digital design and has been using Xilinx FPGAs since 1989. PCI , New Products Development Tools Strathnuey - The Xilinx Technologies Integrator An entry level PCI card with DIME slot capability using Spartan-II FPGAs. by Derek McAulay Design Engineer


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PDF 32-bit XCV1800 programming for embedded systems theory and applications xcv18
1999 - XC4000E

Abstract: Xilinx PCI logicore
Text: Designs. It can be associated with any version of Xilinx PCI LogiCORE (because it fits in the Userapp , can use it in a separate board (any type of PCI board using the Xilinx PCI Interface) or include it , synchronization output can be added very easily. Anna-Liz works with any Xilinx LogiCOREbased PCI interface. It , NEW PRODUCTS - CORES Anna-Liz A New Core for Debugging PCI Designs A new PCI core that , postmortem analysis. by Edgard Garcia, Xilinx Consultant, Multi Video Designs


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PDF 33-MHz XC4000E Xilinx PCI logicore
1998 - Not Available

Abstract: No abstract text available
Text: verification. By using a pre-designed PCI interface core, with predictable timing (such as Xilinx LogiCORE , Using a pre-verified Xilinx PCI LogiCORE can save you a lot of time and effort. These cores have been , design. x products. By implementing your PCI design in a Xilinx FPGA, the hardware can easily be , Verifying PCI Designs We take you to the leaders. HDL VERIFICATION SPECIAL SECTION by Nupur Shah, Design Engineer, nupur@xilinx.com Your PCI design must be PCI compliant to work along with


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2000 - conclusion of programmable logic circuit

Abstract: xilinx silicon device
Text: , scalable functions. One of the most popular cores is the Xilinx PCI LogiCore , currently offered as both , N. Willert, Software Marketing Manager, Xilinx , cnw@xilinx.com ith the rapid adoptation of deepsubmicron process technology in the design of FPGAs, Xilinx is now able to provide you with a , in the Xilinx development systems, including HDL optimized flows, timing driven layout, core (intellectual property) design and integration, and a comprehensive suite of verification tools. Xilinx


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1997 - Xilinx PCI logicore

Abstract: xilinx xact viewlogic interface user guide XC4000E XC4013E Signal Path Designer VHDL code for pci
Text: place logic in the most optimal manner possible around the core. The Xilinx PCI LogiCORE module is an , . LogiCORE PCI is included in Xilinx complete PCI solutions for designing a customized single- Design , systems. The LogiCORE PCI Master/Target core is a 32 bit, 33 MHz interface optimized for Xilinx XC4000E , match the Xilinx FPGA architecture. April 9, 1997 5 FIGURE 3. LogiCORE PCI Block Diagram , example, for the Xilinx PCI core, the user application design should derive clock and active high reset


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1999 - vhdl code Wallace tree multiplier

Abstract: 8 bit wallace tree multiplier verilog code 16 bit wallace tree multiplier verilog code XILINX vhdl code REED SOLOMON encoder de virtex 5 fpga based image processing analog to digital converter vhdl coding vhdl code for Wallace tree multiplier block diagram 8x8 booth multiplier EMPOWER 1164 MAX7000S
Text: firmware handles the following operations: PCI Interfacing through the Xilinx PCI LogiCORE . PCI Master , . 26 A PCI Board . 27 Xilinx 1.5 vs. Altera 9.01 . 28 CPLD Power Sequencing , Logic, Xilinx is broadening the appeal of this exciting technology. Compaqs PCI Development Platform , Xilinx FPGA-based PCI Development Platform in the development of JBits and ChipScope tools, saving them , Registers SUCCESS STORIES Using the Verilog Flow NEWS BRIEFS Xilinx Achieves 1GHz Performance


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1997 - ict flexacom analyzer

Abstract: Xilinx PCI logicore FR-hel v309 gr228x
Text: of the design, including the LogiCORE module. For example, user-specific PCI designs can be implemented very cost-effectively for high-volume production using the Xilinx PCI LogiCORE module and HardWire , Xilinx Shipping Cadence Interface . 13 CORE Generator for PCI . 14 DSP CORE Generator , most-accurate information on our LogiCORE products, including the new PCI CORE Generator (see page 14). the , Xilinx "What's New" page to keeping you abreast on PCI developments throughout the industry. Furthermore


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1997 - gr228x

Abstract: LEAPER-10 XC1765D LEAPER-10 driver leaper-10 CABLE FLEX-700 ic remote control bas 408 Micromaster automatic visitor counter system circuit diagram HI-LO ALL-07
Text: design, including the LogiCORE module. For example, user-specific PCI designs can be implemented very cost-effectively for high-volume production using the Xilinx PCI LogiCORE module and HardWire ASIC devices. A , support users of the LogiCORE PCI module, the CORE Generator will be extended to support other Xilinx , a current LogiCORE PCI user, register today. The LogiCORE VIP Lounge also is the site of the , . The XC4000E-1 device expands the power of the LogiCORE PCI design solution. This performance


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PDF XC4000E-1 XC95288 gr228x LEAPER-10 XC1765D LEAPER-10 driver leaper-10 CABLE FLEX-700 ic remote control bas 408 Micromaster automatic visitor counter system circuit diagram HI-LO ALL-07
1998 - displaytech 204 A

Abstract: ieee floating point multiplier vhdl future scope PLDS DVD V7 cnc schematic XCS20-3TQ144 cnc controller n735 Esaote vhdl projects abstract and coding abstract on mini ups system
Text: ­ to the product that's on the drawing board. The Xilinx LogiCORE PCI interface illustrates one , design process, Xilinx provides fully proven and predictable PCI cores ( LogiCORE PCI ) that can be integrated into your design using the standard Xilinx implementation tools. LogiCORE PCI products use Xilinx , Xilinx , Inc. Spartan, Virtex, HardWire, Alliance Series, Foundation Series, AllianceCORE, LogiCORE , , and Off-the-shelf products. x Xilinx 7 FPGA CUSTOMER SUCCESS STORY PCI Reconfigurable


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PDF XC95144 XC9500 XLQ398 displaytech 204 A ieee floating point multiplier vhdl future scope PLDS DVD V7 cnc schematic XCS20-3TQ144 cnc controller n735 Esaote vhdl projects abstract and coding abstract on mini ups system
1997 - xilinx vhdl code

Abstract: VHDL code for pci verilog code for pci pci initiator in verilog pci verilog code PQ208 XC4013E address generator logic vhdl code
Text: PCI The CORE Generator tool for PCI enables customization of the features of Xilinx LogiCORE PCI , necessary to implement the LogiCORE PCI Interface in the FPGA. Part number LC-DI-PCIS-C Xilinx , Supports LogiCORE PCI Master and Slave Interfaces Fully 2.1 PCI compliant 32 bit, 33MHz PCI Interface , Java-enabled Web browser Extensive on-line help For more information on LogiCORE PCI Master and Slave , methodology, see separate application Using preimplemented LogiCORE PCI Interfaces with VHDL and Verilog


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PDF 33MHz XC4000-series xilinx vhdl code VHDL code for pci verilog code for pci pci initiator in verilog pci verilog code PQ208 XC4013E address generator logic vhdl code
1997 - 6232 RAM

Abstract: vhdl code for parity checker XC4000E PQ208 PQ160 HQ240 HQ208 xilinx logicore fifo generator 6.2 vhdl code for 6 bit parity generator XC4013EPQ160
Text: . Available on Xilinx Home Page, in the LogiCORE PCI VIP Lounge: www.xilinx.com/products/ logicore , the Xilinx Documents section). Ping Reference Design The Xilinx LogiCORE PCI "PING" Application , More PCI related information is available on Xilinx Web: www.xilinx.com/products/ logicore /logicore.htm , BEFORE USING THE XILINX LOGICORE PCI MASTER INTERFACE OR PCI SLAVE INTERFACE DESIGN, BY USING THE XLINX , . (" XILINX ") hereby grants you a nonexclusive, nontransferable license to use the LOGICORE PCI MASTER/SLAVE


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PDF 33MHz XC4000E 6232 RAM vhdl code for parity checker PQ208 PQ160 HQ240 HQ208 xilinx logicore fifo generator 6.2 vhdl code for 6 bit parity generator XC4013EPQ160
2003 - 3S1000FG456-4C

Abstract: PCI64 vhdl code for 8 bit parity generator vhdl code for parity checker 2-S200
Text: . General Description The LogiCORE PCI Interface is a preimplemented and fully tested module for Xilinx , Smart-IP technology is incorporated in every LogiCORE PCI Interface. Xilinx Smart-IP technology leverages , Facts With the Xilinx LogiCORETM PCI Interface, a designer can build a customized PCI 2.3 , Xilinx provides technical support for this LogiCORE product when used as described in the Design Guide , result, LogiCORE PCI products minimize your product development time. The core meets the setup, hold


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PDF PCI64 DS205 64-bit, 32-bit 64/32-bit PCI64/33 3S1000FG456-4C vhdl code for 8 bit parity generator vhdl code for parity checker 2-S200
2002 - PCI64

Abstract: verilog hdl code for parity generator
Text: Sheet, v3.0.100 LogiCORE Facts With the Xilinx LogiCORE PCI Interface, a designer can build a , APPLICATION The LogiCORE PCI Interface is a preimplemented and fully tested module for Xilinx FPGAs. The , PCI Implementation Guide Web-based User Constraint File Generator tool · · 89 Xilinx , , repeatability, and flexibility in PCI designs. The Smart-IP technology is incorporated in every LogiCORE PCI , file generator. Any applications that need a PCI interface Functional Description The LogiCORE


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PDF PCI64 64/32-bit, DO-DI-PCI64-IP 64-bit verilog hdl code for parity generator
2003 - vhdl code for parity checker

Abstract: SPARTAN 6 Configuration transistor 6c x verilog hdl code for parity generator Spartan-II pin details vhdl code for 9 bit parity generator 2S200EPQ208-6C Virtex 5 for Network Card 2s200pq208-5 PCI32
Text: , v3.0.106 LogiCORE Facts With the Xilinx LogiCORETM PCI Interface, a designer can build a , . The LogiCORE PCI Interface is a preimplemented and fully tested module for Xilinx FPGAs. The pinout , designs. The Smart-IP technology is incorporated in every LogiCORE PCI interface. Xilinx Smart-IP , Xilinx provides technical support for this LogiCORE product when used as described in the Design Guide , . Functional Description The LogiCORE PCI Interface is partitioned into five major blocks and a user


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PDF PCI32 DS206 32-bit, 32-bit 64/32-bit PC32/33 vhdl code for parity checker SPARTAN 6 Configuration transistor 6c x verilog hdl code for parity generator Spartan-II pin details vhdl code for 9 bit parity generator 2S200EPQ208-6C Virtex 5 for Network Card 2s200pq208-5
1996 - verilog code for routing table

Abstract: VHDL code for pci xilinx vhdl code verilog code for pci Master/Target PCI VHDL Core
Text: LogiCORE PCI Interfaces with VHDL and Verilog. Xilinx LogiCORE Required Development Tools Required PCI Interface v 1.1 Xilinx CORE Generator [http://www.xilinx.com/products/ logicore /logicore.htm , customized version of the LogiCORE PCI Interface with the Xilinx CORE Generator. Select and download the , ® Using pre-implemented LogiCORE PCI Interfaces with VHDL and Verilog March 1997 (Version 1.2ed , available at the Xilinx LogiCORE VIP Lounge: Introduction . . . . . . . . . . . . . . . . . . . . . . . .


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1996 - Delco Electronics

Abstract: XC6200 XC4000E XC4013 XC4013E LogiCore Xilinx PCMCIA delco
Text: PRODUCT INFORMATION - DEVELOPMENT SYSTEMS PCI Interface is First New LogiCore Module into , specification and to optimize and verify the design. With LogiCore modules, Xilinx is doing the tough work for you (now for PCI , to be followed soon by several other applications). The LogiCore program supplies , their unique system functions. The first LogiCore module is a fullycompliant, 32-bit PCI interface for , module, and 17 PCI board designs have been completed using the beta version. "We chose Xilinx modules


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PDF 100MB Delco Electronics XC6200 XC4000E XC4013 XC4013E LogiCore Xilinx PCMCIA delco
1996 - XC4000E FPGAs

Abstract: Xilinx XC4013E-3PQ208C XC4000 XC4000E XC4013E3PQ208C XC4013E-3PQ208C IBM PC AT schematics Xilinx PCI logicore XILINX/XC4000E
Text: book : cover 1 Wed Jul 3 10:56:20 1996 R Release Document Xilinx LogiCore PCI , :56:20 1996 LogiCore PCI Interface Xilinx Development System book : booktoc.doc iii Wed , Introduction Welcome to the LogiCore PCI Interface from Xilinx ! The Xilinx LogiCore PCI Interface provides , documentation is included with your Xilinx LogiCore PCI Interface product. · LogiCore PCI Interface User's Guide (Version 1.0) · Xilinx LogiCore PCI Interface Release Note LogiCore PCI Interface -


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PDF Support8-879-4442 XC4000E FPGAs Xilinx XC4013E-3PQ208C XC4000 XC4000E XC4013E3PQ208C XC4013E-3PQ208C IBM PC AT schematics Xilinx PCI logicore XILINX/XC4000E
2003 - XC2S150pq208

Abstract: xc2s50-pq208 XCV1000EFG680-6C XC2S150PQ208-5C XCV300BG432 XC2S300EPQ208-6C 2S50E-PQ208-6C XC2S200ePQ208 XC3S1000-FG456-4C xcv1000efg680
Text: flexibility in PCI designs. The Smart-IP technology is incorporated in every LogiCORE PCI interface. Xilinx , .0.116 Introduction With the Xilinx LogiCORETM PCI Interface, a designer can build a customized, fully PCI 2.3 , compliant Any applications that need a PCI interface PCI32/33 General Description The LogiCORE PCI , logic in the FPGA and on the system-level design. As a result, LogiCORE PCI products minimize your , . Xilinx provides technical support for this LogiCORE product when used as described in the Design Guide


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PDF PCI32 DS206 32-bit, 32-bit 64/32-bit PC32/33 XC2S150pq208 xc2s50-pq208 XCV1000EFG680-6C XC2S150PQ208-5C XCV300BG432 XC2S300EPQ208-6C 2S50E-PQ208-6C XC2S200ePQ208 XC3S1000-FG456-4C xcv1000efg680
1999 - ram memory testbench vhdl code

Abstract: XCV300BG432 verilog code for 64 32 bit register verilog code for pci to pci bridge CODE VHDL TO ISA BUS INTERFACE LC003 vhdl code for 3 bit parity checker VHDL ISA BUS
Text: : http://www.xilinx.com/ pci Introduction With Xilinx LogiCORE PCI64 Virtex Master and Slave interface , incorporated in every LogiCORE PCI Core. Xilinx Smart-IP technology leverages the Xilinx architectural , to fit unique system requirements by using Xilinx web-based PCI configuration tool or by changing the , . The Block SelectRAM+ can be used to create deep FIFOs. Bandwidth Xilinx LogiCORE PCI64 Interface , the critical PCI timing. The flexible Xilinx backend, combined with support for many different PCI


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PDF PCI64 66MHz 64-bit, ram memory testbench vhdl code XCV300BG432 verilog code for 64 32 bit register verilog code for pci to pci bridge CODE VHDL TO ISA BUS INTERFACE LC003 vhdl code for 3 bit parity checker VHDL ISA BUS
2002 - 80C31 instruction set

Abstract: XC2S200 pq208 xilinx fifo generator 6.2 design BCD adder pal application of 8259 microcontroller adder xilinx MC68000 opcodes AX1610 hitachi pbx dvb-RCS modem
Text: Digital Digital Digital Digital Digital Xilinx Xilinx Xilinx Xilinx IP Type LogiCORE AllianceCORE , Controller Xilinx LogiCORE OPB IPIF Master/Slave Attachment Xilinx LogiCORE OPB IPIF Address Decode Xilinx LogiCORE OPB IPIF Interrupt Controller Xilinx LogiCORE OPB IPIF Read/Write Packet FIFO Xilinx LogiCORE OPB IPIF DMA Xilinx LogiCORE OPB IPIF Scatter/Gather Xilinx LogiCORE OPB Memory Interface (Flash, SRAM) Xilinx LogiCORE OPB SRAM Xilinx LogiCORE OPB Timer/Counter Xilinx LogiCORE OPB UART (16450, 16550) Xilinx


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PDF 8b/10b DO-DI-ADPCM32) DO-DI-ADPCM64) CC-201) CC-200) CRC10 CC-130) CRC32 CC-131) 80C31 instruction set XC2S200 pq208 xilinx fifo generator 6.2 design BCD adder pal application of 8259 microcontroller adder xilinx MC68000 opcodes AX1610 hitachi pbx dvb-RCS modem
2000 - verilog code for pci express memory transaction

Abstract: pci to pci bridge verilog code verilog code for pci express PAR64 LogiCore vhdl code for memory card pci initiator in verilog PCI64 PCI32 ram memory testbench vhdl code
Text: flexibility in PCI designs. The Smart-IP technology is incorporated in every LogiCORE PCI core. Xilinx , PCI Card using Xilinx FPGAs Application Note. Functional Description The LogiCORE PCI64 Master , ://www.xilinx.com Introduction With Xilinx LogiCORE PCI64 Spartan-II interface, a designer can build a , Incorporates Xilinx Smart-IP Technology Universal PCI support in Spartan-II 3.3 V and 5 V operation at 0-33 , Reference Design, Synthesizable Asynchronous PCI FIFO Design Tool Requirements Xilinx Core Tools: 2.1i


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PDF PCI64 64-bit, verilog code for pci express memory transaction pci to pci bridge verilog code verilog code for pci express PAR64 LogiCore vhdl code for memory card pci initiator in verilog PCI32 ram memory testbench vhdl code
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