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XRT7300IV-F Exar Corporation PCM Transceiver, 1-Func, E-3, BICMOS, PQFP44, 10 X 10 MM, 1.40 MM HEIGHT, TQFP-44
XRT7300IVTR-F Exar Corporation IC LIU E3/DS3/STS-1 SGL 44TQFP
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XRT7300 datasheet (9)

Part Manufacturer Description Type PDF
XRT7300 Exar E3-DS3-STS-1 LINE INTERFACE UNIT Original PDF
XRT7300 Exar DS3-E3-STS-1 Line Interface Unit Original PDF
XRT7300IV Exar E3/DS3/STS-1 LINE INTERFACE UNIT Original PDF
XRT7300IV Exar E3/DS3/STS-1 LINE INTERFACE UNIT Original PDF
XRT7300IV-F Exar Interface - Telecom, Integrated Circuits (ICs), IC LIU E3/DS3/STS-1 SGL 44TQFP Original PDF
XRT7300IVTR Exar Interface - Telecom, Integrated Circuits (ICs), IC LIU E3/DS3/STS-1 SGL 44TQFP Original PDF
XRT7300IVTR-F Exar Interface - Telecom, Integrated Circuits (ICs), IC LIU E3/DS3/STS-1 SGL 44TQFP Original PDF
XRT7300lV Exar DS3/E3/STS-1 Line Interface Unit Scan PDF
XRT7300lV Exar E3/DS3/STS-1 Line Interface Unit Scan PDF

XRT7300 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1999 - Not Available

Abstract: No abstract text available
Text: XRT7300 E3/DS3/STS-1 Line Interface Unit January 2000 FEATURES l Single-chip Transmit and , ) GENERAL DESCRIPTION The XRT7300 E3/DS3/STS-1 Transceiver device is a fully integrated transmitter and receiver Line Interface Unit (LIU) that is intended for E3, DS3 or SONET STS-1 applications. The XRT7300 E3 , INFORMATION Part No. XRT7300IV Package 44 Pin TQFP (10mm x 10mm) Operating Temperature Range -40°C to , ) 668-7017 · www.exar.com XRT7300 In the Transmit Direction l l l Accepts timing and single


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE
1999 - Not Available

Abstract: No abstract text available
Text: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and , ) GENERAL DESCRIPTION The XRT7300 E3/DS3/STS-1 Transceiver device is a fully integrated transmitter and receiver Line Interface Unit (LIU) that is intended for E3, DS3 or SONET STS-1 applications. The XRT7300 E3 , INFORMATION Part No. XRT7300IV Package 44 Pin TQFP (10mm x 10mm) Operating Temperature Range -40°C to , ) 668-7017 · www.exar.com XRT7300 In the Transmit Direction l l l Accepts timing and single


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE
2000 - XRT7300IV

Abstract: HDB3 schematic 0X00 GR-253-CORE GR-499-CORE XRT7300 HDB3 coaxial link LINE25 13E312
Text: . 1 Figure 1.Block Diagram of the XRT7300. , XRT7300. Setting this pin to "High" disables the Line Build-Out circuit. In this mode, the XRT7300 , this input pin "High" disables the Internal Receive Equalizer in the XRT7300. Setting this pin "Low" , áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2000 REV. 1.0.6 GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS


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PDF XRT7300 XRT7300 XRT7300IV HDB3 schematic 0X00 GR-253-CORE GR-499-CORE HDB3 coaxial link LINE25 13E312
CA94538

Abstract: XRT7300 XRT7300IV
Text: "TAOS" input pin "low". When the XRT7300device is operating in the "Host" Mode. If the XRT7300 device , Preliminary XRT7300 DS3/E3/STS-1 Line Interface Unit October 1998-1 FEATURES â , XRT7300 E3/DS3/STS-1 Transceiver IC is a single chip device that does the following functions. (See page 2) ORDERING INFORMATION Part No. Package Operating Temperature Range XRT7300IV 44 Pin TQFP (10mm x 10mm) -40 , €¢ FAX (510) 668-7017 This Material Copyrighted By Its Respective Manufacturer XRT7300 ZTEXAR In


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) CA94538 XRT7300 XRT7300IV
GR-253-CORE

Abstract: GR-499-CORE PE-65966 PE-65967 PE-68629 T3001 XRT7300 XRT7300IV
Text:  XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES • Single-chip , €¢ Fiber Optic Terminals • Multiplexers GENERAL DESCRIPTION The XRT7300 E3/DS3/STS-1 Transceiver , , DS3 or SONET STS-1 applications. The XRT7300 E3/DS3/STS-1 Transceiver IC is a single-chip device that , XRT7300IV 44 Pin TQFP (10mm x 10mm) -40°Cto +85 °C Rev. 1.02 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com XRT7300 EXflR In the Transmit


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE XRT7300 XRT7250 GR-253-CORE PE-65966 PE-65967 PE-68629 T3001 XRT7300IV
rur 450

Abstract: GR-253-CORE GR-499-CORE T3001 XRT7250 XRT7300
Text: TAN-19 Application Note ­ Considerations for Designing the XRT7250 and XRT7300 Device in a DS3 , XRT7250 and XRT7300 Devices in a DS3 Line Card Application 1 TAN-19 Application Note ­ Considerations for Designing the XRT7250 and XRT7300 Device in a DS3 Line Card Rev. 1.00 Application (Preliminary) April 7, 2000 Considerations for Designing the XRT7250 and XRT7300 Devices in a DS3 Line , . 3 1.1 A BRIEF DESCRIPTION OF THE XRT7300 DS3/E3/STS-1 LIU IC


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PDF TAN-19 XRT7250 XRT7300 XRT7300 rur 450 GR-253-CORE GR-499-CORE T3001
2001 - d1n752

Abstract: Zener Diode 7v 400mW Zener Diode 5,6v 400mW D1N75 DMO11 1812GC102KA11A 1812GC102KAT2A Zener Diode 7 10v 400mW XRT7300 5.6v zener diode 400mw
Text: any impedance (an inductor or ferrite bead) between analog and digital ground pins of XRT7300. 3.0 , TAN-017 Application Note - XRT7300 DS3/E3/STS-1 LIU IC Power Conditioning Requirements May 23, 2001 Revision 1.02 XRT7300 DS3/E3/STS-1 LIU Power Conditioning Requirements 1.0 OVERVIEW XRT7300 , multi-standard Networking and Transmission Systems. The XRT7300 device is a mixed signal device that supports , performance of the XRT7300 device. In particular, the user's PCB layout and handling of the VDD and GND


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PDF TAN-017 XRT7300 1210-682J 4922-15L d1n752 Zener Diode 7v 400mW Zener Diode 5,6v 400mW D1N75 DMO11 1812GC102KA11A 1812GC102KAT2A Zener Diode 7 10v 400mW 5.6v zener diode 400mw
2001 - 0X00

Abstract: GR-253-CORE GR-499-CORE XRT7300 XRT7300IV
Text: . 1 Figure 1.Block Diagram of the XRT7300. , XRT7300. Setting this pin to "High" disables the Line Build-Out circuit. In this mode, the XRT7300 , this input pin "High" disables the Internal Receive Equalizer in the XRT7300. Setting this pin "Low" , áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT FEBRUARY 2002 REV. 1.1.1 FEATURES · Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line


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PDF XRT7300 XRT7300 0X00 GR-253-CORE GR-499-CORE XRT7300IV
Not Available

Abstract: No abstract text available
Text: description of the features associated with the XRT7300device. 1.0 Selecting the Data Rate The XRT7300 , XRT7300device is operating in Vie "Host" Mode. If the XRT7300 device is operating in the "Host" Mode, then , P re lim in a ry JP E X 4R XRT7300 DS3/E3/STS-1 Line Interface Unit October 1998-1 , Equipment · PCM Test Equipment · Fiber Optic Terminals · Multiplexers G EN ERAL DESCRIPTION The XRT7300 , that is intended for DS3, E3 or SONET STS-1 applications. The XRT7300 E3/DS3/STS-1 Trans ceiver IC is a


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps)
all ic data

Abstract: "Line Interface" XRT7250 XRT7250IQ XRT7300
Text: intended to drive the TCLK input on the XRT7300 output to the Line Interface IC, along with the TxPOS and , connected to the XRT7300 DS3/E3 Line Interface IC) This output pin is intended to be connected to the Encodis input pin of the XRT7300 DS3/E3 Line Interface IC (provided that XRT7300 device is operating in , toggle "high" then it will disable the B3ZS/HDB3 encoder circuitry within the XRT7300 IC. Conversely, if , XRT7300 IC will be enabled. Writing a "1" to Bit 3 of the Line Interface Driver Register (Address = 84h


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PDF XRT7250 all ic data "Line Interface" XRT7250 XRT7250IQ XRT7300
2001 - 225feet

Abstract: No abstract text available
Text: . 1 Figure 1.Block Diagram of the XRT7300. , is used to enable or disable the Transmit Line Build-Out circuit in the XRT7300. Setting this pin to , Input: Setting this input pin "High" disables the Internal Receive Equalizer in the XRT7300. Setting , XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT MAY 2011 REV. 1.1.2 GENERAL DESCRIPTION The XRT7300 , consists of a line transmitter and receiver integrated on a single chip. XRT7300 can be configured to


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PDF XRT7300 XRT7300 225feet
1999 - Not Available

Abstract: No abstract text available
Text: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and , ) GENERAL DESCRIPTION The XRT7300 E3/DS3/STS-1 Transceiver device is a fully integrated transmitter and receiver Line Interface Unit (LIU) that is intended for E3, DS3 or SONET STS-1 applications. The XRT7300 E3 , INFORMATION Part No. XRT7300IV Package 44 Pin TQFP (10mm x 10mm) Operating Temperature Range -40°C to , ) 668-7017 · www.exar.com XRT7300 In the Transmit Direction l l l Accepts timing and single


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE
2000 - Not Available

Abstract: No abstract text available
Text: bus. "Transmit All Ones Signal" (TAOS) Command (for the XRT7300 LIU IC). This output pin is intended to be connected to the TAOS input pin of the XRT7300 LIU IC. The user can control the state of this , If the user commands this signal to toggle "high" then it will force the XRT7300 DS3 Line Transmitter , signal to toggle "low" then the XRT7300 DS3 Line Transmitter IC will proceed to transmit data based upon , bit-field will cause this output pin to toggle "low". NOTE: If the customer is not using the XR-T7300 LIU IC


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PDF XRT72L71 XRT72L71
2000 - Not Available

Abstract: No abstract text available
Text: XRT7300 DS3/E3 Line Interface Unit IC): This output pin is intended to be connected to the Encodis input pin of the XRT7300 DS3/E3 Line Interface Unit IC. The user can control the state of this output pin by , the XRT7300 IC. Conversely, if the user commands this output signal to toggle "low", then the B3ZS/HDB3 Encoder circuitry, within the XRT7300 IC will be enabled. Writing a "1" to Bit 3 of the Line , encoder (within the XRT7300 IC) if the XRT72L50 Framer IC has been configured to operate in the B3ZS/ HDB3


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PDF XRT72L50 XRT72L50, XRT72L50 DS3-M13,
2000 - AA23

Abstract: GR-499-CORE XRT72L74IB XRT7300
Text: Local Loop-back Output Pin (to the XRT7300 E3/DS3/STS-1 LIU IC): This output pin is intended to be connected to the LLOOP input pin of the XRT7300 LIU IC. The user can command this signal to toggle "high" , XRT7300 LIU IC's operation during Local Loop-back, please see the XRT7300 E3/DS3/STS-1 LIU IC Data Sheet , "low". NOTE: If the user is not using the XRT7300 E3/DS3/STS-1 LIU IC, then he/ she can use this output , _1 O Encoder (B3ZS) Disable Output pin (intended to be connected to the XRT7300 E3/DS3/STS-1 LIU IC


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PDF XRT72L74 XRT72L74 AA23 GR-499-CORE XRT72L74IB XRT7300
2000 - Not Available

Abstract: No abstract text available
Text: is used to enable or disable the Transmit Line Build-Out circuit in the XRT7300. Setting this pin to , in the XRT7300. Setting this pin "Low" enables the Internal Receive Equalizer. The guidelines for , áç JUNE 2000 XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT REV. 1.0.5 GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip. XRT7300 can be configured to


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PDF XRT7300 XRT7300
2000 - Not Available

Abstract: No abstract text available
Text: . 1 Figure 1.Block Diagram of the XRT7300. , input pin is used to enable or disable the Transmit Line Build-Out circuit in the XRT7300. Setting this , Input: Setting this input pin "High" disables the Internal Receive Equalizer in the XRT7300. Setting , áç SEPTEMBER 2000 XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT REV. 1.0.7 GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS


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PDF XRT7300 XRT7300
1999 - Not Available

Abstract: No abstract text available
Text: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and , ) GENERAL DESCRIPTION The XRT7300 E3/DS3/STS-1 Transceiver device is a fully integrated transmitter and receiver Line Interface Unit (LIU) that is intended for E3, DS3 or SONET STS-1 applications. The XRT7300 E3 , INFORMATION Part No. XRT7300IV Package 44 Pin TQFP (10mm x 10mm) Operating Temperature Range -40°C to , ) 668-7017 · www.exar.com XRT7300 In the Transmit Direction l l l Accepts timing and single


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE
2000 - Not Available

Abstract: No abstract text available
Text: DATA SHEET Communications T3/STS-1/E3 XRT7300 DS3/E3/STS-1 Line Interface Unit Exar's XRT7300 , at DS3 (44.736Mbps), E3 (34.368Mbps) or STS-1 (51.84Mbps). The XRT7300 is a full featured Line , it into a dual rail digital signal. Features The XRT7300 transceiver has several key features. It is , built-in B3ZS/HDB3 encoder/decoder, and pulse shaping circuitry, the XRT7300 transceiver offers a fully , , the XRT7300 transceiver operates with a less expensive, and more stable (over temperature), 1:1


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PDF XRT7300 XRT7295/XRT7298 736Mbps) 368Mbps) 84Mbps) XRT7250) XRT7234/XRT7245)
ME1005

Abstract: ME-1005 728A coaxial cable DIGITAL IC TESTER TDS 3054 TI102 ANT-20 DSX-3 XRT7300 GR-499-CORE
Text: TAN-030 Application Note ­ Performance Characteristics of the XRT7300 Device for DS3 Applications Rev. 1.00 APPLICATION NOTE ­ PERFORMANCE CHARACTERISTICS OF THE XRT7300 DEVICE FOR DS3 APPLICATIONS 1 TAN-030 Application Note ­ Performance Characteristics of the XRT7300 Device for DS3 , . 13 3.0 RECEIVE SENSITIVITY OF THE XRT7300 DEVICE FOR DS3 AND STS-1 APPLICATIONS , . . 20 4.0 THE INPUT JITTER TOLERANCE CAPABILITY OF THE XRT7300 DEVICE, FOR DS3 APPLICATIONS


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PDF TAN-030 XRT7300 ANT20. ANT20 ME1005 ME-1005 728A coaxial cable DIGITAL IC TESTER TDS 3054 TI102 ANT-20 DSX-3 GR-499-CORE
2001 - Not Available

Abstract: No abstract text available
Text: DATA SHEET AP NOTE TAN-017 Communications XRT7300 DS3/E3/STS-1 Line Interface Unit Features · , · CSU/DSU Equipment · PCM Test Equipment · Fiber Optic Terminals · Multiplexers Exar's XRT7300 DS3 , at DS3 (44.736Mbps), E3 (34.368Mbps) or STS-1 (51.84Mbps). The XRT7300 is a full featured Line , it into a dual rail digital signal. The XRT7300 transceiver has several key features. It is compliant , B3ZS/HDB3 encoder/decoder, and pulse shaping circuitry, the XRT7300 transceiver offers a fully


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PDF TAN-017 XRT7300 XRT7295/XRT7298 XRT7250 XRT7234/45
2001 - 0X00

Abstract: GR-253-CORE GR-499-CORE XRT7300 XRT7300IV 24-BNC T3001
Text: . 1 Figure 1.Block Diagram of the XRT7300. , XRT7300. Setting this pin to "High" disables the Line Build-Out circuit. In this mode, the XRT7300 , this input pin "High" disables the Internal Receive Equalizer in the XRT7300. Setting this pin "Low" , áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT JUNE 2001 REV. 1.1.0 FEATURES · Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line


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PDF XRT7300 XRT7300 0X00 GR-253-CORE GR-499-CORE XRT7300IV 24-BNC T3001
2001 - TR-TSY-000009

Abstract: G832 BELLCORE T1 standards
Text: framer is part of a total DS3/E3 solution (accompanied by the Exar XRT7300 transceiver) that is available , transceivers, it is designed to interface seamlessly to Exar's XRT7300 transceiver. The XRT7250 framer is , environment. The XRT7250 framer can be used to configure the XRT7300 transceiver when it ( XRT7300 ) is operated , market, Exar's XRT7250 framer, used in companion with its XRT7300 transceiver, provides a communication


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PDF XRT7250 DS3-M13, XRT7300 XRT7300) TR-TSY-000009 G832 BELLCORE T1 standards
Not Available

Abstract: No abstract text available
Text: XRT7300 E3/DS3/STS-1 Line Interface Unit m t FEATURES • Single-chip Transmit and Receive , -1 applications. The XRT7300 E3/DS3/STS-1 Trans­ ceiver IC is a single-chip device that does the following , , Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com XRT7300 2 E * E X f lR , the XRT7300 Device Rev. 1.00 XRT7300 PIN OUT OF XRT7300 DEVICE I § < o o 42 41 , 10 24 ROLS 23 23 RLOL GND XRT7300 (Top V ie w ) GND VDD REG_RESET


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PDF XRT7300 368Mbps) 736Mbps) 84Mbps) GR-499-CORE XRT7300 XRT7250
2000 - DS3-M13

Abstract: GR-499-CORE XRT72L53 XRT7300 XRT73L03 F20U20 motorola g18 N18A
Text: pin - (to be connected to the XRT7300 DS3/E3 Line Interface Unit IC): This output pin is intended to be connected to the REQ input pin of the XRT7300 DS3/E3 (REQDIS or REQEN of the XRT73L03 or XRT , signal to toggle "high" then the internal Receive Equalizer (within the XRT7300 Device) will be , Equalizer (within the XRT7300 Device) will be enabled. For information on the criteria that should be used when deciding whether to bypass the equalization circuitry or not, please consult the " XRT7300 DS3/E3


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PDF XRT72L53 XRT72L53, XRT72L53 DS3-M13, DS3-M13 GR-499-CORE XRT7300 XRT73L03 F20U20 motorola g18 N18A
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